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authorcrupest <crupest@outlook.com>2021-12-24 19:35:39 +0800
committercrupest <crupest@outlook.com>2021-12-24 19:35:39 +0800
commit700da23188ef4059c15b4b71786c32c7bfbbfa73 (patch)
tree92d5bfb8dfa58a4c1fedbb2217fda5bd9c1305ec
parentc17673ea6b100f7b8766c6acccfb38e356a9c286 (diff)
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-rw-r--r--computer-organization-experiment/alu.vhdl4
1 files changed, 2 insertions, 2 deletions
diff --git a/computer-organization-experiment/alu.vhdl b/computer-organization-experiment/alu.vhdl
index 75a9961..5eed3df 100644
--- a/computer-organization-experiment/alu.vhdl
+++ b/computer-organization-experiment/alu.vhdl
@@ -13,8 +13,8 @@ end entity;
architecture Behavioral of alu is
begin
S <= A + B when ALUC(2 downto 0) = B"000"
- else A and B when ALUC(2 downto 0) ?= B"001"
- else A - B when ALUC(2 downto 0) ?= B"100"
+ else A - B when ALUC(2 downto 0) ?= B"001"
+ else A and B when ALUC(2 downto 0) ?= B"100"
else A or B when ALUC(2 downto 0) ?= B"101"
else A xor B when ALUC(2 downto 0) ?= B"010"
else std_logic_vector(signed(A) sll 16) and H"FFFF0000" when ALUC(2 downto 0) ?= B"110"