From 496f67d0c03a1b61153b565f67ffbfcc9f6ed3a6 Mon Sep 17 00:00:00 2001 From: crupest Date: Fri, 24 Dec 2021 19:35:16 +0800 Subject: import(life): ... --- .../computer-organization-experiment/register.vhdl | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 works/life/computer-organization-experiment/register.vhdl (limited to 'works/life/computer-organization-experiment/register.vhdl') diff --git a/works/life/computer-organization-experiment/register.vhdl b/works/life/computer-organization-experiment/register.vhdl new file mode 100644 index 0000000..8d24bd6 --- /dev/null +++ b/works/life/computer-organization-experiment/register.vhdl @@ -0,0 +1,21 @@ +library ieee; + +entity register is + port ( + D : in std_logic_vector(31 downto 0); + CLK, EN, CLRN: in std_logic; + Q: out std_logic_vector(31 downto 0) + ) +end register; + +architecture Behavioral of register is +begin + storage: process is + begin + if CLRN = '0' then + Q <= H"00000000"; + elsif rising_edge(CLK) and EN = '1' then + Q <= D; + end if; + end process; +end Behavioral; -- cgit v1.2.3