{
    "options": {
        "ghdl_analysis": [
            "-fsynopsys",
            "--workdir=build"
        ]
    },
    "files": [
        {
            "file": "counter_4.vhdl",
            "language": "vhdl"
        },
        {
            "file": "full_adder_1.vhdl",
            "language": "vhdl"
        },
        {
            "file": "test_bench.vhdl",
            "language": "vhdl"
        },
        {
            "file": "multiplexer_1_2.vhdl",
            "language": "vhdl"
        },
        {
            "file": "multiplexer_8_2.vhdl",
            "language": "vhdl"
        },
        {
            "file": "multiplexer_32_2.vhdl",
            "language": "vhdl"
        }
    ]
}