Second shot at moving arch/ into config/arch/ .

16 files changed, 309 insertions, 0 deletions

diff --git a/config/arch/alpha/config.in b/config/arch/alpha/config.in
new file mode 100644
index 00000000..cf8157a2
--- /dev/null
+++ b/config/arch/alpha/config.in
@@ -0,0 +1,62 @@
+# Alpha specific configuration file
+
+config ARCH_alpha
+    select ARCH_SUPPORT_CPU
+    select ARCH_SUPPORT_TUNE
+    help
+      The Alpha architecture.
+
+choice
+    bool
+    prompt "Variant"
+
+config ARCH_ALPHA_EV4
+    bool
+    prompt "EV4"
+
+config ARCH_ALPHA_EV45
+    bool
+    prompt "EV45"
+
+config ARCH_ALPHA_EV5
+    bool
+    prompt "EV5"
+
+config ARCH_ALPHA_EV56
+    bool
+    prompt "EV56"
+
+config ARCH_ALPHA_EV6
+    bool
+    prompt "EV6"
+
+config ARCH_ALPHA_EV67
+    bool
+    prompt "EV67"
+
+endchoice
+
+config ARCH_ALPHA_VARIANT
+    string
+    default "ev4"   if ARCH_ALPHA_EV4
+    default "ev45"  if ARCH_ALPHA_EV45
+    default "ev5"   if ARCH_ALPHA_EV5
+    default "ev56"  if ARCH_ALPHA_EV56
+    default "ev6"   if ARCH_ALPHA_EV6
+    default "ev67"  if ARCH_ALPHA_EV67
+
+config ARCH_CPU
+    default "ev4"   if ARCH_ALPHA_EV4
+    default "ev45"  if ARCH_ALPHA_EV45
+    default "ev5"   if ARCH_ALPHA_EV5
+    default "ev56"  if ARCH_ALPHA_EV56
+    default "ev6"   if ARCH_ALPHA_EV6
+    default "ev67"  if ARCH_ALPHA_EV67
+
+config ARCH_TUNE
+    default "ev4"   if ARCH_ALPHA_EV4
+    default "ev45"  if ARCH_ALPHA_EV45
+    default "ev5"   if ARCH_ALPHA_EV5
+    default "ev56"  if ARCH_ALPHA_EV56
+    default "ev6"   if ARCH_ALPHA_EV6
+    default "ev67"  if ARCH_ALPHA_EV67
diff --git a/config/arch/alpha/functions b/config/arch/alpha/functions
new file mode 100644
index 00000000..ea8ef536
--- /dev/null
+++ b/config/arch/alpha/functions
@@ -0,0 +1,9 @@
+# Compute Alpha-specific values
+
+CT_DoArchValues () {
+    # The architecture part of the tuple:
+    CT_TARGET_ARCH="${CT_ARCH}${CT_ARCH_ALPHA_VARIANT}"
+
+    # The kernel ARCH:
+    CT_KERNEL_ARCH=${CT_ARCH}
+}
diff --git a/config/arch/arm/config.in b/config/arch/arm/config.in
new file mode 100644
index 00000000..a3c3d975
--- /dev/null
+++ b/config/arch/arm/config.in
@@ -0,0 +1,26 @@
+# ARM specific configuration file
+
+config ARCH_arm
+    select ARCH_SUPPORTS_BOTH_ENDIAN
+    select ARCH_DEFAULT_LE
+    select ARCH_SUPPORT_ARCH
+    select ARCH_SUPPORT_CPU
+    select ARCH_SUPPORT_TUNE
+    select ARCH_SUPPORT_FPU
+    help
+      The ARM architecture, as defined by:
+        http://www.arm.com/
+
+config ARCH_ARM_EABI
+    bool
+    prompt "Use EABI"
+    default n
+    help
+      Set up the toolchain so that it generates EABI-compliant binaries.
+
+config ARCH_ARM_ABI_OK
+    bool
+    default y
+    depends on ! ARCH_ARM_EABI
+    select ARCH_SUPPORT_ABI
+
diff --git a/config/arch/arm/functions b/config/arch/arm/functions
new file mode 100644
index 00000000..a1b8542c
--- /dev/null
+++ b/config/arch/arm/functions
@@ -0,0 +1,17 @@
+# Compute ARM-specific values
+
+CT_DoArchValues() {
+    # The architecture part of the tuple:
+    CT_TARGET_ARCH="${CT_ARCH}${target_endian_eb}"
+
+    # The system part of the tuple:
+    case "${CT_LIBC},${CT_ARCH_ARM_EABI}" in
+        *glibc,y)   CT_TARGET_SYS=gnueabi;;
+        uClibc,y)   CT_TARGET_SYS=uclibcgnueabi;;
+        none,y)     CT_TARGET_SYS=eabi;;
+    esac
+
+    # In case we're EABI, do *not* specify any ABI!
+    # which means, either we do not have an ABI specified, or we're not EABI.
+    CT_TestOrAbort "Internal error: CT_ARCH_ABI should not be set for EABI build." -z "${CT_ARCH_ABI}" -o -z "${CT_ARCH_ARM_EABI}"
+}
diff --git a/config/arch/ia64/config.in b/config/arch/ia64/config.in
new file mode 100644
index 00000000..ad0d9fd3
--- /dev/null
+++ b/config/arch/ia64/config.in
@@ -0,0 +1,8 @@
+# ia64 specific config options
+# EXPERIMENTAL
+
+config ARCH_ia64
+    select ARCH_SUPPORTS_BOTH_ENDIAN
+    help
+      The ia64 architecture, as defined by:
+        http://www.intel.com/design/itanium/arch_spec.htm
diff --git a/config/arch/ia64/functions b/config/arch/ia64/functions
new file mode 100644
index 00000000..76f34ddb
--- /dev/null
+++ b/config/arch/ia64/functions
@@ -0,0 +1,6 @@
+# Compute IA-64-specific values
+
+CT_DoArchValues() {
+    # The architecture part of the tuple:
+    CT_TARGET_ARCH="${CT_ARCH}"
+}
diff --git a/config/arch/mips/config.in b/config/arch/mips/config.in
new file mode 100644
index 00000000..0f91e83c
--- /dev/null
+++ b/config/arch/mips/config.in
@@ -0,0 +1,11 @@
+# MIPS specific config options
+
+config ARCH_mips
+    select ARCH_SUPPORTS_BOTH_ENDIAN
+    select ARCH_DEFAULT_BE
+    select ARCH_SUPPORT_ARCH
+    select ARCH_SUPPORT_ABI
+    select ARCH_SUPPORT_TUNE
+    help
+      The MIPS architecture, as defined by:
+        http://www.mips.com/
diff --git a/config/arch/mips/functions b/config/arch/mips/functions
new file mode 100644
index 00000000..4bf0501d
--- /dev/null
+++ b/config/arch/mips/functions
@@ -0,0 +1,12 @@
+# Compute IA-64-specific values
+
+CT_DoArchValues() {
+    # The architecture part of the tuple:
+    CT_TARGET_ARCH="${CT_ARCH}${target_endian_el}"
+
+    # Override CFLAGS for endianness:
+    case "${CT_ARCH_BE},${CT_ARCH_LE}" in
+        y,) CT_ARCH_ENDIAN_CFLAG="-EB";;
+        ,y) CT_ARCH_ENDIAN_CFLAG="-EL";;
+    esac
+}
diff --git a/config/arch/powerpc/config.in b/config/arch/powerpc/config.in
new file mode 100644
index 00000000..448065a5
--- /dev/null
+++ b/config/arch/powerpc/config.in
@@ -0,0 +1,25 @@
+# powerpc specific configuration file
+
+config ARCH_powerpc
+    select ARCH_SUPPORT_ABI
+    select ARCH_SUPPORT_CPU
+    select ARCH_SUPPORT_TUNE
+    help
+      The PowerPC architecture, as defined by:
+        http://www.ibm.com/developerworks/eserver/articles/archguide.html
+
+config ARCH_POWERPC_SPE
+    bool
+    prompt "Enable SPE support"
+    default n
+    help
+      Add support for the Signal Processing Engine.  This will set up
+      the toolchain so that it supports the SPE ABI extensions. This
+      mainly targets Freescale e500 processors.
+
+      Setting this option will append "spe" to the end of your target
+      tuple name (e.g., powerpc-e500v2-linux-gnuspe) so that the gcc
+      configure/build system will know to include SPE ABI support.
+      It will also automatically add "-mabi=spe -mspe" to your
+      TARGET_CFLAGS, and "--enable-e500_double" to your CC_EXTRA_CONFIG,
+      so you do not need to explicitly add them.
diff --git a/config/arch/powerpc/functions b/config/arch/powerpc/functions
new file mode 100644
index 00000000..94ad11cd
--- /dev/null
+++ b/config/arch/powerpc/functions
@@ -0,0 +1,22 @@
+# Compute powerpc-specific values
+
+CT_DoArchValues () {
+    # The architecture part of the tuple:
+    CT_TARGET_ARCH="${CT_ARCH}"
+
+    # The kernel ARCH:
+    CT_KERNEL_ARCH=powerpc
+
+    # Add spe in the tuplet if needed
+    case "${CT_LIBC},${CT_ARCH_POWERPC_SPE}" in
+        glibc,|eglibc,)   CT_TARGET_SYS=gnu;;
+        glibc,y|eglibc,y) CT_TARGET_SYS=gnuspe;;
+    esac
+
+    # Add extra flags for SPE if needed
+    if [ "${CT_ARCH_POWERPC_SPE}" = "y" ]; then
+        CT_ARCH_TARGET_CFLAGS="-mabi=spe -mspe"
+        CT_ARCH_CC_CORE_EXTRA_CONFIG="--enable-e500_double"
+        CT_ARCH_CC_EXTRA_CONFIG="--enable-e500_double"
+    fi
+}
diff --git a/config/arch/sh/config.in b/config/arch/sh/config.in
new file mode 100644
index 00000000..b21ee1bb
--- /dev/null
+++ b/config/arch/sh/config.in
@@ -0,0 +1,33 @@
+# Super-H specific configuration file
+# EXPERIMENTAL
+
+config ARCH_sh
+    select ARCH_SUPPORTS_BOTH_ENDIAN
+    select ARCH_DEFAULT_LE
+    help
+      The Super-H architecture, as defined by:
+        http://www.renesas.com/fmwk.jsp?cnt=superh_family_landing.jsp&fp=/products/mpumcu/superh_family/
+
+choice
+    bool
+    prompt "Variant"
+
+config ARCH_SH_SH3
+    bool
+    prompt "sh3"
+
+config ARCH_SH_SH4
+    bool
+    prompt "sh4"
+
+config ARCH_SH_SH4A
+    bool
+    prompt "sh4a"
+
+endchoice
+
+config ARCH_SH_VARIANT
+    string
+    default "sh3"   if ARCH_SH_SH3
+    default "sh4"   if ARCH_SH_SH4
+    default "sh4a"  if ARCH_SH_SH4A
diff --git a/config/arch/sh/functions b/config/arch/sh/functions
new file mode 100644
index 00000000..b6dbc026
--- /dev/null
+++ b/config/arch/sh/functions
@@ -0,0 +1,32 @@
+# Compute sh-specific values
+
+CT_DoArchValues () {
+    # The architecture part of the tuple:
+    CT_TARGET_ARCH="${CT_ARCH_SH_VARIANT}${target_endian_eb}"
+
+    # gcc ./configure flags
+    CT_ARCH_WITH_ARCH=
+    CT_ARCH_WITH_ABI=
+    CT_ARCH_WITH_CPU=
+    CT_ARCH_WITH_TUNE=
+    CT_ARCH_WITH_FPU=
+    CT_ARCH_WITH_FLOAT=
+
+    # Endianness stuff
+    case "${CT_ARCH_BE},${CT_ARCH_LE}" in
+        y,) CT_ARCH_ENDIAN_CFLAG=-mb;;
+        ,y) CT_ARCH_ENDIAN_CFLAG=-ml;;
+    esac
+
+    # CFLAGS
+    case "${CT_ARCH_SH_VARIENT}" in
+        sh3)    CT_ARCH_ARCH_CFLAG=-m3;;
+        sh4*)
+            case "${CT_ARCH_FLOAT_HW},${CT_ARCH_FLOAT_SW}" in
+                y,) CT_ARCH_ARCH_CFLAG="-m4${CT_ARCH_SH_VARIANT##sh?}";;
+                ,y) CT_ARCH_ARCH_CFLAG="-m4${CT_ARCH_SH_VARIANT##sh?}-nofpu";;
+            esac
+            ;;
+    esac
+    CT_ARCH_FLOAT_CFLAG=
+}
diff --git a/config/arch/x86/config.in b/config/arch/x86/config.in
new file mode 100644
index 00000000..4a5c2f85
--- /dev/null
+++ b/config/arch/x86/config.in
@@ -0,0 +1,9 @@
+# x86 specific options
+
+config ARCH_x86
+    select ARCH_SUPPORT_ARCH
+    select ARCH_SUPPORT_CPU
+    select ARCH_SUPPORT_TUNE
+    help
+      The x86 architecture, as defined by:
+        http://www.intel.com/
diff --git a/config/arch/x86/functions b/config/arch/x86/functions
new file mode 100644
index 00000000..ae67692d
--- /dev/null
+++ b/config/arch/x86/functions
@@ -0,0 +1,22 @@
+# Compute x86-specific values
+
+# This one really need a little love! :-(
+
+CT_DoArchValues() {
+    # The architecture part of the tuple:
+    arch="${CT_ARCH_ARCH}"
+    [ -z "${arch}" ] && arch="${CT_ARCH_TUNE}"
+    case "${arch}" in
+        nocona|athlon*64|k8|athlon-fx|opteron)
+            CT_DoError "Architecture is x86 (32-bit) but selected processor is \"${arch}\" (64-bit)";;
+        "")                           CT_TARGET_ARCH=i386;;
+        i386|i486|i586|i686)          CT_TARGET_ARCH="${arch}";;
+        winchip*)                     CT_TARGET_ARCH=i486;;
+        pentium|pentium-mmx|c3*)      CT_TARGET_ARCH=i586;;
+        pentiumpro|pentium*|athlon*)  CT_TARGET_ARCH=i686;;
+        *)                            CT_TARGET_ARCH=i586;;
+    esac
+
+    # The kernel ARCH:
+    CT_KERNEL_ARCH=i386
+}
diff --git a/config/arch/x86_64/config.in b/config/arch/x86_64/config.in
new file mode 100644
index 00000000..83b6e83a
--- /dev/null
+++ b/config/arch/x86_64/config.in
@@ -0,0 +1,9 @@
+# x86_64 specific options
+
+config ARCH_x86_64
+    select ARCH_SUPPORT_ARCH
+    select ARCH_SUPPORT_CPU
+    select ARCH_SUPPORT_TUNE
+    help
+      The x86_64 architecture, as defined by:
+        http://www.amd.com/us-en/Processors/DevelopWithAMD/0,,30_2252_875_7044,00.html
diff --git a/config/arch/x86_64/functions b/config/arch/x86_64/functions
new file mode 100644
index 00000000..2626abf6
--- /dev/null
+++ b/config/arch/x86_64/functions
@@ -0,0 +1,6 @@
+# Compute x86_64-specific values
+
+CT_DoArchValues() {
+    # The architecture part of the tuple:
+    CT_TARGET_ARCH="${CT_ARCH}"
+}