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author | Chris Packham <judge.packham@gmail.com> | 2022-07-01 16:49:24 +1200 |
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committer | Chris Packham <judge.packham@gmail.com> | 2022-07-11 19:50:02 +1200 |
commit | 165502587397fa25558ecc89ce32cddb561104da (patch) | |
tree | 4b6c4a295f36e4c79016107529098f8e8dcfccb0 /packages/gcc/10.3.0/0015-crystax.patch | |
parent | f5e0d33ab46086c88ce800bb80be547c046a0efa (diff) | |
download | crosstool-ng-165502587397fa25558ecc89ce32cddb561104da.tar.gz crosstool-ng-165502587397fa25558ecc89ce32cddb561104da.tar.bz2 crosstool-ng-165502587397fa25558ecc89ce32cddb561104da.zip |
gcc: Add gcc 10.4.0
https://gcc.gnu.org/pipermail/gcc-announce/2022/000173.html
Add GCC 10.4.0 and regenerate the ct-ng patches. The
powerpc-Fix-asm-machine-directive-for-some-CPUs patch is dropped as the
change was applied upstream (and subsequently refactored).
Closes #1777
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Diffstat (limited to 'packages/gcc/10.3.0/0015-crystax.patch')
-rw-r--r-- | packages/gcc/10.3.0/0015-crystax.patch | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/packages/gcc/10.3.0/0015-crystax.patch b/packages/gcc/10.3.0/0015-crystax.patch deleted file mode 100644 index 4f1c28ee..00000000 --- a/packages/gcc/10.3.0/0015-crystax.patch +++ /dev/null @@ -1,33 +0,0 @@ -commit 8a66d422721ae5999737d7825701ff22097d287b -Author: Andrew Hsieh <andrewhsieh@google.com> -Date: Mon Apr 14 21:05:51 2014 -0700 - - [android] Fix ARM generates insufficient alignment for NEON vst/vld - - See d909af3e2469aad87d5c3e79b93c778fd26c03a9 - - Change-Id: Ie1de9f946f397196bb6f1623f5add86933739484 - Signed-off-by: Dmitry Moskalchuk <dm@crystax.net> - ---- - gcc/config/arm/arm.c | 8 ++++++-- - 1 file changed, 6 insertions(+), 2 deletions(-) - ---- a/gcc/config/arm/arm.c -+++ b/gcc/config/arm/arm.c -@@ -24131,9 +24131,13 @@ - memsize = MEM_SIZE (x); - - /* Only certain alignment specifiers are supported by the hardware. */ -- if (memsize == 32 && (align % 32) == 0) -+ /* Note that ARM EABI only guarentees 8-byte stack alignment. While GCC -+ honors stricter alignment of composite type in user code, it doesn't -+ observe the alignment of memory passed as an extra argument for function -+ returning large composite type. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57271 */ -+ if (memsize == 32 && (align % 32) == 0 && !TARGET_AAPCS_BASED) - align_bits = 256; -- else if ((memsize == 16 || memsize == 32) && (align % 16) == 0) -+ else if ((memsize == 16 || memsize == 32) && (align % 16) == 0 && !TARGET_AAPCS_BASED) - align_bits = 128; - else if (memsize >= 8 && (align % 8) == 0) - align_bits = 64; |