diff options
| author | Yann E. MORIN" <yann.morin.1998@anciens.enib.fr> | 2009-05-07 19:30:32 +0000 |
|---|---|---|
| committer | Yann E. MORIN" <yann.morin.1998@anciens.enib.fr> | 2009-05-07 19:30:32 +0000 |
| commit | 656d56551ecbec0e16705ccc024abbcc0381df6e (patch) | |
| tree | 1b04f07f62c4f75a21e1b36ba978d18cc47d0fc8 /patches/eglibc | |
| parent | f7acc7992c8f728dcce04922ead2af039b15c390 (diff) | |
| download | crosstool-ng-656d56551ecbec0e16705ccc024abbcc0381df6e.tar.gz crosstool-ng-656d56551ecbec0e16705ccc024abbcc0381df6e.tar.bz2 crosstool-ng-656d56551ecbec0e16705ccc024abbcc0381df6e.zip | |
Workaround for "PowerPC-8xx CPU15 errata" (whatever that might be).
Patch by Nye LIU: http://sourceware.org/ml/crossgcc/2009-05/msg00014.html
-------- diffstat follows --------
/trunk/patches/eglibc/2_9/100-powerpc-8xx-CPU15-errata.patch | 49 49 0 0 ++++++++++++++++++
/trunk/scripts/build/libc/eglibc.sh | 10 9 1 0 +++-
2 files changed, 58 insertions(+), 1 deletion(-)
Diffstat (limited to 'patches/eglibc')
| -rw-r--r-- | patches/eglibc/2_9/100-powerpc-8xx-CPU15-errata.patch | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/patches/eglibc/2_9/100-powerpc-8xx-CPU15-errata.patch b/patches/eglibc/2_9/100-powerpc-8xx-CPU15-errata.patch new file mode 100644 index 00000000..4fe1bb2c --- /dev/null +++ b/patches/eglibc/2_9/100-powerpc-8xx-CPU15-errata.patch @@ -0,0 +1,49 @@ +diff -ru eglibc-2_9_orig/sysdeps/powerpc/powerpc32/memset.S eglibc-2_9/sysdeps/powerpc/powerpc32/memset.S +--- eglibc-2_9_orig/sysdeps/powerpc/powerpc32/memset.S 2007-04-13 08:35:45.000000000 -0700 ++++ eglibc-2_9/sysdeps/powerpc/powerpc32/memset.S 2009-05-06 16:52:04.000000000 -0700 +@@ -112,11 +112,13 @@ + clrrwi. rALIGN, rLEN, 5 + mtcrf 0x01, rLEN /* 40th instruction from .align */ + ++#ifndef BROKEN_PPC_8xx_CPU15 + /* Check if we can use the special case for clearing memory using dcbz. + This requires that we know the correct cache line size for this + processor. Getting the __cache_line_size may require establishing GOT + addressability, so branch out of line to set this up. */ + beq cr1, L(checklinesize) ++#endif + + /* Store blocks of 32-bytes (256-bits) starting on a 32-byte boundary. + Can't assume that rCHR is zero or that the cache line size is either +@@ -158,6 +160,7 @@ + add rMEMP, rMEMP, rALIGN + b L(medium_tail2) /* 72nd instruction from .align */ + ++#ifndef BROKEN_PPC_8xx_CPU15 + .align 5 + nop + /* Clear cache lines of memory in 128-byte chunks. +@@ -191,6 +194,7 @@ + bdnz L(zloop) + beqlr cr5 + b L(medium_tail2) ++#endif /* ! BROKEN_PPC_8xx_CPU15 */ + + .align 5 + L(small): +@@ -248,6 +252,7 @@ + stw rCHR, -8(rMEMP) + blr + ++#ifndef BROKEN_PPC_8xx_CPU15 + L(checklinesize): + #ifdef SHARED + mflr rTMP +@@ -329,6 +334,7 @@ + L(handletail32): + clrrwi. rALIGN, rLEN, 5 + b L(nondcbz) ++#endif /* ! BROKEN_PPC_8xx_CPU15 */ + + END (BP_SYM (memset)) + libc_hidden_builtin_def (memset) |