diff options
Diffstat (limited to 'packages/gcc')
143 files changed, 3873 insertions, 9096 deletions
diff --git a/packages/gcc/11.4.0/0011-aarch64-Use-local-frame-vars-in-shrink-wrapping-code.patch b/packages/gcc/11.4.0/0011-aarch64-Use-local-frame-vars-in-shrink-wrapping-code.patch deleted file mode 100644 index 759214b0..00000000 --- a/packages/gcc/11.4.0/0011-aarch64-Use-local-frame-vars-in-shrink-wrapping-code.patch +++ /dev/null @@ -1,349 +0,0 @@ -From 52816ab48f97968f3fbfb5656250f3de7c00166d Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:43 +0100 -Subject: [PATCH 11/29] aarch64: Use local frame vars in shrink-wrapping code - -aarch64_layout_frame uses a shorthand for referring to -cfun->machine->frame: - - aarch64_frame &frame = cfun->machine->frame; - -This patch does the same for some other heavy users of the structure. -No functional change intended. - -gcc/ - * config/aarch64/aarch64.c (aarch64_save_callee_saves): Use - a local shorthand for cfun->machine->frame. - (aarch64_restore_callee_saves, aarch64_get_separate_components): - (aarch64_process_components): Likewise. - (aarch64_allocate_and_probe_stack_space): Likewise. - (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. - (aarch64_layout_frame): Use existing shorthand for one more case. ---- - gcc/config/aarch64/aarch64.c | 115 ++++++++++++++++++----------------- - 1 file changed, 60 insertions(+), 55 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 391a93f30184..77c1d1300a5c 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7994,6 +7994,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - unsigned start, unsigned limit, bool skip_wb, - bool hard_fp_valid_p) - { -+ aarch64_frame &frame = cfun->machine->frame; - rtx_insn *insn; - unsigned regno; - unsigned regno2; -@@ -8008,8 +8009,8 @@ aarch64_save_callee_saves (poly_int64 start_offset, - bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno); - - if (skip_wb -- && (regno == cfun->machine->frame.wb_candidate1 -- || regno == cfun->machine->frame.wb_candidate2)) -+ && (regno == frame.wb_candidate1 -+ || regno == frame.wb_candidate2)) - continue; - - if (cfun->machine->reg_is_wrapped_separately[regno]) -@@ -8017,7 +8018,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + cfun->machine->frame.reg_offset[regno]; -+ offset = start_offset + frame.reg_offset[regno]; - rtx base_rtx = stack_pointer_rtx; - poly_int64 sp_offset = offset; - -@@ -8030,7 +8031,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - { - gcc_assert (known_eq (start_offset, 0)); - poly_int64 fp_offset -- = cfun->machine->frame.below_hard_fp_saved_regs_size; -+ = frame.below_hard_fp_saved_regs_size; - if (hard_fp_valid_p) - base_rtx = hard_frame_pointer_rtx; - else -@@ -8052,8 +8053,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit - && !cfun->machine->reg_is_wrapped_separately[regno2] - && known_eq (GET_MODE_SIZE (mode), -- cfun->machine->frame.reg_offset[regno2] -- - cfun->machine->frame.reg_offset[regno])) -+ frame.reg_offset[regno2] - frame.reg_offset[regno])) - { - rtx reg2 = gen_rtx_REG (mode, regno2); - rtx mem2; -@@ -8103,6 +8103,7 @@ static void - aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - unsigned limit, bool skip_wb, rtx *cfi_ops) - { -+ aarch64_frame &frame = cfun->machine->frame; - unsigned regno; - unsigned regno2; - poly_int64 offset; -@@ -8119,13 +8120,13 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - rtx reg, mem; - - if (skip_wb -- && (regno == cfun->machine->frame.wb_candidate1 -- || regno == cfun->machine->frame.wb_candidate2)) -+ && (regno == frame.wb_candidate1 -+ || regno == frame.wb_candidate2)) - continue; - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + cfun->machine->frame.reg_offset[regno]; -+ offset = start_offset + frame.reg_offset[regno]; - rtx base_rtx = stack_pointer_rtx; - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, -@@ -8136,8 +8137,7 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit - && !cfun->machine->reg_is_wrapped_separately[regno2] - && known_eq (GET_MODE_SIZE (mode), -- cfun->machine->frame.reg_offset[regno2] -- - cfun->machine->frame.reg_offset[regno])) -+ frame.reg_offset[regno2] - frame.reg_offset[regno])) - { - rtx reg2 = gen_rtx_REG (mode, regno2); - rtx mem2; -@@ -8242,6 +8242,7 @@ offset_12bit_unsigned_scaled_p (machine_mode mode, poly_int64 offset) - static sbitmap - aarch64_get_separate_components (void) - { -+ aarch64_frame &frame = cfun->machine->frame; - sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1); - bitmap_clear (components); - -@@ -8258,18 +8259,18 @@ aarch64_get_separate_components (void) - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - continue; - -- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; -+ poly_int64 offset = frame.reg_offset[regno]; - - /* If the register is saved in the first SVE save slot, we use - it as a stack probe for -fstack-clash-protection. */ - if (flag_stack_clash_protection -- && maybe_ne (cfun->machine->frame.below_hard_fp_saved_regs_size, 0) -+ && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) - && known_eq (offset, 0)) - continue; - - /* Get the offset relative to the register we'll use. */ - if (frame_pointer_needed) -- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; -+ offset -= frame.below_hard_fp_saved_regs_size; - else - offset += crtl->outgoing_args_size; - -@@ -8288,11 +8289,11 @@ aarch64_get_separate_components (void) - /* If the spare predicate register used by big-endian SVE code - is call-preserved, it must be saved in the main prologue - before any saves that use it. */ -- if (cfun->machine->frame.spare_pred_reg != INVALID_REGNUM) -- bitmap_clear_bit (components, cfun->machine->frame.spare_pred_reg); -+ if (frame.spare_pred_reg != INVALID_REGNUM) -+ bitmap_clear_bit (components, frame.spare_pred_reg); - -- unsigned reg1 = cfun->machine->frame.wb_candidate1; -- unsigned reg2 = cfun->machine->frame.wb_candidate2; -+ unsigned reg1 = frame.wb_candidate1; -+ unsigned reg2 = frame.wb_candidate2; - /* If registers have been chosen to be stored/restored with - writeback don't interfere with them to avoid having to output explicit - stack adjustment instructions. */ -@@ -8401,6 +8402,7 @@ aarch64_get_next_set_bit (sbitmap bmp, unsigned int start) - static void - aarch64_process_components (sbitmap components, bool prologue_p) - { -+ aarch64_frame &frame = cfun->machine->frame; - rtx ptr_reg = gen_rtx_REG (Pmode, frame_pointer_needed - ? HARD_FRAME_POINTER_REGNUM - : STACK_POINTER_REGNUM); -@@ -8415,9 +8417,9 @@ aarch64_process_components (sbitmap components, bool prologue_p) - machine_mode mode = aarch64_reg_save_mode (regno); - - rtx reg = gen_rtx_REG (mode, regno); -- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; -+ poly_int64 offset = frame.reg_offset[regno]; - if (frame_pointer_needed) -- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; -+ offset -= frame.below_hard_fp_saved_regs_size; - else - offset += crtl->outgoing_args_size; - -@@ -8442,14 +8444,14 @@ aarch64_process_components (sbitmap components, bool prologue_p) - break; - } - -- poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2]; -+ poly_int64 offset2 = frame.reg_offset[regno2]; - /* The next register is not of the same class or its offset is not - mergeable with the current one into a pair. */ - if (aarch64_sve_mode_p (mode) - || !satisfies_constraint_Ump (mem) - || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2) - || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno)) -- || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]), -+ || maybe_ne ((offset2 - frame.reg_offset[regno]), - GET_MODE_SIZE (mode))) - { - insn = emit_insn (set); -@@ -8471,7 +8473,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - /* REGNO2 can be saved/restored in a pair with REGNO. */ - rtx reg2 = gen_rtx_REG (mode, regno2); - if (frame_pointer_needed) -- offset2 -= cfun->machine->frame.below_hard_fp_saved_regs_size; -+ offset2 -= frame.below_hard_fp_saved_regs_size; - else - offset2 += crtl->outgoing_args_size; - rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); -@@ -8566,6 +8568,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - bool frame_related_p, - bool final_adjustment_p) - { -+ aarch64_frame &frame = cfun->machine->frame; - HOST_WIDE_INT guard_size - = 1 << param_stack_clash_protection_guard_size; - HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; -@@ -8586,25 +8589,25 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - register as a probe. We can't assume that LR was saved at position 0 - though, so treat any space below it as unprobed. */ - if (final_adjustment_p -- && known_eq (cfun->machine->frame.below_hard_fp_saved_regs_size, 0)) -+ && known_eq (frame.below_hard_fp_saved_regs_size, 0)) - { -- poly_int64 lr_offset = cfun->machine->frame.reg_offset[LR_REGNUM]; -+ poly_int64 lr_offset = frame.reg_offset[LR_REGNUM]; - if (known_ge (lr_offset, 0)) - min_probe_threshold -= lr_offset.to_constant (); - else - gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); - } - -- poly_int64 frame_size = cfun->machine->frame.frame_size; -+ poly_int64 frame_size = frame.frame_size; - - /* We should always have a positive probe threshold. */ - gcc_assert (min_probe_threshold > 0); - - if (flag_stack_clash_protection && !final_adjustment_p) - { -- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; -- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; -- poly_int64 final_adjust = cfun->machine->frame.final_adjust; -+ poly_int64 initial_adjust = frame.initial_adjust; -+ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; -+ poly_int64 final_adjust = frame.final_adjust; - - if (known_eq (frame_size, 0)) - { -@@ -8893,17 +8896,18 @@ aarch64_epilogue_uses (int regno) - void - aarch64_expand_prologue (void) - { -- poly_int64 frame_size = cfun->machine->frame.frame_size; -- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; -- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; -- poly_int64 final_adjust = cfun->machine->frame.final_adjust; -- poly_int64 callee_offset = cfun->machine->frame.callee_offset; -- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; -+ aarch64_frame &frame = cfun->machine->frame; -+ poly_int64 frame_size = frame.frame_size; -+ poly_int64 initial_adjust = frame.initial_adjust; -+ HOST_WIDE_INT callee_adjust = frame.callee_adjust; -+ poly_int64 final_adjust = frame.final_adjust; -+ poly_int64 callee_offset = frame.callee_offset; -+ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size -- = cfun->machine->frame.below_hard_fp_saved_regs_size; -- unsigned reg1 = cfun->machine->frame.wb_candidate1; -- unsigned reg2 = cfun->machine->frame.wb_candidate2; -- bool emit_frame_chain = cfun->machine->frame.emit_frame_chain; -+ = frame.below_hard_fp_saved_regs_size; -+ unsigned reg1 = frame.wb_candidate1; -+ unsigned reg2 = frame.wb_candidate2; -+ bool emit_frame_chain = frame.emit_frame_chain; - rtx_insn *insn; - - if (flag_stack_clash_protection && known_eq (callee_adjust, 0)) -@@ -8969,7 +8973,7 @@ aarch64_expand_prologue (void) - - /* The offset of the frame chain record (if any) from the current SP. */ - poly_int64 chain_offset = (initial_adjust + callee_adjust -- - cfun->machine->frame.hard_fp_offset); -+ - frame.hard_fp_offset); - gcc_assert (known_ge (chain_offset, 0)); - - /* The offset of the bottom of the save area from the current SP. */ -@@ -9072,15 +9076,16 @@ aarch64_use_return_insn_p (void) - void - aarch64_expand_epilogue (bool for_sibcall) - { -- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; -- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; -- poly_int64 final_adjust = cfun->machine->frame.final_adjust; -- poly_int64 callee_offset = cfun->machine->frame.callee_offset; -- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; -+ aarch64_frame &frame = cfun->machine->frame; -+ poly_int64 initial_adjust = frame.initial_adjust; -+ HOST_WIDE_INT callee_adjust = frame.callee_adjust; -+ poly_int64 final_adjust = frame.final_adjust; -+ poly_int64 callee_offset = frame.callee_offset; -+ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size -- = cfun->machine->frame.below_hard_fp_saved_regs_size; -- unsigned reg1 = cfun->machine->frame.wb_candidate1; -- unsigned reg2 = cfun->machine->frame.wb_candidate2; -+ = frame.below_hard_fp_saved_regs_size; -+ unsigned reg1 = frame.wb_candidate1; -+ unsigned reg2 = frame.wb_candidate2; - rtx cfi_ops = NULL; - rtx_insn *insn; - /* A stack clash protection prologue may not have left EP0_REGNUM or -@@ -9113,7 +9118,7 @@ aarch64_expand_epilogue (bool for_sibcall) - /* We need to add memory barrier to prevent read from deallocated stack. */ - bool need_barrier_p - = maybe_ne (get_frame_size () -- + cfun->machine->frame.saved_varargs_size, 0); -+ + frame.saved_varargs_size, 0); - - /* Emit a barrier to prevent loads from a deallocated stack. */ - if (maybe_gt (final_adjust, crtl->outgoing_args_size) -@@ -11744,24 +11749,24 @@ aarch64_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) - poly_int64 - aarch64_initial_elimination_offset (unsigned from, unsigned to) - { -+ aarch64_frame &frame = cfun->machine->frame; -+ - if (to == HARD_FRAME_POINTER_REGNUM) - { - if (from == ARG_POINTER_REGNUM) -- return cfun->machine->frame.hard_fp_offset; -+ return frame.hard_fp_offset; - - if (from == FRAME_POINTER_REGNUM) -- return cfun->machine->frame.hard_fp_offset -- - cfun->machine->frame.locals_offset; -+ return frame.hard_fp_offset - frame.locals_offset; - } - - if (to == STACK_POINTER_REGNUM) - { - if (from == FRAME_POINTER_REGNUM) -- return cfun->machine->frame.frame_size -- - cfun->machine->frame.locals_offset; -+ return frame.frame_size - frame.locals_offset; - } - -- return cfun->machine->frame.frame_size; -+ return frame.frame_size; - } - - --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0012-aarch64-Avoid-a-use-of-callee_offset.patch b/packages/gcc/11.4.0/0012-aarch64-Avoid-a-use-of-callee_offset.patch deleted file mode 100644 index 75bb2718..00000000 --- a/packages/gcc/11.4.0/0012-aarch64-Avoid-a-use-of-callee_offset.patch +++ /dev/null @@ -1,73 +0,0 @@ -From a2a57f7ec7912e77eb26919545807d90065584ff Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:44 +0100 -Subject: [PATCH 12/29] aarch64: Avoid a use of callee_offset - -When we emit the frame chain, i.e. when we reach Here in this statement -of aarch64_expand_prologue: - - if (emit_frame_chain) - { - // Here - ... - } - -the stack is in one of two states: - -- We've allocated up to the frame chain, but no more. - -- We've allocated the whole frame, and the frame chain is within easy - reach of the new SP. - -The offset of the frame chain from the current SP is available -in aarch64_frame as callee_offset. It is also available as the -chain_offset local variable, where the latter is calculated from other -data. (However, chain_offset is not always equal to callee_offset when -!emit_frame_chain, so chain_offset isn't redundant.) - -In c600df9a4060da3c6121ff4d0b93f179eafd69d1 I switched to using -chain_offset for the initialisation of the hard frame pointer: - - aarch64_add_offset (Pmode, hard_frame_pointer_rtx, -- stack_pointer_rtx, callee_offset, -+ stack_pointer_rtx, chain_offset, - tmp1_rtx, tmp0_rtx, frame_pointer_needed); - -But the later REG_CFA_ADJUST_CFA handling still used callee_offset. - -I think the difference is harmless, but it's more logical for the -CFA note to be in sync, and it's more convenient for later patches -if it uses chain_offset. - -gcc/ - * config/aarch64/aarch64.c (aarch64_expand_prologue): Use - chain_offset rather than callee_offset. ---- - gcc/config/aarch64/aarch64.c | 4 +--- - 1 file changed, 1 insertion(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 77c1d1300a5c..6bc026bd08f9 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -8901,7 +8901,6 @@ aarch64_expand_prologue (void) - poly_int64 initial_adjust = frame.initial_adjust; - HOST_WIDE_INT callee_adjust = frame.callee_adjust; - poly_int64 final_adjust = frame.final_adjust; -- poly_int64 callee_offset = frame.callee_offset; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size - = frame.below_hard_fp_saved_regs_size; -@@ -9010,8 +9009,7 @@ aarch64_expand_prologue (void) - implicit. */ - if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX)) - { -- rtx src = plus_constant (Pmode, stack_pointer_rtx, -- callee_offset); -+ rtx src = plus_constant (Pmode, stack_pointer_rtx, chain_offset); - add_reg_note (insn, REG_CFA_ADJUST_CFA, - gen_rtx_SET (hard_frame_pointer_rtx, src)); - } --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0013-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch b/packages/gcc/11.4.0/0013-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch deleted file mode 100644 index 16d6cad2..00000000 --- a/packages/gcc/11.4.0/0013-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 5efdcc8ed19d9d9e708a001f5dc695560411496d Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:44 +0100 -Subject: [PATCH 13/29] aarch64: Explicitly handle frames with no saved - registers - -If a frame has no saved registers, it can be allocated in one go. -There is no need to treat the areas below and above the saved -registers as separate. - -And if we allocate the frame in one go, it should be allocated -as the initial_adjust rather than the final_adjust. This allows the -frame size to grow to guard_size - guard_used_by_caller before a stack -probe is needed. (A frame with no register saves is necessarily a -leaf frame.) - -This is a no-op as thing stand, since a leaf function will have -no outgoing arguments, and so all the frame will be above where -the saved registers normally go. - -gcc/ - * config/aarch64/aarch64.c (aarch64_layout_frame): Explicitly - allocate the frame in one go if there are no saved registers. ---- - gcc/config/aarch64/aarch64.c | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 6bc026bd08f9..05e6ae8c0c96 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7609,9 +7609,11 @@ aarch64_layout_frame (void) - - HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; - HOST_WIDE_INT const_saved_regs_size; -- if (frame.frame_size.is_constant (&const_size) -- && const_size < max_push_offset -- && known_eq (frame.hard_fp_offset, const_size)) -+ if (known_eq (frame.saved_regs_size, 0)) -+ frame.initial_adjust = frame.frame_size; -+ else if (frame.frame_size.is_constant (&const_size) -+ && const_size < max_push_offset -+ && known_eq (frame.hard_fp_offset, const_size)) - { - /* Simple, small frame with no outgoing arguments: - --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0014-aarch64-Add-bytes_below_saved_regs-to-frame-info.patch b/packages/gcc/11.4.0/0014-aarch64-Add-bytes_below_saved_regs-to-frame-info.patch deleted file mode 100644 index 321e4da9..00000000 --- a/packages/gcc/11.4.0/0014-aarch64-Add-bytes_below_saved_regs-to-frame-info.patch +++ /dev/null @@ -1,233 +0,0 @@ -From a8385d14318634f2e3a08a75bd2d6e2810f8cec9 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:45 +0100 -Subject: [PATCH 14/29] aarch64: Add bytes_below_saved_regs to frame info - -The frame layout code currently hard-codes the assumption that -the number of bytes below the saved registers is equal to the -size of the outgoing arguments. This patch abstracts that -value into a new field of aarch64_frame. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New - field. - * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize it, - and use it instead of crtl->outgoing_args_size. - (aarch64_get_separate_components): Use bytes_below_saved_regs instead - of outgoing_args_size. - (aarch64_process_components): Likewise. ---- - gcc/config/aarch64/aarch64.c | 71 ++++++++++++++++++------------------ - gcc/config/aarch64/aarch64.h | 5 +++ - 2 files changed, 41 insertions(+), 35 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 05e6ae8c0c96..8fa5a0b25455 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7476,6 +7476,8 @@ aarch64_layout_frame (void) - gcc_assert (crtl->is_leaf - || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); - -+ frame.bytes_below_saved_regs = crtl->outgoing_args_size; -+ - /* Now assign stack slots for the registers. Start with the predicate - registers, since predicate LDR and STR have a relatively small - offset range. These saves happen below the hard frame pointer. */ -@@ -7580,18 +7582,18 @@ aarch64_layout_frame (void) - - poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; - -- poly_int64 above_outgoing_args -+ poly_int64 saved_regs_and_above - = aligned_upper_bound (varargs_and_saved_regs_size - + get_frame_size (), - STACK_BOUNDARY / BITS_PER_UNIT); - - frame.hard_fp_offset -- = above_outgoing_args - frame.below_hard_fp_saved_regs_size; -+ = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; - - /* Both these values are already aligned. */ -- gcc_assert (multiple_p (crtl->outgoing_args_size, -+ gcc_assert (multiple_p (frame.bytes_below_saved_regs, - STACK_BOUNDARY / BITS_PER_UNIT)); -- frame.frame_size = above_outgoing_args + crtl->outgoing_args_size; -+ frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; - - frame.locals_offset = frame.saved_varargs_size; - -@@ -7607,7 +7609,7 @@ aarch64_layout_frame (void) - else if (frame.wb_candidate1 != INVALID_REGNUM) - max_push_offset = 256; - -- HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; -+ HOST_WIDE_INT const_size, const_below_saved_regs, const_fp_offset; - HOST_WIDE_INT const_saved_regs_size; - if (known_eq (frame.saved_regs_size, 0)) - frame.initial_adjust = frame.frame_size; -@@ -7615,31 +7617,31 @@ aarch64_layout_frame (void) - && const_size < max_push_offset - && known_eq (frame.hard_fp_offset, const_size)) - { -- /* Simple, small frame with no outgoing arguments: -+ /* Simple, small frame with no data below the saved registers. - - stp reg1, reg2, [sp, -frame_size]! - stp reg3, reg4, [sp, 16] */ - frame.callee_adjust = const_size; - } -- else if (crtl->outgoing_args_size.is_constant (&const_outgoing_args_size) -+ else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) - && frame.saved_regs_size.is_constant (&const_saved_regs_size) -- && const_outgoing_args_size + const_saved_regs_size < 512 -- /* We could handle this case even with outgoing args, provided -- that the number of args left us with valid offsets for all -- predicate and vector save slots. It's such a rare case that -- it hardly seems worth the effort though. */ -- && (!saves_below_hard_fp_p || const_outgoing_args_size == 0) -+ && const_below_saved_regs + const_saved_regs_size < 512 -+ /* We could handle this case even with data below the saved -+ registers, provided that that data left us with valid offsets -+ for all predicate and vector save slots. It's such a rare -+ case that it hardly seems worth the effort though. */ -+ && (!saves_below_hard_fp_p || const_below_saved_regs == 0) - && !(cfun->calls_alloca - && frame.hard_fp_offset.is_constant (&const_fp_offset) - && const_fp_offset < max_push_offset)) - { -- /* Frame with small outgoing arguments: -+ /* Frame with small area below the saved registers: - - sub sp, sp, frame_size -- stp reg1, reg2, [sp, outgoing_args_size] -- stp reg3, reg4, [sp, outgoing_args_size + 16] */ -+ stp reg1, reg2, [sp, bytes_below_saved_regs] -+ stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ - frame.initial_adjust = frame.frame_size; -- frame.callee_offset = const_outgoing_args_size; -+ frame.callee_offset = const_below_saved_regs; - } - else if (saves_below_hard_fp_p - && known_eq (frame.saved_regs_size, -@@ -7649,30 +7651,29 @@ aarch64_layout_frame (void) - - sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size - save SVE registers relative to SP -- sub sp, sp, outgoing_args_size */ -+ sub sp, sp, bytes_below_saved_regs */ - frame.initial_adjust = (frame.hard_fp_offset - + frame.below_hard_fp_saved_regs_size); -- frame.final_adjust = crtl->outgoing_args_size; -+ frame.final_adjust = frame.bytes_below_saved_regs; - } - else if (frame.hard_fp_offset.is_constant (&const_fp_offset) - && const_fp_offset < max_push_offset) - { -- /* Frame with large outgoing arguments or SVE saves, but with -- a small local area: -+ /* Frame with large area below the saved registers, or with SVE saves, -+ but with a small area above: - - stp reg1, reg2, [sp, -hard_fp_offset]! - stp reg3, reg4, [sp, 16] - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] -- sub sp, sp, outgoing_args_size */ -+ sub sp, sp, bytes_below_saved_regs */ - frame.callee_adjust = const_fp_offset; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -- frame.final_adjust = crtl->outgoing_args_size; -+ frame.final_adjust = frame.bytes_below_saved_regs; - } - else - { -- /* Frame with large local area and outgoing arguments or SVE saves, -- using frame pointer: -+ /* General case: - - sub sp, sp, hard_fp_offset - stp x29, x30, [sp, 0] -@@ -7680,10 +7681,10 @@ aarch64_layout_frame (void) - stp reg3, reg4, [sp, 16] - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] -- sub sp, sp, outgoing_args_size */ -+ sub sp, sp, bytes_below_saved_regs */ - frame.initial_adjust = frame.hard_fp_offset; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -- frame.final_adjust = crtl->outgoing_args_size; -+ frame.final_adjust = frame.bytes_below_saved_regs; - } - - /* Make sure the individual adjustments add up to the full frame size. */ -@@ -8274,7 +8275,7 @@ aarch64_get_separate_components (void) - if (frame_pointer_needed) - offset -= frame.below_hard_fp_saved_regs_size; - else -- offset += crtl->outgoing_args_size; -+ offset += frame.bytes_below_saved_regs; - - /* Check that we can access the stack slot of the register with one - direct load with no adjustments needed. */ -@@ -8423,7 +8424,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - if (frame_pointer_needed) - offset -= frame.below_hard_fp_saved_regs_size; - else -- offset += crtl->outgoing_args_size; -+ offset += frame.bytes_below_saved_regs; - - rtx addr = plus_constant (Pmode, ptr_reg, offset); - rtx mem = gen_frame_mem (mode, addr); -@@ -8477,7 +8478,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - if (frame_pointer_needed) - offset2 -= frame.below_hard_fp_saved_regs_size; - else -- offset2 += crtl->outgoing_args_size; -+ offset2 += frame.bytes_below_saved_regs; - rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); - rtx mem2 = gen_frame_mem (mode, addr2); - rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) -@@ -8551,10 +8552,10 @@ aarch64_stack_clash_protection_alloca_probe_range (void) - registers. If POLY_SIZE is not large enough to require a probe this function - will only adjust the stack. When allocating the stack space - FRAME_RELATED_P is then used to indicate if the allocation is frame related. -- FINAL_ADJUSTMENT_P indicates whether we are allocating the outgoing -- arguments. If we are then we ensure that any allocation larger than the ABI -- defined buffer needs a probe so that the invariant of having a 1KB buffer is -- maintained. -+ FINAL_ADJUSTMENT_P indicates whether we are allocating the area below -+ the saved registers. If we are then we ensure that any allocation -+ larger than the ABI defined buffer needs a probe so that the -+ invariant of having a 1KB buffer is maintained. - - We emit barriers after each stack adjustment to prevent optimizations from - breaking the invariant that we never drop the stack more than a page. This -@@ -8763,7 +8764,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - /* Handle any residuals. Residuals of at least MIN_PROBE_THRESHOLD have to - be probed. This maintains the requirement that each page is probed at - least once. For initial probing we probe only if the allocation is -- more than GUARD_SIZE - buffer, and for the outgoing arguments we probe -+ more than GUARD_SIZE - buffer, and below the saved registers we probe - if the amount is larger than buffer. GUARD_SIZE - buffer + buffer == - GUARD_SIZE. This works that for any allocation that is large enough to - trigger a probe here, we'll have at least one, and if they're not large -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index bb383acfae86..6f0b8c7107e7 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -837,6 +837,11 @@ struct GTY (()) aarch64_frame - /* The size of the callee-save registers with a slot in REG_OFFSET. */ - poly_int64 saved_regs_size; - -+ /* The number of bytes between the bottom of the static frame (the bottom -+ of the outgoing arguments) and the bottom of the register save area. -+ This value is always a multiple of STACK_BOUNDARY. */ -+ poly_int64 bytes_below_saved_regs; -+ - /* The size of the callee-save registers with a slot in REG_OFFSET that - are saved below the hard frame pointer. */ - poly_int64 below_hard_fp_saved_regs_size; --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0015-aarch64-Add-bytes_below_hard_fp-to-frame-info.patch b/packages/gcc/11.4.0/0015-aarch64-Add-bytes_below_hard_fp-to-frame-info.patch deleted file mode 100644 index 3c2bd77d..00000000 --- a/packages/gcc/11.4.0/0015-aarch64-Add-bytes_below_hard_fp-to-frame-info.patch +++ /dev/null @@ -1,84 +0,0 @@ -From d3f6ceecc8a7f128a9e6cb7d8aecf0de81ed9705 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:45 +0100 -Subject: [PATCH 15/29] aarch64: Add bytes_below_hard_fp to frame info - -Following on from the previous bytes_below_saved_regs patch, this one -records the number of bytes that are below the hard frame pointer. -This eventually replaces below_hard_fp_saved_regs_size. - -If a frame pointer is not needed, the epilogue adds final_adjust -to the stack pointer before restoring registers: - - aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); - -Therefore, if the epilogue needs to restore the stack pointer from -the hard frame pointer, the directly corresponding offset is: - - -bytes_below_hard_fp + final_adjust - -i.e. go from the hard frame pointer to the bottom of the frame, -then add the same amount as if we were using the stack pointer -from the outset. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New - field. - * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize it. - (aarch64_expand_epilogue): Use it instead of - below_hard_fp_saved_regs_size. ---- - gcc/config/aarch64/aarch64.c | 6 +++--- - gcc/config/aarch64/aarch64.h | 5 +++++ - 2 files changed, 8 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 8fa5a0b25455..e03adf57226f 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7528,6 +7528,7 @@ aarch64_layout_frame (void) - of the callee save area. */ - bool saves_below_hard_fp_p = maybe_ne (offset, 0); - frame.below_hard_fp_saved_regs_size = offset; -+ frame.bytes_below_hard_fp = offset + frame.bytes_below_saved_regs; - if (frame.emit_frame_chain) - { - /* FP and LR are placed in the linkage record. */ -@@ -9083,8 +9084,7 @@ aarch64_expand_epilogue (bool for_sibcall) - poly_int64 final_adjust = frame.final_adjust; - poly_int64 callee_offset = frame.callee_offset; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; -- poly_int64 below_hard_fp_saved_regs_size -- = frame.below_hard_fp_saved_regs_size; -+ poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; - unsigned reg1 = frame.wb_candidate1; - unsigned reg2 = frame.wb_candidate2; - rtx cfi_ops = NULL; -@@ -9140,7 +9140,7 @@ aarch64_expand_epilogue (bool for_sibcall) - is restored on the instruction doing the writeback. */ - aarch64_add_offset (Pmode, stack_pointer_rtx, - hard_frame_pointer_rtx, -- -callee_offset - below_hard_fp_saved_regs_size, -+ -bytes_below_hard_fp + final_adjust, - tmp1_rtx, tmp0_rtx, callee_adjust == 0); - else - /* The case where we need to re-use the register here is very rare, so -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 6f0b8c7107e7..21ac920a3fe1 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -846,6 +846,11 @@ struct GTY (()) aarch64_frame - are saved below the hard frame pointer. */ - poly_int64 below_hard_fp_saved_regs_size; - -+ /* The number of bytes between the bottom of the static frame (the bottom -+ of the outgoing arguments) and the hard frame pointer. This value is -+ always a multiple of STACK_BOUNDARY. */ -+ poly_int64 bytes_below_hard_fp; -+ - /* Offset from the base of the frame (incomming SP) to the - top of the locals area. This value is always a multiple of - STACK_BOUNDARY. */ --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0016-aarch64-Tweak-aarch64_save-restore_callee_saves.patch b/packages/gcc/11.4.0/0016-aarch64-Tweak-aarch64_save-restore_callee_saves.patch deleted file mode 100644 index 6367f16b..00000000 --- a/packages/gcc/11.4.0/0016-aarch64-Tweak-aarch64_save-restore_callee_saves.patch +++ /dev/null @@ -1,221 +0,0 @@ -From e8a7ec87fcdbaa5f7c7bd499aebe5cefacbf8687 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:46 +0100 -Subject: [PATCH 16/29] aarch64: Tweak aarch64_save/restore_callee_saves - -aarch64_save_callee_saves and aarch64_restore_callee_saves took -a parameter called start_offset that gives the offset of the -bottom of the saved register area from the current stack pointer. -However, it's more convenient for later patches if we use the -bottom of the entire frame as the reference point, rather than -the bottom of the saved registers. - -Doing that removes the need for the callee_offset field. -Other than that, this is not a win on its own. It only really -makes sense in combination with the follow-on patches. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete. - * config/aarch64/aarch64.c (aarch64_layout_frame): Remove - callee_offset handling. - (aarch64_save_callee_saves): Replace the start_offset parameter - with a bytes_below_sp parameter. - (aarch64_restore_callee_saves): Likewise. - (aarch64_expand_prologue): Update accordingly. - (aarch64_expand_epilogue): Likewise. ---- - gcc/config/aarch64/aarch64.c | 56 ++++++++++++++++++------------------ - gcc/config/aarch64/aarch64.h | 4 --- - 2 files changed, 28 insertions(+), 32 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index e03adf57226f..96e99f6c17ae 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7602,7 +7602,6 @@ aarch64_layout_frame (void) - frame.final_adjust = 0; - frame.callee_adjust = 0; - frame.sve_callee_adjust = 0; -- frame.callee_offset = 0; - - HOST_WIDE_INT max_push_offset = 0; - if (frame.wb_candidate2 != INVALID_REGNUM) -@@ -7642,7 +7641,6 @@ aarch64_layout_frame (void) - stp reg1, reg2, [sp, bytes_below_saved_regs] - stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ - frame.initial_adjust = frame.frame_size; -- frame.callee_offset = const_below_saved_regs; - } - else if (saves_below_hard_fp_p - && known_eq (frame.saved_regs_size, -@@ -7989,12 +7987,13 @@ aarch64_add_cfa_expression (rtx_insn *insn, rtx reg, - } - - /* Emit code to save the callee-saved registers from register number START -- to LIMIT to the stack at the location starting at offset START_OFFSET, -- skipping any write-back candidates if SKIP_WB is true. HARD_FP_VALID_P -- is true if the hard frame pointer has been set up. */ -+ to LIMIT to the stack. The stack pointer is currently BYTES_BELOW_SP -+ bytes above the bottom of the static frame. Skip any write-back -+ candidates if SKIP_WB is true. HARD_FP_VALID_P is true if the hard -+ frame pointer has been set up. */ - - static void --aarch64_save_callee_saves (poly_int64 start_offset, -+aarch64_save_callee_saves (poly_int64 bytes_below_sp, - unsigned start, unsigned limit, bool skip_wb, - bool hard_fp_valid_p) - { -@@ -8022,7 +8021,9 @@ aarch64_save_callee_saves (poly_int64 start_offset, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + frame.reg_offset[regno]; -+ offset = (frame.reg_offset[regno] -+ + frame.bytes_below_saved_regs -+ - bytes_below_sp); - rtx base_rtx = stack_pointer_rtx; - poly_int64 sp_offset = offset; - -@@ -8033,9 +8034,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - else if (GP_REGNUM_P (regno) - && (!offset.is_constant (&const_offset) || const_offset >= 512)) - { -- gcc_assert (known_eq (start_offset, 0)); -- poly_int64 fp_offset -- = frame.below_hard_fp_saved_regs_size; -+ poly_int64 fp_offset = frame.bytes_below_hard_fp - bytes_below_sp; - if (hard_fp_valid_p) - base_rtx = hard_frame_pointer_rtx; - else -@@ -8099,12 +8098,13 @@ aarch64_save_callee_saves (poly_int64 start_offset, - } - - /* Emit code to restore the callee registers from register number START -- up to and including LIMIT. Restore from the stack offset START_OFFSET, -- skipping any write-back candidates if SKIP_WB is true. Write the -- appropriate REG_CFA_RESTORE notes into CFI_OPS. */ -+ up to and including LIMIT. The stack pointer is currently BYTES_BELOW_SP -+ bytes above the bottom of the static frame. Skip any write-back -+ candidates if SKIP_WB is true. Write the appropriate REG_CFA_RESTORE -+ notes into CFI_OPS. */ - - static void --aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, -+aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, - unsigned limit, bool skip_wb, rtx *cfi_ops) - { - aarch64_frame &frame = cfun->machine->frame; -@@ -8130,7 +8130,9 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + frame.reg_offset[regno]; -+ offset = (frame.reg_offset[regno] -+ + frame.bytes_below_saved_regs -+ - bytes_below_sp); - rtx base_rtx = stack_pointer_rtx; - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, -@@ -8906,8 +8908,6 @@ aarch64_expand_prologue (void) - HOST_WIDE_INT callee_adjust = frame.callee_adjust; - poly_int64 final_adjust = frame.final_adjust; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; -- poly_int64 below_hard_fp_saved_regs_size -- = frame.below_hard_fp_saved_regs_size; - unsigned reg1 = frame.wb_candidate1; - unsigned reg2 = frame.wb_candidate2; - bool emit_frame_chain = frame.emit_frame_chain; -@@ -8979,8 +8979,8 @@ aarch64_expand_prologue (void) - - frame.hard_fp_offset); - gcc_assert (known_ge (chain_offset, 0)); - -- /* The offset of the bottom of the save area from the current SP. */ -- poly_int64 saved_regs_offset = chain_offset - below_hard_fp_saved_regs_size; -+ /* The offset of the current SP from the bottom of the static frame. */ -+ poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; - - if (emit_frame_chain) - { -@@ -8988,7 +8988,7 @@ aarch64_expand_prologue (void) - { - reg1 = R29_REGNUM; - reg2 = R30_REGNUM; -- aarch64_save_callee_saves (saved_regs_offset, reg1, reg2, -+ aarch64_save_callee_saves (bytes_below_sp, reg1, reg2, - false, false); - } - else -@@ -9028,7 +9028,7 @@ aarch64_expand_prologue (void) - emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); - } - -- aarch64_save_callee_saves (saved_regs_offset, R0_REGNUM, R30_REGNUM, -+ aarch64_save_callee_saves (bytes_below_sp, R0_REGNUM, R30_REGNUM, - callee_adjust != 0 || emit_frame_chain, - emit_frame_chain); - if (maybe_ne (sve_callee_adjust, 0)) -@@ -9038,16 +9038,17 @@ aarch64_expand_prologue (void) - aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, - sve_callee_adjust, - !frame_pointer_needed, false); -- saved_regs_offset += sve_callee_adjust; -+ bytes_below_sp -= sve_callee_adjust; - } -- aarch64_save_callee_saves (saved_regs_offset, P0_REGNUM, P15_REGNUM, -+ aarch64_save_callee_saves (bytes_below_sp, P0_REGNUM, P15_REGNUM, - false, emit_frame_chain); -- aarch64_save_callee_saves (saved_regs_offset, V0_REGNUM, V31_REGNUM, -+ aarch64_save_callee_saves (bytes_below_sp, V0_REGNUM, V31_REGNUM, - callee_adjust != 0 || emit_frame_chain, - emit_frame_chain); - - /* We may need to probe the final adjustment if it is larger than the guard - that is assumed by the called. */ -+ gcc_assert (known_eq (bytes_below_sp, final_adjust)); - aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, - !frame_pointer_needed, true); - } -@@ -9082,7 +9083,6 @@ aarch64_expand_epilogue (bool for_sibcall) - poly_int64 initial_adjust = frame.initial_adjust; - HOST_WIDE_INT callee_adjust = frame.callee_adjust; - poly_int64 final_adjust = frame.final_adjust; -- poly_int64 callee_offset = frame.callee_offset; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; - unsigned reg1 = frame.wb_candidate1; -@@ -9150,13 +9150,13 @@ aarch64_expand_epilogue (bool for_sibcall) - - /* Restore the vector registers before the predicate registers, - so that we can use P4 as a temporary for big-endian SVE frames. */ -- aarch64_restore_callee_saves (callee_offset, V0_REGNUM, V31_REGNUM, -+ aarch64_restore_callee_saves (final_adjust, V0_REGNUM, V31_REGNUM, - callee_adjust != 0, &cfi_ops); -- aarch64_restore_callee_saves (callee_offset, P0_REGNUM, P15_REGNUM, -+ aarch64_restore_callee_saves (final_adjust, P0_REGNUM, P15_REGNUM, - false, &cfi_ops); - if (maybe_ne (sve_callee_adjust, 0)) - aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); -- aarch64_restore_callee_saves (callee_offset - sve_callee_adjust, -+ aarch64_restore_callee_saves (final_adjust + sve_callee_adjust, - R0_REGNUM, R30_REGNUM, - callee_adjust != 0, &cfi_ops); - -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 21ac920a3fe1..57e672177456 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -873,10 +873,6 @@ struct GTY (()) aarch64_frame - It is zero when no push is used. */ - HOST_WIDE_INT callee_adjust; - -- /* The offset from SP to the callee-save registers after initial_adjust. -- It may be non-zero if no push is used (ie. callee_adjust == 0). */ -- poly_int64 callee_offset; -- - /* The size of the stack adjustment before saving or after restoring - SVE registers. */ - poly_int64 sve_callee_adjust; --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0017-aarch64-Only-calculate-chain_offset-if-there-is-a-ch.patch b/packages/gcc/11.4.0/0017-aarch64-Only-calculate-chain_offset-if-there-is-a-ch.patch deleted file mode 100644 index 8a50afce..00000000 --- a/packages/gcc/11.4.0/0017-aarch64-Only-calculate-chain_offset-if-there-is-a-ch.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 7356df0319aefe4c68ef57ec4c6bd18c72188a34 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:46 +0100 -Subject: [PATCH 17/29] aarch64: Only calculate chain_offset if there is a - chain - -After previous patches, it is no longer necessary to calculate -a chain_offset in cases where there is no chain record. - -gcc/ - * config/aarch64/aarch64.c (aarch64_expand_prologue): Move the - calculation of chain_offset into the emit_frame_chain block. ---- - gcc/config/aarch64/aarch64.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 96e99f6c17ae..cf5244b7ec08 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -8974,16 +8974,16 @@ aarch64_expand_prologue (void) - if (callee_adjust != 0) - aarch64_push_regs (reg1, reg2, callee_adjust); - -- /* The offset of the frame chain record (if any) from the current SP. */ -- poly_int64 chain_offset = (initial_adjust + callee_adjust -- - frame.hard_fp_offset); -- gcc_assert (known_ge (chain_offset, 0)); -- - /* The offset of the current SP from the bottom of the static frame. */ - poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; - - if (emit_frame_chain) - { -+ /* The offset of the frame chain record (if any) from the current SP. */ -+ poly_int64 chain_offset = (initial_adjust + callee_adjust -+ - frame.hard_fp_offset); -+ gcc_assert (known_ge (chain_offset, 0)); -+ - if (callee_adjust == 0) - { - reg1 = R29_REGNUM; --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0018-aarch64-Rename-locals_offset-to-bytes_above_locals.patch b/packages/gcc/11.4.0/0018-aarch64-Rename-locals_offset-to-bytes_above_locals.patch deleted file mode 100644 index 7c989274..00000000 --- a/packages/gcc/11.4.0/0018-aarch64-Rename-locals_offset-to-bytes_above_locals.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 82fb69e75c21010f7afc72bb842751164fe8fc72 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:46 +0100 -Subject: [PATCH 18/29] aarch64: Rename locals_offset to bytes_above_locals -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -locals_offset was described as: - - /* Offset from the base of the frame (incomming SP) to the - top of the locals area. This value is always a multiple of - STACK_BOUNDARY. */ - -This is implicitly an “upside down” view of the frame: the incoming -SP is at offset 0, and anything N bytes below the incoming SP is at -offset N (rather than -N). - -However, reg_offset instead uses a “right way up” view; that is, -it views offsets in address terms. Something above X is at a -positive offset from X and something below X is at a negative -offset from X. - -Also, even on FRAME_GROWS_DOWNWARD targets like AArch64, -target-independent code views offsets in address terms too: -locals are allocated at negative offsets to virtual_stack_vars. - -It seems confusing to have *_offset fields of the same structure -using different polarities like this. This patch tries to avoid -that by renaming locals_offset to bytes_above_locals. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to... - (aarch64_frame::bytes_above_locals): ...this. - * config/aarch64/aarch64.c (aarch64_layout_frame) - (aarch64_initial_elimination_offset): Update accordingly. ---- - gcc/config/aarch64/aarch64.c | 6 +++--- - gcc/config/aarch64/aarch64.h | 6 +++--- - 2 files changed, 6 insertions(+), 6 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index cf5244b7ec08..d54f7a89306f 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7596,7 +7596,7 @@ aarch64_layout_frame (void) - STACK_BOUNDARY / BITS_PER_UNIT)); - frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; - -- frame.locals_offset = frame.saved_varargs_size; -+ frame.bytes_above_locals = frame.saved_varargs_size; - - frame.initial_adjust = 0; - frame.final_adjust = 0; -@@ -11758,13 +11758,13 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to) - return frame.hard_fp_offset; - - if (from == FRAME_POINTER_REGNUM) -- return frame.hard_fp_offset - frame.locals_offset; -+ return frame.hard_fp_offset - frame.bytes_above_locals; - } - - if (to == STACK_POINTER_REGNUM) - { - if (from == FRAME_POINTER_REGNUM) -- return frame.frame_size - frame.locals_offset; -+ return frame.frame_size - frame.bytes_above_locals; - } - - return frame.frame_size; -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 57e672177456..3c5e3dd429dc 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -851,10 +851,10 @@ struct GTY (()) aarch64_frame - always a multiple of STACK_BOUNDARY. */ - poly_int64 bytes_below_hard_fp; - -- /* Offset from the base of the frame (incomming SP) to the -- top of the locals area. This value is always a multiple of -+ /* The number of bytes between the top of the locals area and the top -+ of the frame (the incomming SP). This value is always a multiple of - STACK_BOUNDARY. */ -- poly_int64 locals_offset; -+ poly_int64 bytes_above_locals; - - /* Offset from the base of the frame (incomming SP) to the - hard_frame_pointer. This value is always a multiple of --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0019-aarch64-Rename-hard_fp_offset-to-bytes_above_hard_fp.patch b/packages/gcc/11.4.0/0019-aarch64-Rename-hard_fp_offset-to-bytes_above_hard_fp.patch deleted file mode 100644 index e4c47306..00000000 --- a/packages/gcc/11.4.0/0019-aarch64-Rename-hard_fp_offset-to-bytes_above_hard_fp.patch +++ /dev/null @@ -1,148 +0,0 @@ -From fa6600b55b49ee14d8288f13719ceea2a75eea60 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:47 +0100 -Subject: [PATCH 19/29] aarch64: Rename hard_fp_offset to bytes_above_hard_fp -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Similarly to the previous locals_offset patch, hard_fp_offset -was described as: - - /* Offset from the base of the frame (incomming SP) to the - hard_frame_pointer. This value is always a multiple of - STACK_BOUNDARY. */ - poly_int64 hard_fp_offset; - -which again took an “upside-down” view: higher offsets meant lower -addresses. This patch renames the field to bytes_above_hard_fp instead. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename - to... - (aarch64_frame::bytes_above_hard_fp): ...this. - * config/aarch64/aarch64.c (aarch64_layout_frame) - (aarch64_expand_prologue): Update accordingly. - (aarch64_initial_elimination_offset): Likewise. ---- - gcc/config/aarch64/aarch64.c | 26 +++++++++++++------------- - gcc/config/aarch64/aarch64.h | 6 +++--- - 2 files changed, 16 insertions(+), 16 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index d54f7a89306f..23cb084e5a75 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7588,7 +7588,7 @@ aarch64_layout_frame (void) - + get_frame_size (), - STACK_BOUNDARY / BITS_PER_UNIT); - -- frame.hard_fp_offset -+ frame.bytes_above_hard_fp - = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; - - /* Both these values are already aligned. */ -@@ -7609,13 +7609,13 @@ aarch64_layout_frame (void) - else if (frame.wb_candidate1 != INVALID_REGNUM) - max_push_offset = 256; - -- HOST_WIDE_INT const_size, const_below_saved_regs, const_fp_offset; -+ HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; - HOST_WIDE_INT const_saved_regs_size; - if (known_eq (frame.saved_regs_size, 0)) - frame.initial_adjust = frame.frame_size; - else if (frame.frame_size.is_constant (&const_size) - && const_size < max_push_offset -- && known_eq (frame.hard_fp_offset, const_size)) -+ && known_eq (frame.bytes_above_hard_fp, const_size)) - { - /* Simple, small frame with no data below the saved registers. - -@@ -7632,8 +7632,8 @@ aarch64_layout_frame (void) - case that it hardly seems worth the effort though. */ - && (!saves_below_hard_fp_p || const_below_saved_regs == 0) - && !(cfun->calls_alloca -- && frame.hard_fp_offset.is_constant (&const_fp_offset) -- && const_fp_offset < max_push_offset)) -+ && frame.bytes_above_hard_fp.is_constant (&const_above_fp) -+ && const_above_fp < max_push_offset)) - { - /* Frame with small area below the saved registers: - -@@ -7651,12 +7651,12 @@ aarch64_layout_frame (void) - sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size - save SVE registers relative to SP - sub sp, sp, bytes_below_saved_regs */ -- frame.initial_adjust = (frame.hard_fp_offset -+ frame.initial_adjust = (frame.bytes_above_hard_fp - + frame.below_hard_fp_saved_regs_size); - frame.final_adjust = frame.bytes_below_saved_regs; - } -- else if (frame.hard_fp_offset.is_constant (&const_fp_offset) -- && const_fp_offset < max_push_offset) -+ else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) -+ && const_above_fp < max_push_offset) - { - /* Frame with large area below the saved registers, or with SVE saves, - but with a small area above: -@@ -7666,7 +7666,7 @@ aarch64_layout_frame (void) - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ -- frame.callee_adjust = const_fp_offset; -+ frame.callee_adjust = const_above_fp; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } -@@ -7681,7 +7681,7 @@ aarch64_layout_frame (void) - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ -- frame.initial_adjust = frame.hard_fp_offset; -+ frame.initial_adjust = frame.bytes_above_hard_fp; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } -@@ -8981,7 +8981,7 @@ aarch64_expand_prologue (void) - { - /* The offset of the frame chain record (if any) from the current SP. */ - poly_int64 chain_offset = (initial_adjust + callee_adjust -- - frame.hard_fp_offset); -+ - frame.bytes_above_hard_fp); - gcc_assert (known_ge (chain_offset, 0)); - - if (callee_adjust == 0) -@@ -11755,10 +11755,10 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to) - if (to == HARD_FRAME_POINTER_REGNUM) - { - if (from == ARG_POINTER_REGNUM) -- return frame.hard_fp_offset; -+ return frame.bytes_above_hard_fp; - - if (from == FRAME_POINTER_REGNUM) -- return frame.hard_fp_offset - frame.bytes_above_locals; -+ return frame.bytes_above_hard_fp - frame.bytes_above_locals; - } - - if (to == STACK_POINTER_REGNUM) -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 3c5e3dd429dc..9291cfd3ec8b 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -856,10 +856,10 @@ struct GTY (()) aarch64_frame - STACK_BOUNDARY. */ - poly_int64 bytes_above_locals; - -- /* Offset from the base of the frame (incomming SP) to the -- hard_frame_pointer. This value is always a multiple of -+ /* The number of bytes between the hard_frame_pointer and the top of -+ the frame (the incomming SP). This value is always a multiple of - STACK_BOUNDARY. */ -- poly_int64 hard_fp_offset; -+ poly_int64 bytes_above_hard_fp; - - /* The size of the frame. This value is the offset from base of the - frame (incomming SP) to the stack_pointer. This value is always --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0020-aarch64-Tweak-frame_size-comment.patch b/packages/gcc/11.4.0/0020-aarch64-Tweak-frame_size-comment.patch deleted file mode 100644 index d9f68fd2..00000000 --- a/packages/gcc/11.4.0/0020-aarch64-Tweak-frame_size-comment.patch +++ /dev/null @@ -1,35 +0,0 @@ -From b8cd5a0229da78c2d1289d54731fbef0126617d5 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:47 +0100 -Subject: [PATCH 20/29] aarch64: Tweak frame_size comment -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch fixes another case in which a value was described with -an “upside-down” view. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment. ---- - gcc/config/aarch64/aarch64.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 9291cfd3ec8b..82883ad5a0d8 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -861,8 +861,8 @@ struct GTY (()) aarch64_frame - STACK_BOUNDARY. */ - poly_int64 bytes_above_hard_fp; - -- /* The size of the frame. This value is the offset from base of the -- frame (incomming SP) to the stack_pointer. This value is always -+ /* The size of the frame, i.e. the number of bytes between the bottom -+ of the outgoing arguments and the incoming SP. This value is always - a multiple of STACK_BOUNDARY. */ - poly_int64 frame_size; - --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0021-aarch64-Measure-reg_offset-from-the-bottom-of-the-fr.patch b/packages/gcc/11.4.0/0021-aarch64-Measure-reg_offset-from-the-bottom-of-the-fr.patch deleted file mode 100644 index b0a2d328..00000000 --- a/packages/gcc/11.4.0/0021-aarch64-Measure-reg_offset-from-the-bottom-of-the-fr.patch +++ /dev/null @@ -1,196 +0,0 @@ -From 999c4a81cffddb850d6ab0f6d3a8de3e704d2f7a Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:48 +0100 -Subject: [PATCH 21/29] aarch64: Measure reg_offset from the bottom of the - frame - -reg_offset was measured from the bottom of the saved register area. -This made perfect sense with the original layout, since the bottom -of the saved register area was also the hard frame pointer address. -It became slightly less obvious with SVE, since we save SVE -registers below the hard frame pointer, but it still made sense. - -However, if we want to allow different frame layouts, it's more -convenient and obvious to measure reg_offset from the bottom of -the frame. After previous patches, it's also a slight simplification -in its own right. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame): Add comment above - reg_offset. - * config/aarch64/aarch64.c (aarch64_layout_frame): Walk offsets - from the bottom of the frame, rather than the bottom of the saved - register area. Measure reg_offset from the bottom of the frame - rather than the bottom of the saved register area. - (aarch64_save_callee_saves): Update accordingly. - (aarch64_restore_callee_saves): Likewise. - (aarch64_get_separate_components): Likewise. - (aarch64_process_components): Likewise. ---- - gcc/config/aarch64/aarch64.c | 53 ++++++++++++++++-------------------- - gcc/config/aarch64/aarch64.h | 3 ++ - 2 files changed, 27 insertions(+), 29 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 23cb084e5a75..45ff664cba6b 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7398,7 +7398,6 @@ aarch64_needs_frame_chain (void) - static void - aarch64_layout_frame (void) - { -- poly_int64 offset = 0; - int regno, last_fp_reg = INVALID_REGNUM; - machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM); - poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); -@@ -7476,7 +7475,9 @@ aarch64_layout_frame (void) - gcc_assert (crtl->is_leaf - || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); - -- frame.bytes_below_saved_regs = crtl->outgoing_args_size; -+ poly_int64 offset = crtl->outgoing_args_size; -+ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); -+ frame.bytes_below_saved_regs = offset; - - /* Now assign stack slots for the registers. Start with the predicate - registers, since predicate LDR and STR have a relatively small -@@ -7488,7 +7489,8 @@ aarch64_layout_frame (void) - offset += BYTES_PER_SVE_PRED; - } - -- if (maybe_ne (offset, 0)) -+ poly_int64 saved_prs_size = offset - frame.bytes_below_saved_regs; -+ if (maybe_ne (saved_prs_size, 0)) - { - /* If we have any vector registers to save above the predicate registers, - the offset of the vector register save slots need to be a multiple -@@ -7506,10 +7508,10 @@ aarch64_layout_frame (void) - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - else - { -- if (known_le (offset, vector_save_size)) -- offset = vector_save_size; -- else if (known_le (offset, vector_save_size * 2)) -- offset = vector_save_size * 2; -+ if (known_le (saved_prs_size, vector_save_size)) -+ offset = frame.bytes_below_saved_regs + vector_save_size; -+ else if (known_le (saved_prs_size, vector_save_size * 2)) -+ offset = frame.bytes_below_saved_regs + vector_save_size * 2; - else - gcc_unreachable (); - } -@@ -7526,9 +7528,10 @@ aarch64_layout_frame (void) - - /* OFFSET is now the offset of the hard frame pointer from the bottom - of the callee save area. */ -- bool saves_below_hard_fp_p = maybe_ne (offset, 0); -- frame.below_hard_fp_saved_regs_size = offset; -- frame.bytes_below_hard_fp = offset + frame.bytes_below_saved_regs; -+ frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; -+ bool saves_below_hard_fp_p -+ = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); -+ frame.bytes_below_hard_fp = offset; - if (frame.emit_frame_chain) - { - /* FP and LR are placed in the linkage record. */ -@@ -7579,9 +7582,10 @@ aarch64_layout_frame (void) - - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - -- frame.saved_regs_size = offset; -+ frame.saved_regs_size = offset - frame.bytes_below_saved_regs; - -- poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; -+ poly_int64 varargs_and_saved_regs_size -+ = frame.saved_regs_size + frame.saved_varargs_size; - - poly_int64 saved_regs_and_above - = aligned_upper_bound (varargs_and_saved_regs_size -@@ -8021,9 +8025,7 @@ aarch64_save_callee_saves (poly_int64 bytes_below_sp, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = (frame.reg_offset[regno] -- + frame.bytes_below_saved_regs -- - bytes_below_sp); -+ offset = frame.reg_offset[regno] - bytes_below_sp; - rtx base_rtx = stack_pointer_rtx; - poly_int64 sp_offset = offset; - -@@ -8130,9 +8132,7 @@ aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = (frame.reg_offset[regno] -- + frame.bytes_below_saved_regs -- - bytes_below_sp); -+ offset = frame.reg_offset[regno] - bytes_below_sp; - rtx base_rtx = stack_pointer_rtx; - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, -@@ -8271,14 +8271,12 @@ aarch64_get_separate_components (void) - it as a stack probe for -fstack-clash-protection. */ - if (flag_stack_clash_protection - && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) -- && known_eq (offset, 0)) -+ && known_eq (offset, frame.bytes_below_saved_regs)) - continue; - - /* Get the offset relative to the register we'll use. */ - if (frame_pointer_needed) -- offset -= frame.below_hard_fp_saved_regs_size; -- else -- offset += frame.bytes_below_saved_regs; -+ offset -= frame.bytes_below_hard_fp; - - /* Check that we can access the stack slot of the register with one - direct load with no adjustments needed. */ -@@ -8425,9 +8423,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - rtx reg = gen_rtx_REG (mode, regno); - poly_int64 offset = frame.reg_offset[regno]; - if (frame_pointer_needed) -- offset -= frame.below_hard_fp_saved_regs_size; -- else -- offset += frame.bytes_below_saved_regs; -+ offset -= frame.bytes_below_hard_fp; - - rtx addr = plus_constant (Pmode, ptr_reg, offset); - rtx mem = gen_frame_mem (mode, addr); -@@ -8479,9 +8475,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - /* REGNO2 can be saved/restored in a pair with REGNO. */ - rtx reg2 = gen_rtx_REG (mode, regno2); - if (frame_pointer_needed) -- offset2 -= frame.below_hard_fp_saved_regs_size; -- else -- offset2 += frame.bytes_below_saved_regs; -+ offset2 -= frame.bytes_below_hard_fp; - rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); - rtx mem2 = gen_frame_mem (mode, addr2); - rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) -@@ -8597,7 +8591,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - if (final_adjustment_p - && known_eq (frame.below_hard_fp_saved_regs_size, 0)) - { -- poly_int64 lr_offset = frame.reg_offset[LR_REGNUM]; -+ poly_int64 lr_offset = (frame.reg_offset[LR_REGNUM] -+ - frame.bytes_below_saved_regs); - if (known_ge (lr_offset, 0)) - min_probe_threshold -= lr_offset.to_constant (); - else -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 82883ad5a0d8..c8ec3d584957 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -826,6 +826,9 @@ extern enum aarch64_processor aarch64_tune; - #ifdef HAVE_POLY_INT_H - struct GTY (()) aarch64_frame - { -+ /* The offset from the bottom of the static frame (the bottom of the -+ outgoing arguments) of each register save slot, or -2 if no save is -+ needed. */ - poly_int64 reg_offset[LAST_SAVED_REGNUM + 1]; - - /* The number of extra stack bytes taken up by register varargs. --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0022-aarch64-Simplify-top-of-frame-allocation.patch b/packages/gcc/11.4.0/0022-aarch64-Simplify-top-of-frame-allocation.patch deleted file mode 100644 index 0f50f4d0..00000000 --- a/packages/gcc/11.4.0/0022-aarch64-Simplify-top-of-frame-allocation.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 8b664cc8f05c8130e8ca73a59ae2751cdef8a0ea Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:48 +0100 -Subject: [PATCH 22/29] aarch64: Simplify top of frame allocation - -After previous patches, it no longer really makes sense to allocate -the top of the frame in terms of varargs_and_saved_regs_size and -saved_regs_and_above. - -gcc/ - * config/aarch64/aarch64.c (aarch64_layout_frame): Simplify - the allocation of the top of the frame. ---- - gcc/config/aarch64/aarch64.c | 23 ++++++++--------------- - 1 file changed, 8 insertions(+), 15 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 45ff664cba6b..779547d03447 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7584,23 +7584,16 @@ aarch64_layout_frame (void) - - frame.saved_regs_size = offset - frame.bytes_below_saved_regs; - -- poly_int64 varargs_and_saved_regs_size -- = frame.saved_regs_size + frame.saved_varargs_size; -+ offset += get_frame_size (); -+ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -+ auto top_of_locals = offset; - -- poly_int64 saved_regs_and_above -- = aligned_upper_bound (varargs_and_saved_regs_size -- + get_frame_size (), -- STACK_BOUNDARY / BITS_PER_UNIT); -+ offset += frame.saved_varargs_size; -+ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); -+ frame.frame_size = offset; - -- frame.bytes_above_hard_fp -- = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; -- -- /* Both these values are already aligned. */ -- gcc_assert (multiple_p (frame.bytes_below_saved_regs, -- STACK_BOUNDARY / BITS_PER_UNIT)); -- frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; -- -- frame.bytes_above_locals = frame.saved_varargs_size; -+ frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; -+ frame.bytes_above_locals = frame.frame_size - top_of_locals; - - frame.initial_adjust = 0; - frame.final_adjust = 0; --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0023-aarch64-Minor-initial-adjustment-tweak.patch b/packages/gcc/11.4.0/0023-aarch64-Minor-initial-adjustment-tweak.patch deleted file mode 100644 index 89ee42e6..00000000 --- a/packages/gcc/11.4.0/0023-aarch64-Minor-initial-adjustment-tweak.patch +++ /dev/null @@ -1,38 +0,0 @@ -From bb4600071acc3a02db4f37ffb95c8495ad76a140 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:49 +0100 -Subject: [PATCH 23/29] aarch64: Minor initial adjustment tweak - -This patch just changes a calculation of initial_adjust -to one that makes it slightly more obvious that the total -adjustment is frame.frame_size. - -gcc/ - * config/aarch64/aarch64.c (aarch64_layout_frame): Tweak - calculation of initial_adjust for frames in which all saves - are SVE saves. ---- - gcc/config/aarch64/aarch64.c | 5 ++--- - 1 file changed, 2 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 779547d03447..0b8992ada747 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7645,11 +7645,10 @@ aarch64_layout_frame (void) - { - /* Frame in which all saves are SVE saves: - -- sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size -+ sub sp, sp, frame_size - bytes_below_saved_regs - save SVE registers relative to SP - sub sp, sp, bytes_below_saved_regs */ -- frame.initial_adjust = (frame.bytes_above_hard_fp -- + frame.below_hard_fp_saved_regs_size); -+ frame.initial_adjust = frame.frame_size - frame.bytes_below_saved_regs; - frame.final_adjust = frame.bytes_below_saved_regs; - } - else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0024-aarch64-Tweak-stack-clash-boundary-condition.patch b/packages/gcc/11.4.0/0024-aarch64-Tweak-stack-clash-boundary-condition.patch deleted file mode 100644 index eb77ea72..00000000 --- a/packages/gcc/11.4.0/0024-aarch64-Tweak-stack-clash-boundary-condition.patch +++ /dev/null @@ -1,125 +0,0 @@ -From f22329d5efbacf80edf4a2d45ebadd93f283252c Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:49 +0100 -Subject: [PATCH 24/29] aarch64: Tweak stack clash boundary condition - -The AArch64 ABI says that, when stack clash protection is used, -there can be a maximum of 1KiB of unprobed space at sp on entry -to a function. Therefore, we need to probe when allocating ->= guard_size - 1KiB of data (>= rather than >). This is what -GCC does. - -If an allocation is exactly guard_size bytes, it is enough to allocate -those bytes and probe once at offset 1024. It isn't possible to use a -single probe at any other offset: higher would conmplicate later code, -by leaving more unprobed space than usual, while lower would risk -leaving an entire page unprobed. For simplicity, the code probes all -allocations at offset 1024. - -Some register saves also act as probes. If we need to allocate -more space below the last such register save probe, we need to -probe the allocation if it is > 1KiB. Again, this allocation is -then sometimes (but not always) probed at offset 1024. This sort of -allocation is currently only used for outgoing arguments, which are -rarely this big. - -However, the code also probed if this final outgoing-arguments -allocation was == 1KiB, rather than just > 1KiB. This isn't -necessary, since the register save then probes at offset 1024 -as required. Continuing to probe allocations of exactly 1KiB -would complicate later patches. - -gcc/ - * config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): - Don't probe final allocations that are exactly 1KiB in size (after - unprobed space above the final allocation has been deducted). - -gcc/testsuite/ - * gcc.target/aarch64/stack-check-prologue-17.c: New test. ---- - gcc/config/aarch64/aarch64.c | 4 +- - .../aarch64/stack-check-prologue-17.c | 55 +++++++++++++++++++ - 2 files changed, 58 insertions(+), 1 deletion(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 0b8992ada747..bfd248761951 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -8564,9 +8564,11 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - HOST_WIDE_INT guard_size - = 1 << param_stack_clash_protection_guard_size; - HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; -+ HOST_WIDE_INT byte_sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT; -+ gcc_assert (multiple_p (poly_size, byte_sp_alignment)); - HOST_WIDE_INT min_probe_threshold - = (final_adjustment_p -- ? guard_used_by_caller -+ ? guard_used_by_caller + byte_sp_alignment - : guard_size - guard_used_by_caller); - /* When doing the final adjustment for the outgoing arguments, take into - account any unprobed space there is above the current SP. There are -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -new file mode 100644 -index 000000000000..0d8a25d73a24 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -@@ -0,0 +1,55 @@ -+/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void f(int, ...); -+void g(); -+ -+/* -+** test1: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1024 -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test1(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test2: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1040 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test2(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x); -+ } -+ g(); -+ return 1; -+} --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0025-aarch64-Put-LR-save-probe-in-first-16-bytes.patch b/packages/gcc/11.4.0/0025-aarch64-Put-LR-save-probe-in-first-16-bytes.patch deleted file mode 100644 index ca10742e..00000000 --- a/packages/gcc/11.4.0/0025-aarch64-Put-LR-save-probe-in-first-16-bytes.patch +++ /dev/null @@ -1,263 +0,0 @@ -From 174a9747491e591ef2abb3e20a0332303f11003a Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:49 +0100 -Subject: [PATCH 25/29] aarch64: Put LR save probe in first 16 bytes - --fstack-clash-protection uses the save of LR as a probe for the next -allocation. The next allocation could be: - -* another part of the static frame, e.g. when allocating SVE save slots - or outgoing arguments - -* an alloca in the same function - -* an allocation made by a callee function - -However, when -fomit-frame-pointer is used, the LR save slot is placed -above the other GPR save slots. It could therefore be up to 80 bytes -above the base of the GPR save area (which is also the hard fp address). - -aarch64_allocate_and_probe_stack_space took this into account when -deciding how much subsequent space could be allocated without needing -a probe. However, it interacted badly with: - - /* If doing a small final adjustment, we always probe at offset 0. - This is done to avoid issues when LR is not at position 0 or when - the final adjustment is smaller than the probing offset. */ - else if (final_adjustment_p && rounded_size == 0) - residual_probe_offset = 0; - -which forces any allocation that is smaller than the guard page size -to be probed at offset 0 rather than the usual offset 1024. It was -therefore possible to construct cases in which we had: - -* a probe using LR at SP + 80 bytes (or some other value >= 16) -* an allocation of the guard page size - 16 bytes -* a probe at SP + 0 - -which allocates guard page size + 64 consecutive unprobed bytes. - -This patch requires the LR probe to be in the first 16 bytes of the -save area when stack clash protection is active. Doing it -unconditionally would cause code-quality regressions, but a later -patch deals with that. - -The new comment doesn't say that the probe register is required -to be LR, since a later patch removes that restriction. - -gcc/ - * config/aarch64/aarch64.c (aarch64_layout_frame): Ensure that - the LR save slot is in the first 16 bytes of the register save area. - (aarch64_allocate_and_probe_stack_space): Remove workaround for - when LR was not in the first 16 bytes. - -gcc/testsuite/ - * gcc.target/aarch64/stack-check-prologue-18.c: New test. ---- - gcc/config/aarch64/aarch64.c | 61 ++++------- - .../aarch64/stack-check-prologue-18.c | 100 ++++++++++++++++++ - 2 files changed, 123 insertions(+), 38 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index bfd248761951..3f2b10de987d 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7532,26 +7532,34 @@ aarch64_layout_frame (void) - bool saves_below_hard_fp_p - = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); - frame.bytes_below_hard_fp = offset; -+ -+ auto allocate_gpr_slot = [&](unsigned int regno) -+ { -+ frame.reg_offset[regno] = offset; -+ if (frame.wb_candidate1 == INVALID_REGNUM) -+ frame.wb_candidate1 = regno; -+ else if (frame.wb_candidate2 == INVALID_REGNUM) -+ frame.wb_candidate2 = regno; -+ offset += UNITS_PER_WORD; -+ }; -+ - if (frame.emit_frame_chain) - { - /* FP and LR are placed in the linkage record. */ -- frame.reg_offset[R29_REGNUM] = offset; -- frame.wb_candidate1 = R29_REGNUM; -- frame.reg_offset[R30_REGNUM] = offset + UNITS_PER_WORD; -- frame.wb_candidate2 = R30_REGNUM; -- offset += 2 * UNITS_PER_WORD; -+ allocate_gpr_slot (R29_REGNUM); -+ allocate_gpr_slot (R30_REGNUM); - } -+ else if (flag_stack_clash_protection -+ && known_eq (frame.reg_offset[R30_REGNUM], SLOT_REQUIRED)) -+ /* Put the LR save slot first, since it makes a good choice of probe -+ for stack clash purposes. The idea is that the link register usually -+ has to be saved before a call anyway, and so we lose little by -+ stopping it from being individually shrink-wrapped. */ -+ allocate_gpr_slot (R30_REGNUM); - - for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) -- { -- frame.reg_offset[regno] = offset; -- if (frame.wb_candidate1 == INVALID_REGNUM) -- frame.wb_candidate1 = regno; -- else if (frame.wb_candidate2 == INVALID_REGNUM) -- frame.wb_candidate2 = regno; -- offset += UNITS_PER_WORD; -- } -+ allocate_gpr_slot (regno); - - poly_int64 max_int_offset = offset; - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -@@ -8570,29 +8578,6 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - = (final_adjustment_p - ? guard_used_by_caller + byte_sp_alignment - : guard_size - guard_used_by_caller); -- /* When doing the final adjustment for the outgoing arguments, take into -- account any unprobed space there is above the current SP. There are -- two cases: -- -- - When saving SVE registers below the hard frame pointer, we force -- the lowest save to take place in the prologue before doing the final -- adjustment (i.e. we don't allow the save to be shrink-wrapped). -- This acts as a probe at SP, so there is no unprobed space. -- -- - When there are no SVE register saves, we use the store of the link -- register as a probe. We can't assume that LR was saved at position 0 -- though, so treat any space below it as unprobed. */ -- if (final_adjustment_p -- && known_eq (frame.below_hard_fp_saved_regs_size, 0)) -- { -- poly_int64 lr_offset = (frame.reg_offset[LR_REGNUM] -- - frame.bytes_below_saved_regs); -- if (known_ge (lr_offset, 0)) -- min_probe_threshold -= lr_offset.to_constant (); -- else -- gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); -- } -- - poly_int64 frame_size = frame.frame_size; - - /* We should always have a positive probe threshold. */ -@@ -8772,8 +8757,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - if (final_adjustment_p && rounded_size != 0) - min_probe_threshold = 0; - /* If doing a small final adjustment, we always probe at offset 0. -- This is done to avoid issues when LR is not at position 0 or when -- the final adjustment is smaller than the probing offset. */ -+ This is done to avoid issues when the final adjustment is smaller -+ than the probing offset. */ - else if (final_adjustment_p && rounded_size == 0) - residual_probe_offset = 0; - -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -new file mode 100644 -index 000000000000..82447d20fff5 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -@@ -0,0 +1,100 @@ -+/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void f(int, ...); -+void g(); -+ -+/* -+** test1: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #4064 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+** str x26, \[sp, #?4128\] -+** ... -+*/ -+int test1(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test2: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1040 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test2(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test3: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1024 -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test3(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0026-aarch64-Simplify-probe-of-final-frame-allocation.patch b/packages/gcc/11.4.0/0026-aarch64-Simplify-probe-of-final-frame-allocation.patch deleted file mode 100644 index f3cfd734..00000000 --- a/packages/gcc/11.4.0/0026-aarch64-Simplify-probe-of-final-frame-allocation.patch +++ /dev/null @@ -1,99 +0,0 @@ -From e932e11c353be52256dd30d30d924f4e834e3ca3 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:51 +0100 -Subject: [PATCH 26/29] aarch64: Simplify probe of final frame allocation - -Previous patches ensured that the final frame allocation only needs -a probe when the size is strictly greater than 1KiB. It's therefore -safe to use the normal 1024 probe offset in all cases. - -The main motivation for doing this is to simplify the code and -remove the number of special cases. - -gcc/ - * config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): - Always probe the residual allocation at offset 1024, asserting - that that is in range. - -gcc/testsuite/ - * gcc.target/aarch64/stack-check-prologue-17.c: Expect the probe - to be at offset 1024 rather than offset 0. - * gcc.target/aarch64/stack-check-prologue-18.c: Likewise. ---- - gcc/config/aarch64/aarch64.c | 12 ++++-------- - .../gcc.target/aarch64/stack-check-prologue-17.c | 2 +- - .../gcc.target/aarch64/stack-check-prologue-18.c | 4 ++-- - 3 files changed, 7 insertions(+), 11 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 3f2b10de987d..4b9cd687525e 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -8751,16 +8751,12 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - are still safe. */ - if (residual) - { -- HOST_WIDE_INT residual_probe_offset = guard_used_by_caller; -+ gcc_assert (guard_used_by_caller + byte_sp_alignment <= size); -+ - /* If we're doing final adjustments, and we've done any full page - allocations then any residual needs to be probed. */ - if (final_adjustment_p && rounded_size != 0) - min_probe_threshold = 0; -- /* If doing a small final adjustment, we always probe at offset 0. -- This is done to avoid issues when the final adjustment is smaller -- than the probing offset. */ -- else if (final_adjustment_p && rounded_size == 0) -- residual_probe_offset = 0; - - aarch64_sub_sp (temp1, temp2, residual, frame_related_p); - if (residual >= min_probe_threshold) -@@ -8771,8 +8767,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required." - "\n", residual); - -- emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, -- residual_probe_offset)); -+ emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, -+ guard_used_by_caller)); - emit_insn (gen_blockage ()); - } - } -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -index 0d8a25d73a24..f0ec1389771d 100644 ---- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -@@ -33,7 +33,7 @@ int test1(int z) { - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #1040 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -index 82447d20fff5..6383bec5ebcd 100644 ---- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -@@ -9,7 +9,7 @@ void g(); - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #4064 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -@@ -50,7 +50,7 @@ int test1(int z) { - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #1040 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0027-aarch64-Explicitly-record-probe-registers-in-frame-i.patch b/packages/gcc/11.4.0/0027-aarch64-Explicitly-record-probe-registers-in-frame-i.patch deleted file mode 100644 index 29e673a6..00000000 --- a/packages/gcc/11.4.0/0027-aarch64-Explicitly-record-probe-registers-in-frame-i.patch +++ /dev/null @@ -1,278 +0,0 @@ -From 9ed9fd54b2b471745c9489e83496c091a7b64904 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:52 +0100 -Subject: [PATCH 27/29] aarch64: Explicitly record probe registers in frame - info - -The stack frame is currently divided into three areas: - -A: the area above the hard frame pointer -B: the SVE saves below the hard frame pointer -C: the outgoing arguments - -If the stack frame is allocated in one chunk, the allocation needs a -probe if the frame size is >= guard_size - 1KiB. In addition, if the -function is not a leaf function, it must probe an address no more than -1KiB above the outgoing SP. We ensured the second condition by - -(1) using single-chunk allocations for non-leaf functions only if - the link register save slot is within 512 bytes of the bottom - of the frame; and - -(2) using the link register save as a probe (meaning, for instance, - that it can't be individually shrink wrapped) - -If instead the stack is allocated in multiple chunks, then: - -* an allocation involving only the outgoing arguments (C above) requires - a probe if the allocation size is > 1KiB - -* any other allocation requires a probe if the allocation size - is >= guard_size - 1KiB - -* second and subsequent allocations require the previous allocation - to probe at the bottom of the allocated area, regardless of the size - of that previous allocation - -The final point means that, unlike for single allocations, -it can be necessary to have both a non-SVE register probe and -an SVE register probe. For example: - -* allocate A, probe using a non-SVE register save -* allocate B, probe using an SVE register save -* allocate C - -The non-SVE register used in this case was again the link register. -It was previously used even if the link register save slot was some -bytes above the bottom of the non-SVE register saves, but an earlier -patch avoided that by putting the link register save slot first. - -As a belt-and-braces fix, this patch explicitly records which -probe registers we're using and allows the non-SVE probe to be -whichever register comes first (as for SVE). - -The patch also avoids unnecessary probes in sve/pcs/stack_clash_3.c. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe) - (aarch64_frame::hard_fp_save_and_probe): New fields. - * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize them. - Rather than asserting that a leaf function saves LR, instead assert - that a leaf function saves something. - (aarch64_get_separate_components): Prevent the chosen probe - registers from being individually shrink-wrapped. - (aarch64_allocate_and_probe_stack_space): Remove workaround for - probe registers that aren't at the bottom of the previous allocation. - -gcc/testsuite/ - * gcc.target/aarch64/sve/pcs/stack_clash_3.c: Avoid redundant probes. ---- - gcc/config/aarch64/aarch64.c | 68 +++++++++++++++---- - gcc/config/aarch64/aarch64.h | 8 +++ - .../aarch64/sve/pcs/stack_clash_3.c | 6 +- - 3 files changed, 64 insertions(+), 18 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 4b9cd687525e..ef4b3b671ba2 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7469,15 +7469,11 @@ aarch64_layout_frame (void) - && !crtl->abi->clobbers_full_reg_p (regno)) - frame.reg_offset[regno] = SLOT_REQUIRED; - -- /* With stack-clash, LR must be saved in non-leaf functions. The saving of -- LR counts as an implicit probe which allows us to maintain the invariant -- described in the comment at expand_prologue. */ -- gcc_assert (crtl->is_leaf -- || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); - - poly_int64 offset = crtl->outgoing_args_size; - gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); - frame.bytes_below_saved_regs = offset; -+ frame.sve_save_and_probe = INVALID_REGNUM; - - /* Now assign stack slots for the registers. Start with the predicate - registers, since predicate LDR and STR have a relatively small -@@ -7485,6 +7481,8 @@ aarch64_layout_frame (void) - for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { -+ if (frame.sve_save_and_probe == INVALID_REGNUM) -+ frame.sve_save_and_probe = regno; - frame.reg_offset[regno] = offset; - offset += BYTES_PER_SVE_PRED; - } -@@ -7522,6 +7520,8 @@ aarch64_layout_frame (void) - for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { -+ if (frame.sve_save_and_probe == INVALID_REGNUM) -+ frame.sve_save_and_probe = regno; - frame.reg_offset[regno] = offset; - offset += vector_save_size; - } -@@ -7531,10 +7531,18 @@ aarch64_layout_frame (void) - frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; - bool saves_below_hard_fp_p - = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); -+ gcc_assert (!saves_below_hard_fp_p -+ || (frame.sve_save_and_probe != INVALID_REGNUM -+ && known_eq (frame.reg_offset[frame.sve_save_and_probe], -+ frame.bytes_below_saved_regs))); -+ - frame.bytes_below_hard_fp = offset; -+ frame.hard_fp_save_and_probe = INVALID_REGNUM; - - auto allocate_gpr_slot = [&](unsigned int regno) - { -+ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) -+ frame.hard_fp_save_and_probe = regno; - frame.reg_offset[regno] = offset; - if (frame.wb_candidate1 == INVALID_REGNUM) - frame.wb_candidate1 = regno; -@@ -7568,6 +7576,8 @@ aarch64_layout_frame (void) - for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { -+ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) -+ frame.hard_fp_save_and_probe = regno; - /* If there is an alignment gap between integer and fp callee-saves, - allocate the last fp register to it if possible. */ - if (regno == last_fp_reg -@@ -7591,6 +7601,17 @@ aarch64_layout_frame (void) - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - - frame.saved_regs_size = offset - frame.bytes_below_saved_regs; -+ gcc_assert (known_eq (frame.saved_regs_size, -+ frame.below_hard_fp_saved_regs_size) -+ || (frame.hard_fp_save_and_probe != INVALID_REGNUM -+ && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], -+ frame.bytes_below_hard_fp))); -+ -+ /* With stack-clash, a register must be saved in non-leaf functions. -+ The saving of the bottommost register counts as an implicit probe, -+ which allows us to maintain the invariant described in the comment -+ at expand_prologue. */ -+ gcc_assert (crtl->is_leaf || maybe_ne (frame.saved_regs_size, 0)); - - offset += get_frame_size (); - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -@@ -7690,6 +7711,25 @@ aarch64_layout_frame (void) - frame.final_adjust = frame.bytes_below_saved_regs; - } - -+ /* The frame is allocated in pieces, with each non-final piece -+ including a register save at offset 0 that acts as a probe for -+ the following piece. In addition, the save of the bottommost register -+ acts as a probe for callees and allocas. Roll back any probes that -+ aren't needed. -+ -+ A probe isn't needed if it is associated with the final allocation -+ (including callees and allocas) that happens before the epilogue is -+ executed. */ -+ if (crtl->is_leaf -+ && !cfun->calls_alloca -+ && known_eq (frame.final_adjust, 0)) -+ { -+ if (maybe_ne (frame.sve_callee_adjust, 0)) -+ frame.sve_save_and_probe = INVALID_REGNUM; -+ else -+ frame.hard_fp_save_and_probe = INVALID_REGNUM; -+ } -+ - /* Make sure the individual adjustments add up to the full frame size. */ - gcc_assert (known_eq (frame.initial_adjust - + frame.callee_adjust -@@ -8267,13 +8307,6 @@ aarch64_get_separate_components (void) - - poly_int64 offset = frame.reg_offset[regno]; - -- /* If the register is saved in the first SVE save slot, we use -- it as a stack probe for -fstack-clash-protection. */ -- if (flag_stack_clash_protection -- && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) -- && known_eq (offset, frame.bytes_below_saved_regs)) -- continue; -- - /* Get the offset relative to the register we'll use. */ - if (frame_pointer_needed) - offset -= frame.bytes_below_hard_fp; -@@ -8308,6 +8341,13 @@ aarch64_get_separate_components (void) - - bitmap_clear_bit (components, LR_REGNUM); - bitmap_clear_bit (components, SP_REGNUM); -+ if (flag_stack_clash_protection) -+ { -+ if (frame.sve_save_and_probe != INVALID_REGNUM) -+ bitmap_clear_bit (components, frame.sve_save_and_probe); -+ if (frame.hard_fp_save_and_probe != INVALID_REGNUM) -+ bitmap_clear_bit (components, frame.hard_fp_save_and_probe); -+ } - - return components; - } -@@ -8844,8 +8884,8 @@ aarch64_epilogue_uses (int regno) - When probing is needed, we emit a probe at the start of the prologue - and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter. - -- We have to track how much space has been allocated and the only stores -- to the stack we track as implicit probes are the FP/LR stores. -+ We can also use register saves as probes. These are stored in -+ sve_save_and_probe and hard_fp_save_and_probe. - - For outgoing arguments we probe if the size is larger than 1KB, such that - the ABI specified buffer is maintained for the next callee. -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index c8ec3d584957..97173e48598b 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -911,6 +911,14 @@ struct GTY (()) aarch64_frame - This is the register they should use. */ - unsigned spare_pred_reg; - -+ /* An SVE register that is saved below the hard frame pointer and that acts -+ as a probe for later allocations, or INVALID_REGNUM if none. */ -+ unsigned sve_save_and_probe; -+ -+ /* A register that is saved at the hard frame pointer and that acts -+ as a probe for later allocations, or INVALID_REGNUM if none. */ -+ unsigned hard_fp_save_and_probe; -+ - bool laid_out; - }; - -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c -index 3e01ec36c3a4..3530a0d504ba 100644 ---- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c -+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c -@@ -11,11 +11,10 @@ - ** mov x11, sp - ** ... - ** sub sp, sp, x13 --** str p4, \[sp\] - ** cbz w0, [^\n]* -+** str p4, \[sp\] - ** ... - ** ptrue p0\.b, all --** ldr p4, \[sp\] - ** addvl sp, sp, #1 - ** ldr x24, \[sp\], 32 - ** ret -@@ -39,13 +38,12 @@ test_1 (int n) - ** mov x11, sp - ** ... - ** sub sp, sp, x13 --** str p4, \[sp\] - ** cbz w0, [^\n]* -+** str p4, \[sp\] - ** str p5, \[sp, #1, mul vl\] - ** str p6, \[sp, #2, mul vl\] - ** ... - ** ptrue p0\.b, all --** ldr p4, \[sp\] - ** addvl sp, sp, #1 - ** ldr x24, \[sp\], 32 - ** ret --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0028-aarch64-Remove-below_hard_fp_saved_regs_size.patch b/packages/gcc/11.4.0/0028-aarch64-Remove-below_hard_fp_saved_regs_size.patch deleted file mode 100644 index 6019b6ea..00000000 --- a/packages/gcc/11.4.0/0028-aarch64-Remove-below_hard_fp_saved_regs_size.patch +++ /dev/null @@ -1,157 +0,0 @@ -From 4bbf7b6cdd02b0d547ddd6a630f2065680bf2f6b Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:52 +0100 -Subject: [PATCH 28/29] aarch64: Remove below_hard_fp_saved_regs_size - -After previous patches, it's no longer necessary to store -saved_regs_size and below_hard_fp_saved_regs_size in the frame info. -All measurements instead use the top or bottom of the frame as -reference points. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size) - (aarch64_frame::below_hard_fp_saved_regs_size): Delete. - * config/aarch64/aarch64.c (aarch64_layout_frame): Update accordingly. ---- - gcc/config/aarch64/aarch64.c | 45 +++++++++++++++++------------------- - gcc/config/aarch64/aarch64.h | 7 ------ - 2 files changed, 21 insertions(+), 31 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index ef4b3b671ba2..385718a475b6 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7528,9 +7528,8 @@ aarch64_layout_frame (void) - - /* OFFSET is now the offset of the hard frame pointer from the bottom - of the callee save area. */ -- frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; -- bool saves_below_hard_fp_p -- = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); -+ auto below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; -+ bool saves_below_hard_fp_p = maybe_ne (below_hard_fp_saved_regs_size, 0); - gcc_assert (!saves_below_hard_fp_p - || (frame.sve_save_and_probe != INVALID_REGNUM - && known_eq (frame.reg_offset[frame.sve_save_and_probe], -@@ -7600,9 +7599,8 @@ aarch64_layout_frame (void) - - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - -- frame.saved_regs_size = offset - frame.bytes_below_saved_regs; -- gcc_assert (known_eq (frame.saved_regs_size, -- frame.below_hard_fp_saved_regs_size) -+ auto saved_regs_size = offset - frame.bytes_below_saved_regs; -+ gcc_assert (known_eq (saved_regs_size, below_hard_fp_saved_regs_size) - || (frame.hard_fp_save_and_probe != INVALID_REGNUM - && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], - frame.bytes_below_hard_fp))); -@@ -7611,7 +7609,7 @@ aarch64_layout_frame (void) - The saving of the bottommost register counts as an implicit probe, - which allows us to maintain the invariant described in the comment - at expand_prologue. */ -- gcc_assert (crtl->is_leaf || maybe_ne (frame.saved_regs_size, 0)); -+ gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); - - offset += get_frame_size (); - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -@@ -7637,7 +7635,7 @@ aarch64_layout_frame (void) - - HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; - HOST_WIDE_INT const_saved_regs_size; -- if (known_eq (frame.saved_regs_size, 0)) -+ if (known_eq (saved_regs_size, 0)) - frame.initial_adjust = frame.frame_size; - else if (frame.frame_size.is_constant (&const_size) - && const_size < max_push_offset -@@ -7650,7 +7648,7 @@ aarch64_layout_frame (void) - frame.callee_adjust = const_size; - } - else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) -- && frame.saved_regs_size.is_constant (&const_saved_regs_size) -+ && saved_regs_size.is_constant (&const_saved_regs_size) - && const_below_saved_regs + const_saved_regs_size < 512 - /* We could handle this case even with data below the saved - registers, provided that that data left us with valid offsets -@@ -7669,8 +7667,7 @@ aarch64_layout_frame (void) - frame.initial_adjust = frame.frame_size; - } - else if (saves_below_hard_fp_p -- && known_eq (frame.saved_regs_size, -- frame.below_hard_fp_saved_regs_size)) -+ && known_eq (saved_regs_size, below_hard_fp_saved_regs_size)) - { - /* Frame in which all saves are SVE saves: - -@@ -7692,7 +7689,7 @@ aarch64_layout_frame (void) - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ - frame.callee_adjust = const_above_fp; -- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -+ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } - else -@@ -7707,7 +7704,7 @@ aarch64_layout_frame (void) - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ - frame.initial_adjust = frame.bytes_above_hard_fp; -- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -+ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } - -@@ -8849,17 +8846,17 @@ aarch64_epilogue_uses (int regno) - | local variables | <-- frame_pointer_rtx - | | - +-------------------------------+ -- | padding | \ -- +-------------------------------+ | -- | callee-saved registers | | frame.saved_regs_size -- +-------------------------------+ | -- | LR' | | -- +-------------------------------+ | -- | FP' | | -- +-------------------------------+ |<- hard_frame_pointer_rtx (aligned) -- | SVE vector registers | | \ -- +-------------------------------+ | | below_hard_fp_saved_regs_size -- | SVE predicate registers | / / -+ | padding | -+ +-------------------------------+ -+ | callee-saved registers | -+ +-------------------------------+ -+ | LR' | -+ +-------------------------------+ -+ | FP' | -+ +-------------------------------+ <-- hard_frame_pointer_rtx (aligned) -+ | SVE vector registers | -+ +-------------------------------+ -+ | SVE predicate registers | - +-------------------------------+ - | dynamic allocation | - +-------------------------------+ -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 97173e48598b..9084b1cfb9d0 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -837,18 +837,11 @@ struct GTY (()) aarch64_frame - STACK_BOUNDARY. */ - HOST_WIDE_INT saved_varargs_size; - -- /* The size of the callee-save registers with a slot in REG_OFFSET. */ -- poly_int64 saved_regs_size; -- - /* The number of bytes between the bottom of the static frame (the bottom - of the outgoing arguments) and the bottom of the register save area. - This value is always a multiple of STACK_BOUNDARY. */ - poly_int64 bytes_below_saved_regs; - -- /* The size of the callee-save registers with a slot in REG_OFFSET that -- are saved below the hard frame pointer. */ -- poly_int64 below_hard_fp_saved_regs_size; -- - /* The number of bytes between the bottom of the static frame (the bottom - of the outgoing arguments) and the hard frame pointer. This value is - always a multiple of STACK_BOUNDARY. */ --- -2.42.0 - diff --git a/packages/gcc/11.4.0/0029-aarch64-Make-stack-smash-canary-protect-saved-regist.patch b/packages/gcc/11.4.0/0029-aarch64-Make-stack-smash-canary-protect-saved-regist.patch deleted file mode 100644 index 520c1f02..00000000 --- a/packages/gcc/11.4.0/0029-aarch64-Make-stack-smash-canary-protect-saved-regist.patch +++ /dev/null @@ -1,299 +0,0 @@ -From bea0985749c12fcc264710586addb7838cc61e6d Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:19:52 +0100 -Subject: [PATCH 29/29] aarch64: Make stack smash canary protect saved - registers - -AArch64 normally puts the saved registers near the bottom of the frame, -immediately above any dynamic allocations. But this means that a -stack-smash attack on those dynamic allocations could overwrite the -saved registers without needing to reach as far as the stack smash -canary. - -The same thing could also happen for variable-sized arguments that are -passed by value, since those are allocated before a call and popped on -return. - -This patch avoids that by putting the locals (and thus the canary) below -the saved registers when stack smash protection is active. - -The patch fixes CVE-2023-4039. - -gcc/ - * config/aarch64/aarch64.c (aarch64_save_regs_above_locals_p): - New function. - (aarch64_layout_frame): Use it to decide whether locals should - go above or below the saved registers. - (aarch64_expand_prologue): Update stack layout comment. - Emit a stack tie after the final adjustment. - -gcc/testsuite/ - * gcc.target/aarch64/stack-protector-8.c: New test. - * gcc.target/aarch64/stack-protector-9.c: Likewise. ---- - gcc/config/aarch64/aarch64.c | 46 +++++++-- - .../gcc.target/aarch64/stack-protector-8.c | 95 +++++++++++++++++++ - .../gcc.target/aarch64/stack-protector-9.c | 33 +++++++ - 3 files changed, 168 insertions(+), 6 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-8.c - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-9.c - -diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c -index 385718a475b6..3ccfd3c30fc7 100644 ---- a/gcc/config/aarch64/aarch64.c -+++ b/gcc/config/aarch64/aarch64.c -@@ -7392,6 +7392,20 @@ aarch64_needs_frame_chain (void) - return aarch64_use_frame_pointer; - } - -+/* Return true if the current function should save registers above -+ the locals area, rather than below it. */ -+ -+static bool -+aarch64_save_regs_above_locals_p () -+{ -+ /* When using stack smash protection, make sure that the canary slot -+ comes between the locals and the saved registers. Otherwise, -+ it would be possible for a carefully sized smash attack to change -+ the saved registers (particularly LR and FP) without reaching the -+ canary. */ -+ return crtl->stack_protect_guard; -+} -+ - /* Mark the registers that need to be saved by the callee and calculate - the size of the callee-saved registers area and frame record (both FP - and LR may be omitted). */ -@@ -7403,6 +7417,7 @@ aarch64_layout_frame (void) - poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); - bool frame_related_fp_reg_p = false; - aarch64_frame &frame = cfun->machine->frame; -+ poly_int64 top_of_locals = -1; - - frame.emit_frame_chain = aarch64_needs_frame_chain (); - -@@ -7469,9 +7484,16 @@ aarch64_layout_frame (void) - && !crtl->abi->clobbers_full_reg_p (regno)) - frame.reg_offset[regno] = SLOT_REQUIRED; - -+ bool regs_at_top_p = aarch64_save_regs_above_locals_p (); - - poly_int64 offset = crtl->outgoing_args_size; - gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); -+ if (regs_at_top_p) -+ { -+ offset += get_frame_size (); -+ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -+ top_of_locals = offset; -+ } - frame.bytes_below_saved_regs = offset; - frame.sve_save_and_probe = INVALID_REGNUM; - -@@ -7611,15 +7633,18 @@ aarch64_layout_frame (void) - at expand_prologue. */ - gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); - -- offset += get_frame_size (); -- offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -- auto top_of_locals = offset; -- -+ if (!regs_at_top_p) -+ { -+ offset += get_frame_size (); -+ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -+ top_of_locals = offset; -+ } - offset += frame.saved_varargs_size; - gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); - frame.frame_size = offset; - - frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; -+ gcc_assert (known_ge (top_of_locals, 0)); - frame.bytes_above_locals = frame.frame_size - top_of_locals; - - frame.initial_adjust = 0; -@@ -8843,10 +8868,10 @@ aarch64_epilogue_uses (int regno) - | for register varargs | - | | - +-------------------------------+ -- | local variables | <-- frame_pointer_rtx -+ | local variables (1) | <-- frame_pointer_rtx - | | - +-------------------------------+ -- | padding | -+ | padding (1) | - +-------------------------------+ - | callee-saved registers | - +-------------------------------+ -@@ -8858,6 +8883,10 @@ aarch64_epilogue_uses (int regno) - +-------------------------------+ - | SVE predicate registers | - +-------------------------------+ -+ | local variables (2) | -+ +-------------------------------+ -+ | padding (2) | -+ +-------------------------------+ - | dynamic allocation | - +-------------------------------+ - | padding | -@@ -8867,6 +8896,9 @@ aarch64_epilogue_uses (int regno) - +-------------------------------+ - | | <-- stack_pointer_rtx (aligned) - -+ The regions marked (1) and (2) are mutually exclusive. (2) is used -+ when aarch64_save_regs_above_locals_p is true. -+ - Dynamic stack allocations via alloca() decrease stack_pointer_rtx - but leave frame_pointer_rtx and hard_frame_pointer_rtx - unchanged. -@@ -9058,6 +9090,8 @@ aarch64_expand_prologue (void) - gcc_assert (known_eq (bytes_below_sp, final_adjust)); - aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, - !frame_pointer_needed, true); -+ if (emit_frame_chain && maybe_ne (final_adjust, 0)) -+ emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); - } - - /* Return TRUE if we can use a simple_return insn. -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c -new file mode 100644 -index 000000000000..e71d820e3654 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c -@@ -0,0 +1,95 @@ -+/* { dg-options " -O -fstack-protector-strong -mstack-protector-guard=sysreg -mstack-protector-guard-reg=tpidr2_el0 -mstack-protector-guard-offset=16" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void g(void *); -+__SVBool_t *h(void *); -+ -+/* -+** test1: -+** sub sp, sp, #288 -+** stp x29, x30, \[sp, #?272\] -+** add x29, sp, #?272 -+** mrs (x[0-9]+), tpidr2_el0 -+** ldr (x[0-9]+), \[\1, #?16\] -+** str \2, \[sp, #?264\] -+** mov \2, #?0 -+** add x0, sp, #?8 -+** bl g -+** ... -+** mrs .* -+** ... -+** bne .* -+** ... -+** ldp x29, x30, \[sp, #?272\] -+** add sp, sp, #?288 -+** ret -+** bl __stack_chk_fail -+*/ -+int test1() { -+ int y[0x40]; -+ g(y); -+ return 1; -+} -+ -+/* -+** test2: -+** stp x29, x30, \[sp, #?-16\]! -+** mov x29, sp -+** sub sp, sp, #1040 -+** mrs (x[0-9]+), tpidr2_el0 -+** ldr (x[0-9]+), \[\1, #?16\] -+** str \2, \[sp, #?1032\] -+** mov \2, #?0 -+** add x0, sp, #?8 -+** bl g -+** ... -+** mrs .* -+** ... -+** bne .* -+** ... -+** add sp, sp, #?1040 -+** ldp x29, x30, \[sp\], #?16 -+** ret -+** bl __stack_chk_fail -+*/ -+int test2() { -+ int y[0x100]; -+ g(y); -+ return 1; -+} -+ -+#pragma GCC target "+sve" -+ -+/* -+** test3: -+** stp x29, x30, \[sp, #?-16\]! -+** mov x29, sp -+** addvl sp, sp, #-18 -+** ... -+** str p4, \[sp\] -+** ... -+** sub sp, sp, #272 -+** mrs (x[0-9]+), tpidr2_el0 -+** ldr (x[0-9]+), \[\1, #?16\] -+** str \2, \[sp, #?264\] -+** mov \2, #?0 -+** add x0, sp, #?8 -+** bl h -+** ... -+** mrs .* -+** ... -+** bne .* -+** ... -+** add sp, sp, #?272 -+** ... -+** ldr p4, \[sp\] -+** ... -+** addvl sp, sp, #18 -+** ldp x29, x30, \[sp\], #?16 -+** ret -+** bl __stack_chk_fail -+*/ -+__SVBool_t test3() { -+ int y[0x40]; -+ return *h(y); -+} -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c -new file mode 100644 -index 000000000000..58f322aa480a ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c -@@ -0,0 +1,33 @@ -+/* { dg-options "-O2 -mcpu=neoverse-v1 -fstack-protector-all" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+/* -+** main: -+** ... -+** stp x29, x30, \[sp, #?-[0-9]+\]! -+** ... -+** sub sp, sp, #[0-9]+ -+** ... -+** str x[0-9]+, \[x29, #?-8\] -+** ... -+*/ -+int f(const char *); -+void g(void *); -+int main(int argc, char* argv[]) -+{ -+ int a; -+ int b; -+ char c[2+f(argv[1])]; -+ int d[0x100]; -+ char y; -+ -+ y=42; a=4; b=10; -+ c[0] = 'h'; c[1] = '\0'; -+ -+ c[f(argv[2])] = '\0'; -+ -+ __builtin_printf("%d %d\n%s\n", a, b, c); -+ g(d); -+ -+ return 0; -+} --- -2.42.0 - diff --git a/packages/gcc/11.4.0/chksum b/packages/gcc/11.4.0/chksum deleted file mode 100644 index e6e5de42..00000000 --- a/packages/gcc/11.4.0/chksum +++ /dev/null @@ -1,8 +0,0 @@ -md5 gcc-11.4.0.tar.xz 3ec67dbe6fac4c3aa3b95250aa545b24 -sha1 gcc-11.4.0.tar.xz 03f21dce9edf9092e38b4e23dd27b29f6ab56f63 -sha256 gcc-11.4.0.tar.xz 3f2db222b007e8a4a23cd5ba56726ef08e8b1f1eb2055ee72c1402cea73a8dd9 -sha512 gcc-11.4.0.tar.xz a5018bf1f1fa25ddf33f46e720675d261987763db48e7a5fdf4c26d3150a8abcb82fdc413402df1c32f2e6b057d9bae6bdfa026defc4030e10144a8532e60f14 -md5 gcc-11.4.0.tar.gz 555f990ed0cc31537c0731895e1273fe -sha1 gcc-11.4.0.tar.gz bc457d3c9bcfa5c9fb59af3cbf45dfafc3f39752 -sha256 gcc-11.4.0.tar.gz af828619dd1970734dda3cfb792ea3f2cba61b5a00170ba8bce4910749d73c07 -sha512 gcc-11.4.0.tar.gz de22be3bc3ec7deab0db9b1de1cb70c4721991a6d2865d6d77900369cc2748127e4cf866763fd267ec58dbf4cfb62bd364e0eced0547a9fc5dedd4f4f7bc6661 diff --git a/packages/gcc/11.4.0/0000-libtool-leave-framework-alone.patch b/packages/gcc/11.5.0/0000-libtool-leave-framework-alone.patch index 1a86e415..1a86e415 100644 --- a/packages/gcc/11.4.0/0000-libtool-leave-framework-alone.patch +++ b/packages/gcc/11.5.0/0000-libtool-leave-framework-alone.patch diff --git a/packages/gcc/11.4.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch b/packages/gcc/11.5.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch index 5f9a07a2..5f9a07a2 100644 --- a/packages/gcc/11.4.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch +++ b/packages/gcc/11.5.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch diff --git a/packages/gcc/11.4.0/0002-arm-softfloat-libgcc.patch b/packages/gcc/11.5.0/0002-arm-softfloat-libgcc.patch index d9800365..d9800365 100644 --- a/packages/gcc/11.4.0/0002-arm-softfloat-libgcc.patch +++ b/packages/gcc/11.5.0/0002-arm-softfloat-libgcc.patch diff --git a/packages/gcc/11.4.0/0003-libgcc-disable-split-stack-nothreads.patch b/packages/gcc/11.5.0/0003-libgcc-disable-split-stack-nothreads.patch index df91a9ff..df91a9ff 100644 --- a/packages/gcc/11.4.0/0003-libgcc-disable-split-stack-nothreads.patch +++ b/packages/gcc/11.5.0/0003-libgcc-disable-split-stack-nothreads.patch diff --git a/packages/gcc/11.4.0/0004-Remove-use-of-include_next-from-c-headers.patch b/packages/gcc/11.5.0/0004-Remove-use-of-include_next-from-c-headers.patch index 920e64da..fea58479 100644 --- a/packages/gcc/11.4.0/0004-Remove-use-of-include_next-from-c-headers.patch +++ b/packages/gcc/11.5.0/0004-Remove-use-of-include_next-from-c-headers.patch @@ -1,4 +1,4 @@ -From 9db1164d68ee1da7434af48db4f828d7df51b055 Mon Sep 17 00:00:00 2001 +From b8991143b52c28815f1c5fb2593906fcf6902912 Mon Sep 17 00:00:00 2001 From: Keith Packard <keithp@keithp.com> Date: Sun, 24 Jan 2021 14:20:33 -0800 Subject: [PATCH] Remove use of include_next from c++ headers diff --git a/packages/gcc/11.4.0/0005-arc-Update-ZOL-pattern.patch b/packages/gcc/11.5.0/0005-arc-Update-ZOL-pattern.patch index 361c9dbe..4e309acf 100644 --- a/packages/gcc/11.4.0/0005-arc-Update-ZOL-pattern.patch +++ b/packages/gcc/11.5.0/0005-arc-Update-ZOL-pattern.patch @@ -1,4 +1,4 @@ -From 7efc628f79a1801b292623dfe5aa8c53a61a2121 Mon Sep 17 00:00:00 2001 +From 4c2e3d20fd6a74faf9aa765e724efa7bd73ffc04 Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu <claziss@synopsys.com> Date: Tue, 14 Sep 2021 12:25:43 +0300 Subject: [PATCH] arc: Update ZOL pattern. diff --git a/packages/gcc/11.4.0/0006-arc-Update-u-maddhisi4-patterns.patch b/packages/gcc/11.5.0/0006-arc-Update-u-maddhisi4-patterns.patch index 8b0c34f7..b6bd915f 100644 --- a/packages/gcc/11.4.0/0006-arc-Update-u-maddhisi4-patterns.patch +++ b/packages/gcc/11.5.0/0006-arc-Update-u-maddhisi4-patterns.patch @@ -1,4 +1,4 @@ -From b3873d67e4e8a1f16efbfa6ad7d73b9809bb2dd2 Mon Sep 17 00:00:00 2001 +From f62aee446c2fa01016db09541d381f13b4fd08fa Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu <claziss@synopsys.com> Date: Thu, 30 Sep 2021 14:08:39 +0300 Subject: [PATCH] arc: Update (u)maddhisi4 patterns diff --git a/packages/gcc/11.4.0/0007-arc-Fix-maddhisi-patterns.patch b/packages/gcc/11.5.0/0007-arc-Fix-maddhisi-patterns.patch index e4233a36..f97cf08d 100644 --- a/packages/gcc/11.4.0/0007-arc-Fix-maddhisi-patterns.patch +++ b/packages/gcc/11.5.0/0007-arc-Fix-maddhisi-patterns.patch @@ -1,10 +1,9 @@ -From e73e3c3eaf2c3ea45083dda5dc4b7d29f6a03238 Mon Sep 17 00:00:00 2001 +From 490f7d015f662fd33a902538a56143df35c25e96 Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu <claziss@synopsys.com> Date: Wed, 6 Oct 2021 09:47:50 +0300 Subject: [PATCH] arc: Fix maddhisi patterns See for more details: https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/issues/429 - --- gcc/config/arc/arc.md | 43 +++++++--------------------------- gcc/testsuite/gcc.target/arc/tmac-4.c | 29 ++++++++++++++++++++++ diff --git a/packages/gcc/11.4.0/0008-Darwin-aarch64-Initial-support-for-the-self-host-dri.patch b/packages/gcc/11.5.0/0008-Darwin-aarch64-Initial-support-for-the-self-host-dri.patch index ab73edba..6544626b 100644 --- a/packages/gcc/11.4.0/0008-Darwin-aarch64-Initial-support-for-the-self-host-dri.patch +++ b/packages/gcc/11.5.0/0008-Darwin-aarch64-Initial-support-for-the-self-host-dri.patch @@ -1,4 +1,4 @@ -From 834c8749ced550af3f17ebae4072fb7dfb90d271 Mon Sep 17 00:00:00 2001 +From 74d504ac36ff87207b109e05ae6661cd339877d5 Mon Sep 17 00:00:00 2001 From: Iain Sandoe <iain@sandoe.co.uk> Date: Tue, 18 Aug 2020 22:29:51 +0100 Subject: [PATCH] Darwin, aarch64 : Initial support for the self-host driver. diff --git a/packages/gcc/11.4.0/0009-libstdc-Check-for-TLS-support-on-mingw-cross-compile.patch b/packages/gcc/11.5.0/0009-libstdc-Check-for-TLS-support-on-mingw-cross-compile.patch index abd82ffe..d8fe7475 100644 --- a/packages/gcc/11.4.0/0009-libstdc-Check-for-TLS-support-on-mingw-cross-compile.patch +++ b/packages/gcc/11.5.0/0009-libstdc-Check-for-TLS-support-on-mingw-cross-compile.patch @@ -1,4 +1,4 @@ -From cc1e28878a228b6c4a0872e56d97ac88971b7725 Mon Sep 17 00:00:00 2001 +From 3f5e837021bd03a8a2540b7a9617d6cd7f96cdec Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Hugo=20Beauz=C3=A9e-Luyssen?= <hugo@beauzee.fr> Date: Tue, 14 Sep 2021 16:41:37 +0100 Subject: [PATCH] libstdc++: Check for TLS support on mingw cross-compilers @@ -17,7 +17,7 @@ libstdc++-v3/ChangeLog: --- a/libstdc++-v3/configure +++ b/libstdc++-v3/configure -@@ -60390,6 +60390,214 @@ +@@ -60406,6 +60406,214 @@ fi done diff --git a/packages/gcc/11.4.0/0010-fixinc-don-t-fix-machine-names-in-__has_include-.PR.patch b/packages/gcc/11.5.0/0010-fixinc-don-t-fix-machine-names-in-__has_include-.-PR.patch index 69afa335..a6ed79bb 100644 --- a/packages/gcc/11.4.0/0010-fixinc-don-t-fix-machine-names-in-__has_include-.PR.patch +++ b/packages/gcc/11.5.0/0010-fixinc-don-t-fix-machine-names-in-__has_include-.-PR.patch @@ -1,4 +1,4 @@ -From de3f4ee9a5bd2adcb5ff2e1690db2567fda1473c Mon Sep 17 00:00:00 2001 +From e7ef2297372b4b433522f8af1f6fd9ca172d5f41 Mon Sep 17 00:00:00 2001 From: Xi Ruoyao <xry111@mengyan1223.wang> Date: Mon, 28 Jun 2021 13:54:58 +0800 Subject: [PATCH] fixinc: don't "fix" machine names in __has_include(...) @@ -92,7 +92,7 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> We want exactly two leading and trailing underscores. */ --- a/fixincludes/inclhack.def +++ b/fixincludes/inclhack.def -@@ -3201,7 +3201,8 @@ +@@ -3213,7 +3213,8 @@ c_fix = machine_name; test_text = "/* MACH_DIFF: */\n" diff --git a/packages/gcc/11.5.0/0011-Remove-crypt-and-crypt_r-interceptors.patch b/packages/gcc/11.5.0/0011-Remove-crypt-and-crypt_r-interceptors.patch new file mode 100644 index 00000000..0e1b6d23 --- /dev/null +++ b/packages/gcc/11.5.0/0011-Remove-crypt-and-crypt_r-interceptors.patch @@ -0,0 +1,124 @@ +From 4029717086ef0b1f08e6a7b6189038de5c3e72cc Mon Sep 17 00:00:00 2001 +From: Fangrui Song <i@maskray.me> +Date: Fri, 28 Apr 2023 09:59:17 -0700 +Subject: [PATCH] Remove crypt and crypt_r interceptors + +From Florian Weimer's D144073 + +> On GNU/Linux (glibc), the crypt and crypt_r functions are not part of the main shared object (libc.so.6), but libcrypt (with multiple possible sonames). The sanitizer libraries do not depend on libcrypt, so it can happen that during sanitizer library initialization, no real implementation will be found because the crypt, crypt_r functions are not present in the process image (yet). If its interceptors are called nevertheless, this results in a call through a null pointer when the sanitizer library attempts to forward the call to the real implementation. +> +> Many distributions have already switched to libxcrypt, a library that is separate from glibc and that can be build with sanitizers directly (avoiding the need for interceptors). This patch disables building the interceptor for glibc targets. + +Let's remove crypt and crypt_r interceptors (D68431) to fix issues with +newer glibc. + +For older glibc, msan will not know that an uninstrumented crypt_r call +initializes `data`, so there is a risk for false positives. However, with some +codebase survey, I think crypt_r uses are very few and the call sites typically +have a `memset(&data, 0, sizeof(data));` anyway. + +Fix https://github.com/google/sanitizers/issues/1365 +Related: https://bugzilla.redhat.com/show_bug.cgi?id=2169432 + +Reviewed By: #sanitizers, fweimer, thesamesam, vitalybuka + +Differential Revision: https://reviews.llvm.org/D149403 +--- + libsanitizer/sanitizer_common/sanitizer_common_interceptors.inc | 37 ---------- + libsanitizer/sanitizer_common/sanitizer_platform_interceptors.h | 2 + libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp | 2 + libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h | 1 + 4 files changed, 42 deletions(-) + +--- a/libsanitizer/sanitizer_common/sanitizer_common_interceptors.inc ++++ b/libsanitizer/sanitizer_common/sanitizer_common_interceptors.inc +@@ -9814,41 +9814,6 @@ + #define INIT_GETRANDOM + #endif + +-#if SANITIZER_INTERCEPT_CRYPT +-INTERCEPTOR(char *, crypt, char *key, char *salt) { +- void *ctx; +- COMMON_INTERCEPTOR_ENTER(ctx, crypt, key, salt); +- COMMON_INTERCEPTOR_READ_RANGE(ctx, key, internal_strlen(key) + 1); +- COMMON_INTERCEPTOR_READ_RANGE(ctx, salt, internal_strlen(salt) + 1); +- char *res = REAL(crypt)(key, salt); +- if (res != nullptr) +- COMMON_INTERCEPTOR_INITIALIZE_RANGE(res, internal_strlen(res) + 1); +- return res; +-} +-#define INIT_CRYPT COMMON_INTERCEPT_FUNCTION(crypt); +-#else +-#define INIT_CRYPT +-#endif +- +-#if SANITIZER_INTERCEPT_CRYPT_R +-INTERCEPTOR(char *, crypt_r, char *key, char *salt, void *data) { +- void *ctx; +- COMMON_INTERCEPTOR_ENTER(ctx, crypt_r, key, salt, data); +- COMMON_INTERCEPTOR_READ_RANGE(ctx, key, internal_strlen(key) + 1); +- COMMON_INTERCEPTOR_READ_RANGE(ctx, salt, internal_strlen(salt) + 1); +- char *res = REAL(crypt_r)(key, salt, data); +- if (res != nullptr) { +- COMMON_INTERCEPTOR_WRITE_RANGE(ctx, data, +- __sanitizer::struct_crypt_data_sz); +- COMMON_INTERCEPTOR_INITIALIZE_RANGE(res, internal_strlen(res) + 1); +- } +- return res; +-} +-#define INIT_CRYPT_R COMMON_INTERCEPT_FUNCTION(crypt_r); +-#else +-#define INIT_CRYPT_R +-#endif +- + #if SANITIZER_INTERCEPT_GETENTROPY + INTERCEPTOR(int, getentropy, void *buf, SIZE_T buflen) { + void *ctx; +@@ -10337,8 +10302,6 @@ + INIT_GETUSERSHELL; + INIT_SL_INIT; + INIT_GETRANDOM; +- INIT_CRYPT; +- INIT_CRYPT_R; + INIT_GETENTROPY; + INIT_QSORT; + INIT_QSORT_R; +--- a/libsanitizer/sanitizer_common/sanitizer_platform_interceptors.h ++++ b/libsanitizer/sanitizer_common/sanitizer_platform_interceptors.h +@@ -572,8 +572,6 @@ + #define SANITIZER_INTERCEPT_FDEVNAME SI_FREEBSD + #define SANITIZER_INTERCEPT_GETUSERSHELL (SI_POSIX && !SI_ANDROID) + #define SANITIZER_INTERCEPT_SL_INIT (SI_FREEBSD || SI_NETBSD) +-#define SANITIZER_INTERCEPT_CRYPT (SI_POSIX && !SI_ANDROID) +-#define SANITIZER_INTERCEPT_CRYPT_R (SI_LINUX && !SI_ANDROID) + + #define SANITIZER_INTERCEPT_GETRANDOM \ + ((SI_LINUX && __GLIBC_PREREQ(2, 25)) || SI_FREEBSD) +--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp ++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp +@@ -142,7 +142,6 @@ + #include <linux/serial.h> + #include <sys/msg.h> + #include <sys/ipc.h> +-#include <crypt.h> + #endif // SANITIZER_LINUX && !SANITIZER_ANDROID + + #if SANITIZER_ANDROID +@@ -244,7 +243,6 @@ + unsigned struct_ustat_sz = SIZEOF_STRUCT_USTAT; + unsigned struct_rlimit64_sz = sizeof(struct rlimit64); + unsigned struct_statvfs64_sz = sizeof(struct statvfs64); +- unsigned struct_crypt_data_sz = sizeof(struct crypt_data); + #endif // SANITIZER_LINUX && !SANITIZER_ANDROID + + #if SANITIZER_LINUX && !SANITIZER_ANDROID +--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h ++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h +@@ -295,7 +295,6 @@ + extern unsigned struct_mq_attr_sz; + extern unsigned struct_timex_sz; + extern unsigned struct_statvfs_sz; +-extern unsigned struct_crypt_data_sz; + #endif // SANITIZER_LINUX && !SANITIZER_ANDROID + + struct __sanitizer_iovec { diff --git a/packages/gcc/11.5.0/chksum b/packages/gcc/11.5.0/chksum new file mode 100644 index 00000000..bc90fc36 --- /dev/null +++ b/packages/gcc/11.5.0/chksum @@ -0,0 +1,8 @@ +md5 gcc-11.5.0.tar.xz 03473f26c87e05e789a32208f1fe4491 +sha1 gcc-11.5.0.tar.xz a65b357c583e4ad8f95111d442ae51002c990f29 +sha256 gcc-11.5.0.tar.xz a6e21868ead545cf87f0c01f84276e4b5281d672098591c1c896241f09363478 +sha512 gcc-11.5.0.tar.xz 88f17d5a5e69eeb53aaf0a9bc9daab1c4e501d145b388c5485ebeb2cc36178fbb2d3e49ebef4a8c007a05e88471a06b97cf9b08870478249f77fbfa3d4abd9a8 +md5 gcc-11.5.0.tar.gz 17f3877204c7e215439257b2cec4330e +sha1 gcc-11.5.0.tar.gz 19e8339f20340c47bff84a63d14e75a8dd172344 +sha256 gcc-11.5.0.tar.gz 5a447f9a2566d15376beece02270decec8b8c1fcb094b93cb335b23497d58117 +sha512 gcc-11.5.0.tar.gz e66535b7901cfb5adfb23201c537f23743550e85ecef54eb960f8142080774af6a3997851969cf55fd7ceb8f3cf66c63227ff0315602aaeaf55f4284b12d612b diff --git a/packages/gcc/11.4.0/version.desc b/packages/gcc/11.5.0/version.desc index e69de29b..e69de29b 100644 --- a/packages/gcc/11.4.0/version.desc +++ b/packages/gcc/11.5.0/version.desc diff --git a/packages/gcc/12.3.0/0010-aarch64-Use-local-frame-vars-in-shrink-wrapping-code.patch b/packages/gcc/12.3.0/0010-aarch64-Use-local-frame-vars-in-shrink-wrapping-code.patch deleted file mode 100644 index 622eaf6d..00000000 --- a/packages/gcc/12.3.0/0010-aarch64-Use-local-frame-vars-in-shrink-wrapping-code.patch +++ /dev/null @@ -1,378 +0,0 @@ -From 62fbb215cc817e9f2c1ca80282a64f4ee30806bc Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:48 +0100 -Subject: [PATCH 10/28] aarch64: Use local frame vars in shrink-wrapping code - -aarch64_layout_frame uses a shorthand for referring to -cfun->machine->frame: - - aarch64_frame &frame = cfun->machine->frame; - -This patch does the same for some other heavy users of the structure. -No functional change intended. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use - a local shorthand for cfun->machine->frame. - (aarch64_restore_callee_saves, aarch64_get_separate_components): - (aarch64_process_components): Likewise. - (aarch64_allocate_and_probe_stack_space): Likewise. - (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. - (aarch64_layout_frame): Use existing shorthand for one more case. ---- - gcc/config/aarch64/aarch64.cc | 123 ++++++++++++++++++---------------- - 1 file changed, 64 insertions(+), 59 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 226dc9dffd47..ae42ffdedbeb 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8351,7 +8351,7 @@ aarch64_layout_frame (void) - frame.is_scs_enabled - = (!crtl->calls_eh_return - && sanitize_flags_p (SANITIZE_SHADOW_CALL_STACK) -- && known_ge (cfun->machine->frame.reg_offset[LR_REGNUM], 0)); -+ && known_ge (frame.reg_offset[LR_REGNUM], 0)); - - /* When shadow call stack is enabled, the scs_pop in the epilogue will - restore x30, and we don't need to pop x30 again in the traditional -@@ -8763,6 +8763,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - unsigned start, unsigned limit, bool skip_wb, - bool hard_fp_valid_p) - { -+ aarch64_frame &frame = cfun->machine->frame; - rtx_insn *insn; - unsigned regno; - unsigned regno2; -@@ -8777,8 +8778,8 @@ aarch64_save_callee_saves (poly_int64 start_offset, - bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno); - - if (skip_wb -- && (regno == cfun->machine->frame.wb_push_candidate1 -- || regno == cfun->machine->frame.wb_push_candidate2)) -+ && (regno == frame.wb_push_candidate1 -+ || regno == frame.wb_push_candidate2)) - continue; - - if (cfun->machine->reg_is_wrapped_separately[regno]) -@@ -8786,7 +8787,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + cfun->machine->frame.reg_offset[regno]; -+ offset = start_offset + frame.reg_offset[regno]; - rtx base_rtx = stack_pointer_rtx; - poly_int64 sp_offset = offset; - -@@ -8799,7 +8800,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - { - gcc_assert (known_eq (start_offset, 0)); - poly_int64 fp_offset -- = cfun->machine->frame.below_hard_fp_saved_regs_size; -+ = frame.below_hard_fp_saved_regs_size; - if (hard_fp_valid_p) - base_rtx = hard_frame_pointer_rtx; - else -@@ -8821,8 +8822,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit - && !cfun->machine->reg_is_wrapped_separately[regno2] - && known_eq (GET_MODE_SIZE (mode), -- cfun->machine->frame.reg_offset[regno2] -- - cfun->machine->frame.reg_offset[regno])) -+ frame.reg_offset[regno2] - frame.reg_offset[regno])) - { - rtx reg2 = gen_rtx_REG (mode, regno2); - rtx mem2; -@@ -8872,6 +8872,7 @@ static void - aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - unsigned limit, bool skip_wb, rtx *cfi_ops) - { -+ aarch64_frame &frame = cfun->machine->frame; - unsigned regno; - unsigned regno2; - poly_int64 offset; -@@ -8888,13 +8889,13 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - rtx reg, mem; - - if (skip_wb -- && (regno == cfun->machine->frame.wb_pop_candidate1 -- || regno == cfun->machine->frame.wb_pop_candidate2)) -+ && (regno == frame.wb_pop_candidate1 -+ || regno == frame.wb_pop_candidate2)) - continue; - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + cfun->machine->frame.reg_offset[regno]; -+ offset = start_offset + frame.reg_offset[regno]; - rtx base_rtx = stack_pointer_rtx; - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, -@@ -8905,8 +8906,7 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit - && !cfun->machine->reg_is_wrapped_separately[regno2] - && known_eq (GET_MODE_SIZE (mode), -- cfun->machine->frame.reg_offset[regno2] -- - cfun->machine->frame.reg_offset[regno])) -+ frame.reg_offset[regno2] - frame.reg_offset[regno])) - { - rtx reg2 = gen_rtx_REG (mode, regno2); - rtx mem2; -@@ -9011,6 +9011,7 @@ offset_12bit_unsigned_scaled_p (machine_mode mode, poly_int64 offset) - static sbitmap - aarch64_get_separate_components (void) - { -+ aarch64_frame &frame = cfun->machine->frame; - sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1); - bitmap_clear (components); - -@@ -9027,18 +9028,18 @@ aarch64_get_separate_components (void) - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - continue; - -- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; -+ poly_int64 offset = frame.reg_offset[regno]; - - /* If the register is saved in the first SVE save slot, we use - it as a stack probe for -fstack-clash-protection. */ - if (flag_stack_clash_protection -- && maybe_ne (cfun->machine->frame.below_hard_fp_saved_regs_size, 0) -+ && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) - && known_eq (offset, 0)) - continue; - - /* Get the offset relative to the register we'll use. */ - if (frame_pointer_needed) -- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; -+ offset -= frame.below_hard_fp_saved_regs_size; - else - offset += crtl->outgoing_args_size; - -@@ -9057,11 +9058,11 @@ aarch64_get_separate_components (void) - /* If the spare predicate register used by big-endian SVE code - is call-preserved, it must be saved in the main prologue - before any saves that use it. */ -- if (cfun->machine->frame.spare_pred_reg != INVALID_REGNUM) -- bitmap_clear_bit (components, cfun->machine->frame.spare_pred_reg); -+ if (frame.spare_pred_reg != INVALID_REGNUM) -+ bitmap_clear_bit (components, frame.spare_pred_reg); - -- unsigned reg1 = cfun->machine->frame.wb_push_candidate1; -- unsigned reg2 = cfun->machine->frame.wb_push_candidate2; -+ unsigned reg1 = frame.wb_push_candidate1; -+ unsigned reg2 = frame.wb_push_candidate2; - /* If registers have been chosen to be stored/restored with - writeback don't interfere with them to avoid having to output explicit - stack adjustment instructions. */ -@@ -9170,6 +9171,7 @@ aarch64_get_next_set_bit (sbitmap bmp, unsigned int start) - static void - aarch64_process_components (sbitmap components, bool prologue_p) - { -+ aarch64_frame &frame = cfun->machine->frame; - rtx ptr_reg = gen_rtx_REG (Pmode, frame_pointer_needed - ? HARD_FRAME_POINTER_REGNUM - : STACK_POINTER_REGNUM); -@@ -9184,9 +9186,9 @@ aarch64_process_components (sbitmap components, bool prologue_p) - machine_mode mode = aarch64_reg_save_mode (regno); - - rtx reg = gen_rtx_REG (mode, regno); -- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; -+ poly_int64 offset = frame.reg_offset[regno]; - if (frame_pointer_needed) -- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; -+ offset -= frame.below_hard_fp_saved_regs_size; - else - offset += crtl->outgoing_args_size; - -@@ -9211,14 +9213,14 @@ aarch64_process_components (sbitmap components, bool prologue_p) - break; - } - -- poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2]; -+ poly_int64 offset2 = frame.reg_offset[regno2]; - /* The next register is not of the same class or its offset is not - mergeable with the current one into a pair. */ - if (aarch64_sve_mode_p (mode) - || !satisfies_constraint_Ump (mem) - || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2) - || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno)) -- || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]), -+ || maybe_ne ((offset2 - frame.reg_offset[regno]), - GET_MODE_SIZE (mode))) - { - insn = emit_insn (set); -@@ -9240,7 +9242,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - /* REGNO2 can be saved/restored in a pair with REGNO. */ - rtx reg2 = gen_rtx_REG (mode, regno2); - if (frame_pointer_needed) -- offset2 -= cfun->machine->frame.below_hard_fp_saved_regs_size; -+ offset2 -= frame.below_hard_fp_saved_regs_size; - else - offset2 += crtl->outgoing_args_size; - rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); -@@ -9335,6 +9337,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - bool frame_related_p, - bool final_adjustment_p) - { -+ aarch64_frame &frame = cfun->machine->frame; - HOST_WIDE_INT guard_size - = 1 << param_stack_clash_protection_guard_size; - HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; -@@ -9355,25 +9358,25 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - register as a probe. We can't assume that LR was saved at position 0 - though, so treat any space below it as unprobed. */ - if (final_adjustment_p -- && known_eq (cfun->machine->frame.below_hard_fp_saved_regs_size, 0)) -+ && known_eq (frame.below_hard_fp_saved_regs_size, 0)) - { -- poly_int64 lr_offset = cfun->machine->frame.reg_offset[LR_REGNUM]; -+ poly_int64 lr_offset = frame.reg_offset[LR_REGNUM]; - if (known_ge (lr_offset, 0)) - min_probe_threshold -= lr_offset.to_constant (); - else - gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); - } - -- poly_int64 frame_size = cfun->machine->frame.frame_size; -+ poly_int64 frame_size = frame.frame_size; - - /* We should always have a positive probe threshold. */ - gcc_assert (min_probe_threshold > 0); - - if (flag_stack_clash_protection && !final_adjustment_p) - { -- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; -- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; -- poly_int64 final_adjust = cfun->machine->frame.final_adjust; -+ poly_int64 initial_adjust = frame.initial_adjust; -+ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; -+ poly_int64 final_adjust = frame.final_adjust; - - if (known_eq (frame_size, 0)) - { -@@ -9662,17 +9665,18 @@ aarch64_epilogue_uses (int regno) - void - aarch64_expand_prologue (void) - { -- poly_int64 frame_size = cfun->machine->frame.frame_size; -- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; -- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; -- poly_int64 final_adjust = cfun->machine->frame.final_adjust; -- poly_int64 callee_offset = cfun->machine->frame.callee_offset; -- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; -+ aarch64_frame &frame = cfun->machine->frame; -+ poly_int64 frame_size = frame.frame_size; -+ poly_int64 initial_adjust = frame.initial_adjust; -+ HOST_WIDE_INT callee_adjust = frame.callee_adjust; -+ poly_int64 final_adjust = frame.final_adjust; -+ poly_int64 callee_offset = frame.callee_offset; -+ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size -- = cfun->machine->frame.below_hard_fp_saved_regs_size; -- unsigned reg1 = cfun->machine->frame.wb_push_candidate1; -- unsigned reg2 = cfun->machine->frame.wb_push_candidate2; -- bool emit_frame_chain = cfun->machine->frame.emit_frame_chain; -+ = frame.below_hard_fp_saved_regs_size; -+ unsigned reg1 = frame.wb_push_candidate1; -+ unsigned reg2 = frame.wb_push_candidate2; -+ bool emit_frame_chain = frame.emit_frame_chain; - rtx_insn *insn; - - if (flag_stack_clash_protection && known_eq (callee_adjust, 0)) -@@ -9703,7 +9707,7 @@ aarch64_expand_prologue (void) - } - - /* Push return address to shadow call stack. */ -- if (cfun->machine->frame.is_scs_enabled) -+ if (frame.is_scs_enabled) - emit_insn (gen_scs_push ()); - - if (flag_stack_usage_info) -@@ -9742,7 +9746,7 @@ aarch64_expand_prologue (void) - - /* The offset of the frame chain record (if any) from the current SP. */ - poly_int64 chain_offset = (initial_adjust + callee_adjust -- - cfun->machine->frame.hard_fp_offset); -+ - frame.hard_fp_offset); - gcc_assert (known_ge (chain_offset, 0)); - - /* The offset of the bottom of the save area from the current SP. */ -@@ -9845,16 +9849,17 @@ aarch64_use_return_insn_p (void) - void - aarch64_expand_epilogue (bool for_sibcall) - { -- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; -- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; -- poly_int64 final_adjust = cfun->machine->frame.final_adjust; -- poly_int64 callee_offset = cfun->machine->frame.callee_offset; -- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; -+ aarch64_frame &frame = cfun->machine->frame; -+ poly_int64 initial_adjust = frame.initial_adjust; -+ HOST_WIDE_INT callee_adjust = frame.callee_adjust; -+ poly_int64 final_adjust = frame.final_adjust; -+ poly_int64 callee_offset = frame.callee_offset; -+ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size -- = cfun->machine->frame.below_hard_fp_saved_regs_size; -- unsigned reg1 = cfun->machine->frame.wb_pop_candidate1; -- unsigned reg2 = cfun->machine->frame.wb_pop_candidate2; -- unsigned int last_gpr = (cfun->machine->frame.is_scs_enabled -+ = frame.below_hard_fp_saved_regs_size; -+ unsigned reg1 = frame.wb_pop_candidate1; -+ unsigned reg2 = frame.wb_pop_candidate2; -+ unsigned int last_gpr = (frame.is_scs_enabled - ? R29_REGNUM : R30_REGNUM); - rtx cfi_ops = NULL; - rtx_insn *insn; -@@ -9888,7 +9893,7 @@ aarch64_expand_epilogue (bool for_sibcall) - /* We need to add memory barrier to prevent read from deallocated stack. */ - bool need_barrier_p - = maybe_ne (get_frame_size () -- + cfun->machine->frame.saved_varargs_size, 0); -+ + frame.saved_varargs_size, 0); - - /* Emit a barrier to prevent loads from a deallocated stack. */ - if (maybe_gt (final_adjust, crtl->outgoing_args_size) -@@ -9969,7 +9974,7 @@ aarch64_expand_epilogue (bool for_sibcall) - } - - /* Pop return address from shadow call stack. */ -- if (cfun->machine->frame.is_scs_enabled) -+ if (frame.is_scs_enabled) - { - machine_mode mode = aarch64_reg_save_mode (R30_REGNUM); - rtx reg = gen_rtx_REG (mode, R30_REGNUM); -@@ -12564,24 +12569,24 @@ aarch64_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) - poly_int64 - aarch64_initial_elimination_offset (unsigned from, unsigned to) - { -+ aarch64_frame &frame = cfun->machine->frame; -+ - if (to == HARD_FRAME_POINTER_REGNUM) - { - if (from == ARG_POINTER_REGNUM) -- return cfun->machine->frame.hard_fp_offset; -+ return frame.hard_fp_offset; - - if (from == FRAME_POINTER_REGNUM) -- return cfun->machine->frame.hard_fp_offset -- - cfun->machine->frame.locals_offset; -+ return frame.hard_fp_offset - frame.locals_offset; - } - - if (to == STACK_POINTER_REGNUM) - { - if (from == FRAME_POINTER_REGNUM) -- return cfun->machine->frame.frame_size -- - cfun->machine->frame.locals_offset; -+ return frame.frame_size - frame.locals_offset; - } - -- return cfun->machine->frame.frame_size; -+ return frame.frame_size; - } - - --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0011-aarch64-Avoid-a-use-of-callee_offset.patch b/packages/gcc/12.3.0/0011-aarch64-Avoid-a-use-of-callee_offset.patch deleted file mode 100644 index dc9fdb33..00000000 --- a/packages/gcc/12.3.0/0011-aarch64-Avoid-a-use-of-callee_offset.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 12a8889de169f892d2e927584c00d20b8b7e456f Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:49 +0100 -Subject: [PATCH 11/28] aarch64: Avoid a use of callee_offset - -When we emit the frame chain, i.e. when we reach Here in this statement -of aarch64_expand_prologue: - - if (emit_frame_chain) - { - // Here - ... - } - -the stack is in one of two states: - -- We've allocated up to the frame chain, but no more. - -- We've allocated the whole frame, and the frame chain is within easy - reach of the new SP. - -The offset of the frame chain from the current SP is available -in aarch64_frame as callee_offset. It is also available as the -chain_offset local variable, where the latter is calculated from other -data. (However, chain_offset is not always equal to callee_offset when -!emit_frame_chain, so chain_offset isn't redundant.) - -In c600df9a4060da3c6121ff4d0b93f179eafd69d1 I switched to using -chain_offset for the initialisation of the hard frame pointer: - - aarch64_add_offset (Pmode, hard_frame_pointer_rtx, -- stack_pointer_rtx, callee_offset, -+ stack_pointer_rtx, chain_offset, - tmp1_rtx, tmp0_rtx, frame_pointer_needed); - -But the later REG_CFA_ADJUST_CFA handling still used callee_offset. - -I think the difference is harmless, but it's more logical for the -CFA note to be in sync, and it's more convenient for later patches -if it uses chain_offset. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use - chain_offset rather than callee_offset. ---- - gcc/config/aarch64/aarch64.cc | 4 +--- - 1 file changed, 1 insertion(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index ae42ffdedbeb..79253322fd7c 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -9670,7 +9670,6 @@ aarch64_expand_prologue (void) - poly_int64 initial_adjust = frame.initial_adjust; - HOST_WIDE_INT callee_adjust = frame.callee_adjust; - poly_int64 final_adjust = frame.final_adjust; -- poly_int64 callee_offset = frame.callee_offset; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size - = frame.below_hard_fp_saved_regs_size; -@@ -9783,8 +9782,7 @@ aarch64_expand_prologue (void) - implicit. */ - if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX)) - { -- rtx src = plus_constant (Pmode, stack_pointer_rtx, -- callee_offset); -+ rtx src = plus_constant (Pmode, stack_pointer_rtx, chain_offset); - add_reg_note (insn, REG_CFA_ADJUST_CFA, - gen_rtx_SET (hard_frame_pointer_rtx, src)); - } --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0012-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch b/packages/gcc/12.3.0/0012-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch deleted file mode 100644 index 1454b85a..00000000 --- a/packages/gcc/12.3.0/0012-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 03d5e89e7f3be53fd7142556e8e0a2774c653dca Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:49 +0100 -Subject: [PATCH 12/28] aarch64: Explicitly handle frames with no saved - registers - -If a frame has no saved registers, it can be allocated in one go. -There is no need to treat the areas below and above the saved -registers as separate. - -And if we allocate the frame in one go, it should be allocated -as the initial_adjust rather than the final_adjust. This allows the -frame size to grow to guard_size - guard_used_by_caller before a stack -probe is needed. (A frame with no register saves is necessarily a -leaf frame.) - -This is a no-op as thing stand, since a leaf function will have -no outgoing arguments, and so all the frame will be above where -the saved registers normally go. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly - allocate the frame in one go if there are no saved registers. ---- - gcc/config/aarch64/aarch64.cc | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 79253322fd7c..e1f21230c15e 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8378,9 +8378,11 @@ aarch64_layout_frame (void) - - HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; - HOST_WIDE_INT const_saved_regs_size; -- if (frame.frame_size.is_constant (&const_size) -- && const_size < max_push_offset -- && known_eq (frame.hard_fp_offset, const_size)) -+ if (known_eq (frame.saved_regs_size, 0)) -+ frame.initial_adjust = frame.frame_size; -+ else if (frame.frame_size.is_constant (&const_size) -+ && const_size < max_push_offset -+ && known_eq (frame.hard_fp_offset, const_size)) - { - /* Simple, small frame with no outgoing arguments: - --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0013-aarch64-Add-bytes_below_saved_regs-to-frame-info.patch b/packages/gcc/12.3.0/0013-aarch64-Add-bytes_below_saved_regs-to-frame-info.patch deleted file mode 100644 index cb625c6c..00000000 --- a/packages/gcc/12.3.0/0013-aarch64-Add-bytes_below_saved_regs-to-frame-info.patch +++ /dev/null @@ -1,233 +0,0 @@ -From 49c2eb7616756c323b7f6b18d8616ec945eb1263 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:49 +0100 -Subject: [PATCH 13/28] aarch64: Add bytes_below_saved_regs to frame info - -The frame layout code currently hard-codes the assumption that -the number of bytes below the saved registers is equal to the -size of the outgoing arguments. This patch abstracts that -value into a new field of aarch64_frame. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New - field. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it, - and use it instead of crtl->outgoing_args_size. - (aarch64_get_separate_components): Use bytes_below_saved_regs instead - of outgoing_args_size. - (aarch64_process_components): Likewise. ---- - gcc/config/aarch64/aarch64.cc | 71 ++++++++++++++++++----------------- - gcc/config/aarch64/aarch64.h | 5 +++ - 2 files changed, 41 insertions(+), 35 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index e1f21230c15e..94e1b6865849 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8217,6 +8217,8 @@ aarch64_layout_frame (void) - gcc_assert (crtl->is_leaf - || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); - -+ frame.bytes_below_saved_regs = crtl->outgoing_args_size; -+ - /* Now assign stack slots for the registers. Start with the predicate - registers, since predicate LDR and STR have a relatively small - offset range. These saves happen below the hard frame pointer. */ -@@ -8321,18 +8323,18 @@ aarch64_layout_frame (void) - - poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; - -- poly_int64 above_outgoing_args -+ poly_int64 saved_regs_and_above - = aligned_upper_bound (varargs_and_saved_regs_size - + get_frame_size (), - STACK_BOUNDARY / BITS_PER_UNIT); - - frame.hard_fp_offset -- = above_outgoing_args - frame.below_hard_fp_saved_regs_size; -+ = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; - - /* Both these values are already aligned. */ -- gcc_assert (multiple_p (crtl->outgoing_args_size, -+ gcc_assert (multiple_p (frame.bytes_below_saved_regs, - STACK_BOUNDARY / BITS_PER_UNIT)); -- frame.frame_size = above_outgoing_args + crtl->outgoing_args_size; -+ frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; - - frame.locals_offset = frame.saved_varargs_size; - -@@ -8376,7 +8378,7 @@ aarch64_layout_frame (void) - else if (frame.wb_pop_candidate1 != INVALID_REGNUM) - max_push_offset = 256; - -- HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; -+ HOST_WIDE_INT const_size, const_below_saved_regs, const_fp_offset; - HOST_WIDE_INT const_saved_regs_size; - if (known_eq (frame.saved_regs_size, 0)) - frame.initial_adjust = frame.frame_size; -@@ -8384,31 +8386,31 @@ aarch64_layout_frame (void) - && const_size < max_push_offset - && known_eq (frame.hard_fp_offset, const_size)) - { -- /* Simple, small frame with no outgoing arguments: -+ /* Simple, small frame with no data below the saved registers. - - stp reg1, reg2, [sp, -frame_size]! - stp reg3, reg4, [sp, 16] */ - frame.callee_adjust = const_size; - } -- else if (crtl->outgoing_args_size.is_constant (&const_outgoing_args_size) -+ else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) - && frame.saved_regs_size.is_constant (&const_saved_regs_size) -- && const_outgoing_args_size + const_saved_regs_size < 512 -- /* We could handle this case even with outgoing args, provided -- that the number of args left us with valid offsets for all -- predicate and vector save slots. It's such a rare case that -- it hardly seems worth the effort though. */ -- && (!saves_below_hard_fp_p || const_outgoing_args_size == 0) -+ && const_below_saved_regs + const_saved_regs_size < 512 -+ /* We could handle this case even with data below the saved -+ registers, provided that that data left us with valid offsets -+ for all predicate and vector save slots. It's such a rare -+ case that it hardly seems worth the effort though. */ -+ && (!saves_below_hard_fp_p || const_below_saved_regs == 0) - && !(cfun->calls_alloca - && frame.hard_fp_offset.is_constant (&const_fp_offset) - && const_fp_offset < max_push_offset)) - { -- /* Frame with small outgoing arguments: -+ /* Frame with small area below the saved registers: - - sub sp, sp, frame_size -- stp reg1, reg2, [sp, outgoing_args_size] -- stp reg3, reg4, [sp, outgoing_args_size + 16] */ -+ stp reg1, reg2, [sp, bytes_below_saved_regs] -+ stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ - frame.initial_adjust = frame.frame_size; -- frame.callee_offset = const_outgoing_args_size; -+ frame.callee_offset = const_below_saved_regs; - } - else if (saves_below_hard_fp_p - && known_eq (frame.saved_regs_size, -@@ -8418,30 +8420,29 @@ aarch64_layout_frame (void) - - sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size - save SVE registers relative to SP -- sub sp, sp, outgoing_args_size */ -+ sub sp, sp, bytes_below_saved_regs */ - frame.initial_adjust = (frame.hard_fp_offset - + frame.below_hard_fp_saved_regs_size); -- frame.final_adjust = crtl->outgoing_args_size; -+ frame.final_adjust = frame.bytes_below_saved_regs; - } - else if (frame.hard_fp_offset.is_constant (&const_fp_offset) - && const_fp_offset < max_push_offset) - { -- /* Frame with large outgoing arguments or SVE saves, but with -- a small local area: -+ /* Frame with large area below the saved registers, or with SVE saves, -+ but with a small area above: - - stp reg1, reg2, [sp, -hard_fp_offset]! - stp reg3, reg4, [sp, 16] - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] -- sub sp, sp, outgoing_args_size */ -+ sub sp, sp, bytes_below_saved_regs */ - frame.callee_adjust = const_fp_offset; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -- frame.final_adjust = crtl->outgoing_args_size; -+ frame.final_adjust = frame.bytes_below_saved_regs; - } - else - { -- /* Frame with large local area and outgoing arguments or SVE saves, -- using frame pointer: -+ /* General case: - - sub sp, sp, hard_fp_offset - stp x29, x30, [sp, 0] -@@ -8449,10 +8450,10 @@ aarch64_layout_frame (void) - stp reg3, reg4, [sp, 16] - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] -- sub sp, sp, outgoing_args_size */ -+ sub sp, sp, bytes_below_saved_regs */ - frame.initial_adjust = frame.hard_fp_offset; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -- frame.final_adjust = crtl->outgoing_args_size; -+ frame.final_adjust = frame.bytes_below_saved_regs; - } - - /* Make sure the individual adjustments add up to the full frame size. */ -@@ -9043,7 +9044,7 @@ aarch64_get_separate_components (void) - if (frame_pointer_needed) - offset -= frame.below_hard_fp_saved_regs_size; - else -- offset += crtl->outgoing_args_size; -+ offset += frame.bytes_below_saved_regs; - - /* Check that we can access the stack slot of the register with one - direct load with no adjustments needed. */ -@@ -9192,7 +9193,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - if (frame_pointer_needed) - offset -= frame.below_hard_fp_saved_regs_size; - else -- offset += crtl->outgoing_args_size; -+ offset += frame.bytes_below_saved_regs; - - rtx addr = plus_constant (Pmode, ptr_reg, offset); - rtx mem = gen_frame_mem (mode, addr); -@@ -9246,7 +9247,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - if (frame_pointer_needed) - offset2 -= frame.below_hard_fp_saved_regs_size; - else -- offset2 += crtl->outgoing_args_size; -+ offset2 += frame.bytes_below_saved_regs; - rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); - rtx mem2 = gen_frame_mem (mode, addr2); - rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) -@@ -9320,10 +9321,10 @@ aarch64_stack_clash_protection_alloca_probe_range (void) - registers. If POLY_SIZE is not large enough to require a probe this function - will only adjust the stack. When allocating the stack space - FRAME_RELATED_P is then used to indicate if the allocation is frame related. -- FINAL_ADJUSTMENT_P indicates whether we are allocating the outgoing -- arguments. If we are then we ensure that any allocation larger than the ABI -- defined buffer needs a probe so that the invariant of having a 1KB buffer is -- maintained. -+ FINAL_ADJUSTMENT_P indicates whether we are allocating the area below -+ the saved registers. If we are then we ensure that any allocation -+ larger than the ABI defined buffer needs a probe so that the -+ invariant of having a 1KB buffer is maintained. - - We emit barriers after each stack adjustment to prevent optimizations from - breaking the invariant that we never drop the stack more than a page. This -@@ -9532,7 +9533,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - /* Handle any residuals. Residuals of at least MIN_PROBE_THRESHOLD have to - be probed. This maintains the requirement that each page is probed at - least once. For initial probing we probe only if the allocation is -- more than GUARD_SIZE - buffer, and for the outgoing arguments we probe -+ more than GUARD_SIZE - buffer, and below the saved registers we probe - if the amount is larger than buffer. GUARD_SIZE - buffer + buffer == - GUARD_SIZE. This works that for any allocation that is large enough to - trigger a probe here, we'll have at least one, and if they're not large -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 6834c3e99226..1e105e12db8d 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -871,6 +871,11 @@ struct GTY (()) aarch64_frame - /* The size of the callee-save registers with a slot in REG_OFFSET. */ - poly_int64 saved_regs_size; - -+ /* The number of bytes between the bottom of the static frame (the bottom -+ of the outgoing arguments) and the bottom of the register save area. -+ This value is always a multiple of STACK_BOUNDARY. */ -+ poly_int64 bytes_below_saved_regs; -+ - /* The size of the callee-save registers with a slot in REG_OFFSET that - are saved below the hard frame pointer. */ - poly_int64 below_hard_fp_saved_regs_size; --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0014-aarch64-Add-bytes_below_hard_fp-to-frame-info.patch b/packages/gcc/12.3.0/0014-aarch64-Add-bytes_below_hard_fp-to-frame-info.patch deleted file mode 100644 index 826b4ccf..00000000 --- a/packages/gcc/12.3.0/0014-aarch64-Add-bytes_below_hard_fp-to-frame-info.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 34081079ea4de0c98331843f574b5f6f94d7b234 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:50 +0100 -Subject: [PATCH 14/28] aarch64: Add bytes_below_hard_fp to frame info - -Following on from the previous bytes_below_saved_regs patch, this one -records the number of bytes that are below the hard frame pointer. -This eventually replaces below_hard_fp_saved_regs_size. - -If a frame pointer is not needed, the epilogue adds final_adjust -to the stack pointer before restoring registers: - - aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); - -Therefore, if the epilogue needs to restore the stack pointer from -the hard frame pointer, the directly corresponding offset is: - - -bytes_below_hard_fp + final_adjust - -i.e. go from the hard frame pointer to the bottom of the frame, -then add the same amount as if we were using the stack pointer -from the outset. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New - field. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it. - (aarch64_expand_epilogue): Use it instead of - below_hard_fp_saved_regs_size. ---- - gcc/config/aarch64/aarch64.cc | 6 +++--- - gcc/config/aarch64/aarch64.h | 5 +++++ - 2 files changed, 8 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 94e1b6865849..c7d84245fbfc 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8269,6 +8269,7 @@ aarch64_layout_frame (void) - of the callee save area. */ - bool saves_below_hard_fp_p = maybe_ne (offset, 0); - frame.below_hard_fp_saved_regs_size = offset; -+ frame.bytes_below_hard_fp = offset + frame.bytes_below_saved_regs; - if (frame.emit_frame_chain) - { - /* FP and LR are placed in the linkage record. */ -@@ -9856,8 +9857,7 @@ aarch64_expand_epilogue (bool for_sibcall) - poly_int64 final_adjust = frame.final_adjust; - poly_int64 callee_offset = frame.callee_offset; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; -- poly_int64 below_hard_fp_saved_regs_size -- = frame.below_hard_fp_saved_regs_size; -+ poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; - unsigned reg1 = frame.wb_pop_candidate1; - unsigned reg2 = frame.wb_pop_candidate2; - unsigned int last_gpr = (frame.is_scs_enabled -@@ -9915,7 +9915,7 @@ aarch64_expand_epilogue (bool for_sibcall) - is restored on the instruction doing the writeback. */ - aarch64_add_offset (Pmode, stack_pointer_rtx, - hard_frame_pointer_rtx, -- -callee_offset - below_hard_fp_saved_regs_size, -+ -bytes_below_hard_fp + final_adjust, - tmp1_rtx, tmp0_rtx, callee_adjust == 0); - else - /* The case where we need to re-use the register here is very rare, so -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 1e105e12db8d..de68ff7202fc 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -880,6 +880,11 @@ struct GTY (()) aarch64_frame - are saved below the hard frame pointer. */ - poly_int64 below_hard_fp_saved_regs_size; - -+ /* The number of bytes between the bottom of the static frame (the bottom -+ of the outgoing arguments) and the hard frame pointer. This value is -+ always a multiple of STACK_BOUNDARY. */ -+ poly_int64 bytes_below_hard_fp; -+ - /* Offset from the base of the frame (incomming SP) to the - top of the locals area. This value is always a multiple of - STACK_BOUNDARY. */ --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0015-aarch64-Tweak-aarch64_save-restore_callee_saves.patch b/packages/gcc/12.3.0/0015-aarch64-Tweak-aarch64_save-restore_callee_saves.patch deleted file mode 100644 index c1873245..00000000 --- a/packages/gcc/12.3.0/0015-aarch64-Tweak-aarch64_save-restore_callee_saves.patch +++ /dev/null @@ -1,225 +0,0 @@ -From 187861af7c51db9eddc6f954b589c121b210fc74 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:50 +0100 -Subject: [PATCH 15/28] aarch64: Tweak aarch64_save/restore_callee_saves - -aarch64_save_callee_saves and aarch64_restore_callee_saves took -a parameter called start_offset that gives the offset of the -bottom of the saved register area from the current stack pointer. -However, it's more convenient for later patches if we use the -bottom of the entire frame as the reference point, rather than -the bottom of the saved registers. - -Doing that removes the need for the callee_offset field. -Other than that, this is not a win on its own. It only really -makes sense in combination with the follow-on patches. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove - callee_offset handling. - (aarch64_save_callee_saves): Replace the start_offset parameter - with a bytes_below_sp parameter. - (aarch64_restore_callee_saves): Likewise. - (aarch64_expand_prologue): Update accordingly. - (aarch64_expand_epilogue): Likewise. ---- - gcc/config/aarch64/aarch64.cc | 56 +++++++++++++++++------------------ - gcc/config/aarch64/aarch64.h | 4 --- - 2 files changed, 28 insertions(+), 32 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index c7d84245fbfc..e79551af41df 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8343,7 +8343,6 @@ aarch64_layout_frame (void) - frame.final_adjust = 0; - frame.callee_adjust = 0; - frame.sve_callee_adjust = 0; -- frame.callee_offset = 0; - - frame.wb_pop_candidate1 = frame.wb_push_candidate1; - frame.wb_pop_candidate2 = frame.wb_push_candidate2; -@@ -8411,7 +8410,6 @@ aarch64_layout_frame (void) - stp reg1, reg2, [sp, bytes_below_saved_regs] - stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ - frame.initial_adjust = frame.frame_size; -- frame.callee_offset = const_below_saved_regs; - } - else if (saves_below_hard_fp_p - && known_eq (frame.saved_regs_size, -@@ -8758,12 +8756,13 @@ aarch64_add_cfa_expression (rtx_insn *insn, rtx reg, - } - - /* Emit code to save the callee-saved registers from register number START -- to LIMIT to the stack at the location starting at offset START_OFFSET, -- skipping any write-back candidates if SKIP_WB is true. HARD_FP_VALID_P -- is true if the hard frame pointer has been set up. */ -+ to LIMIT to the stack. The stack pointer is currently BYTES_BELOW_SP -+ bytes above the bottom of the static frame. Skip any write-back -+ candidates if SKIP_WB is true. HARD_FP_VALID_P is true if the hard -+ frame pointer has been set up. */ - - static void --aarch64_save_callee_saves (poly_int64 start_offset, -+aarch64_save_callee_saves (poly_int64 bytes_below_sp, - unsigned start, unsigned limit, bool skip_wb, - bool hard_fp_valid_p) - { -@@ -8791,7 +8790,9 @@ aarch64_save_callee_saves (poly_int64 start_offset, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + frame.reg_offset[regno]; -+ offset = (frame.reg_offset[regno] -+ + frame.bytes_below_saved_regs -+ - bytes_below_sp); - rtx base_rtx = stack_pointer_rtx; - poly_int64 sp_offset = offset; - -@@ -8802,9 +8803,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - else if (GP_REGNUM_P (regno) - && (!offset.is_constant (&const_offset) || const_offset >= 512)) - { -- gcc_assert (known_eq (start_offset, 0)); -- poly_int64 fp_offset -- = frame.below_hard_fp_saved_regs_size; -+ poly_int64 fp_offset = frame.bytes_below_hard_fp - bytes_below_sp; - if (hard_fp_valid_p) - base_rtx = hard_frame_pointer_rtx; - else -@@ -8868,12 +8867,13 @@ aarch64_save_callee_saves (poly_int64 start_offset, - } - - /* Emit code to restore the callee registers from register number START -- up to and including LIMIT. Restore from the stack offset START_OFFSET, -- skipping any write-back candidates if SKIP_WB is true. Write the -- appropriate REG_CFA_RESTORE notes into CFI_OPS. */ -+ up to and including LIMIT. The stack pointer is currently BYTES_BELOW_SP -+ bytes above the bottom of the static frame. Skip any write-back -+ candidates if SKIP_WB is true. Write the appropriate REG_CFA_RESTORE -+ notes into CFI_OPS. */ - - static void --aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, -+aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, - unsigned limit, bool skip_wb, rtx *cfi_ops) - { - aarch64_frame &frame = cfun->machine->frame; -@@ -8899,7 +8899,9 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + frame.reg_offset[regno]; -+ offset = (frame.reg_offset[regno] -+ + frame.bytes_below_saved_regs -+ - bytes_below_sp); - rtx base_rtx = stack_pointer_rtx; - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, -@@ -9675,8 +9677,6 @@ aarch64_expand_prologue (void) - HOST_WIDE_INT callee_adjust = frame.callee_adjust; - poly_int64 final_adjust = frame.final_adjust; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; -- poly_int64 below_hard_fp_saved_regs_size -- = frame.below_hard_fp_saved_regs_size; - unsigned reg1 = frame.wb_push_candidate1; - unsigned reg2 = frame.wb_push_candidate2; - bool emit_frame_chain = frame.emit_frame_chain; -@@ -9752,8 +9752,8 @@ aarch64_expand_prologue (void) - - frame.hard_fp_offset); - gcc_assert (known_ge (chain_offset, 0)); - -- /* The offset of the bottom of the save area from the current SP. */ -- poly_int64 saved_regs_offset = chain_offset - below_hard_fp_saved_regs_size; -+ /* The offset of the current SP from the bottom of the static frame. */ -+ poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; - - if (emit_frame_chain) - { -@@ -9761,7 +9761,7 @@ aarch64_expand_prologue (void) - { - reg1 = R29_REGNUM; - reg2 = R30_REGNUM; -- aarch64_save_callee_saves (saved_regs_offset, reg1, reg2, -+ aarch64_save_callee_saves (bytes_below_sp, reg1, reg2, - false, false); - } - else -@@ -9801,7 +9801,7 @@ aarch64_expand_prologue (void) - emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); - } - -- aarch64_save_callee_saves (saved_regs_offset, R0_REGNUM, R30_REGNUM, -+ aarch64_save_callee_saves (bytes_below_sp, R0_REGNUM, R30_REGNUM, - callee_adjust != 0 || emit_frame_chain, - emit_frame_chain); - if (maybe_ne (sve_callee_adjust, 0)) -@@ -9811,16 +9811,17 @@ aarch64_expand_prologue (void) - aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, - sve_callee_adjust, - !frame_pointer_needed, false); -- saved_regs_offset += sve_callee_adjust; -+ bytes_below_sp -= sve_callee_adjust; - } -- aarch64_save_callee_saves (saved_regs_offset, P0_REGNUM, P15_REGNUM, -+ aarch64_save_callee_saves (bytes_below_sp, P0_REGNUM, P15_REGNUM, - false, emit_frame_chain); -- aarch64_save_callee_saves (saved_regs_offset, V0_REGNUM, V31_REGNUM, -+ aarch64_save_callee_saves (bytes_below_sp, V0_REGNUM, V31_REGNUM, - callee_adjust != 0 || emit_frame_chain, - emit_frame_chain); - - /* We may need to probe the final adjustment if it is larger than the guard - that is assumed by the called. */ -+ gcc_assert (known_eq (bytes_below_sp, final_adjust)); - aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, - !frame_pointer_needed, true); - } -@@ -9855,7 +9856,6 @@ aarch64_expand_epilogue (bool for_sibcall) - poly_int64 initial_adjust = frame.initial_adjust; - HOST_WIDE_INT callee_adjust = frame.callee_adjust; - poly_int64 final_adjust = frame.final_adjust; -- poly_int64 callee_offset = frame.callee_offset; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; - unsigned reg1 = frame.wb_pop_candidate1; -@@ -9925,9 +9925,9 @@ aarch64_expand_epilogue (bool for_sibcall) - - /* Restore the vector registers before the predicate registers, - so that we can use P4 as a temporary for big-endian SVE frames. */ -- aarch64_restore_callee_saves (callee_offset, V0_REGNUM, V31_REGNUM, -+ aarch64_restore_callee_saves (final_adjust, V0_REGNUM, V31_REGNUM, - callee_adjust != 0, &cfi_ops); -- aarch64_restore_callee_saves (callee_offset, P0_REGNUM, P15_REGNUM, -+ aarch64_restore_callee_saves (final_adjust, P0_REGNUM, P15_REGNUM, - false, &cfi_ops); - if (maybe_ne (sve_callee_adjust, 0)) - aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); -@@ -9935,7 +9935,7 @@ aarch64_expand_epilogue (bool for_sibcall) - /* When shadow call stack is enabled, the scs_pop in the epilogue will - restore x30, we don't need to restore x30 again in the traditional - way. */ -- aarch64_restore_callee_saves (callee_offset - sve_callee_adjust, -+ aarch64_restore_callee_saves (final_adjust + sve_callee_adjust, - R0_REGNUM, last_gpr, - callee_adjust != 0, &cfi_ops); - -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index de68ff7202fc..94fca4b94716 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -907,10 +907,6 @@ struct GTY (()) aarch64_frame - It is zero when no push is used. */ - HOST_WIDE_INT callee_adjust; - -- /* The offset from SP to the callee-save registers after initial_adjust. -- It may be non-zero if no push is used (ie. callee_adjust == 0). */ -- poly_int64 callee_offset; -- - /* The size of the stack adjustment before saving or after restoring - SVE registers. */ - poly_int64 sve_callee_adjust; --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0016-aarch64-Only-calculate-chain_offset-if-there-is-a-ch.patch b/packages/gcc/12.3.0/0016-aarch64-Only-calculate-chain_offset-if-there-is-a-ch.patch deleted file mode 100644 index edf1ad56..00000000 --- a/packages/gcc/12.3.0/0016-aarch64-Only-calculate-chain_offset-if-there-is-a-ch.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 2b983f9064d808daf909bde1d4a13980934a7e6e Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:51 +0100 -Subject: [PATCH 16/28] aarch64: Only calculate chain_offset if there is a - chain - -After previous patches, it is no longer necessary to calculate -a chain_offset in cases where there is no chain record. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the - calculation of chain_offset into the emit_frame_chain block. ---- - gcc/config/aarch64/aarch64.cc | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index e79551af41df..d71a042d6112 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -9747,16 +9747,16 @@ aarch64_expand_prologue (void) - if (callee_adjust != 0) - aarch64_push_regs (reg1, reg2, callee_adjust); - -- /* The offset of the frame chain record (if any) from the current SP. */ -- poly_int64 chain_offset = (initial_adjust + callee_adjust -- - frame.hard_fp_offset); -- gcc_assert (known_ge (chain_offset, 0)); -- - /* The offset of the current SP from the bottom of the static frame. */ - poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; - - if (emit_frame_chain) - { -+ /* The offset of the frame chain record (if any) from the current SP. */ -+ poly_int64 chain_offset = (initial_adjust + callee_adjust -+ - frame.hard_fp_offset); -+ gcc_assert (known_ge (chain_offset, 0)); -+ - if (callee_adjust == 0) - { - reg1 = R29_REGNUM; --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0017-aarch64-Rename-locals_offset-to-bytes_above_locals.patch b/packages/gcc/12.3.0/0017-aarch64-Rename-locals_offset-to-bytes_above_locals.patch deleted file mode 100644 index 399f589c..00000000 --- a/packages/gcc/12.3.0/0017-aarch64-Rename-locals_offset-to-bytes_above_locals.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 0a0a824808d1dec51004fb5805c1a0ae2a35433f Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:51 +0100 -Subject: [PATCH 17/28] aarch64: Rename locals_offset to bytes_above_locals -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -locals_offset was described as: - - /* Offset from the base of the frame (incomming SP) to the - top of the locals area. This value is always a multiple of - STACK_BOUNDARY. */ - -This is implicitly an “upside down” view of the frame: the incoming -SP is at offset 0, and anything N bytes below the incoming SP is at -offset N (rather than -N). - -However, reg_offset instead uses a “right way up” view; that is, -it views offsets in address terms. Something above X is at a -positive offset from X and something below X is at a negative -offset from X. - -Also, even on FRAME_GROWS_DOWNWARD targets like AArch64, -target-independent code views offsets in address terms too: -locals are allocated at negative offsets to virtual_stack_vars. - -It seems confusing to have *_offset fields of the same structure -using different polarities like this. This patch tries to avoid -that by renaming locals_offset to bytes_above_locals. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to... - (aarch64_frame::bytes_above_locals): ...this. - * config/aarch64/aarch64.cc (aarch64_layout_frame) - (aarch64_initial_elimination_offset): Update accordingly. ---- - gcc/config/aarch64/aarch64.cc | 6 +++--- - gcc/config/aarch64/aarch64.h | 6 +++--- - 2 files changed, 6 insertions(+), 6 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index d71a042d6112..d4ec352ba98a 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8337,7 +8337,7 @@ aarch64_layout_frame (void) - STACK_BOUNDARY / BITS_PER_UNIT)); - frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; - -- frame.locals_offset = frame.saved_varargs_size; -+ frame.bytes_above_locals = frame.saved_varargs_size; - - frame.initial_adjust = 0; - frame.final_adjust = 0; -@@ -12578,13 +12578,13 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to) - return frame.hard_fp_offset; - - if (from == FRAME_POINTER_REGNUM) -- return frame.hard_fp_offset - frame.locals_offset; -+ return frame.hard_fp_offset - frame.bytes_above_locals; - } - - if (to == STACK_POINTER_REGNUM) - { - if (from == FRAME_POINTER_REGNUM) -- return frame.frame_size - frame.locals_offset; -+ return frame.frame_size - frame.bytes_above_locals; - } - - return frame.frame_size; -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 94fca4b94716..bf46e6124aa9 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -885,10 +885,10 @@ struct GTY (()) aarch64_frame - always a multiple of STACK_BOUNDARY. */ - poly_int64 bytes_below_hard_fp; - -- /* Offset from the base of the frame (incomming SP) to the -- top of the locals area. This value is always a multiple of -+ /* The number of bytes between the top of the locals area and the top -+ of the frame (the incomming SP). This value is always a multiple of - STACK_BOUNDARY. */ -- poly_int64 locals_offset; -+ poly_int64 bytes_above_locals; - - /* Offset from the base of the frame (incomming SP) to the - hard_frame_pointer. This value is always a multiple of --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0018-aarch64-Rename-hard_fp_offset-to-bytes_above_hard_fp.patch b/packages/gcc/12.3.0/0018-aarch64-Rename-hard_fp_offset-to-bytes_above_hard_fp.patch deleted file mode 100644 index 37844832..00000000 --- a/packages/gcc/12.3.0/0018-aarch64-Rename-hard_fp_offset-to-bytes_above_hard_fp.patch +++ /dev/null @@ -1,148 +0,0 @@ -From 3fbf0789202b30a67b12e1fb785c7130f098d665 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:52 +0100 -Subject: [PATCH 18/28] aarch64: Rename hard_fp_offset to bytes_above_hard_fp -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Similarly to the previous locals_offset patch, hard_fp_offset -was described as: - - /* Offset from the base of the frame (incomming SP) to the - hard_frame_pointer. This value is always a multiple of - STACK_BOUNDARY. */ - poly_int64 hard_fp_offset; - -which again took an “upside-down” view: higher offsets meant lower -addresses. This patch renames the field to bytes_above_hard_fp instead. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename - to... - (aarch64_frame::bytes_above_hard_fp): ...this. - * config/aarch64/aarch64.cc (aarch64_layout_frame) - (aarch64_expand_prologue): Update accordingly. - (aarch64_initial_elimination_offset): Likewise. ---- - gcc/config/aarch64/aarch64.cc | 26 +++++++++++++------------- - gcc/config/aarch64/aarch64.h | 6 +++--- - 2 files changed, 16 insertions(+), 16 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index d4ec352ba98a..3c4052740e7a 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8329,7 +8329,7 @@ aarch64_layout_frame (void) - + get_frame_size (), - STACK_BOUNDARY / BITS_PER_UNIT); - -- frame.hard_fp_offset -+ frame.bytes_above_hard_fp - = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; - - /* Both these values are already aligned. */ -@@ -8378,13 +8378,13 @@ aarch64_layout_frame (void) - else if (frame.wb_pop_candidate1 != INVALID_REGNUM) - max_push_offset = 256; - -- HOST_WIDE_INT const_size, const_below_saved_regs, const_fp_offset; -+ HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; - HOST_WIDE_INT const_saved_regs_size; - if (known_eq (frame.saved_regs_size, 0)) - frame.initial_adjust = frame.frame_size; - else if (frame.frame_size.is_constant (&const_size) - && const_size < max_push_offset -- && known_eq (frame.hard_fp_offset, const_size)) -+ && known_eq (frame.bytes_above_hard_fp, const_size)) - { - /* Simple, small frame with no data below the saved registers. - -@@ -8401,8 +8401,8 @@ aarch64_layout_frame (void) - case that it hardly seems worth the effort though. */ - && (!saves_below_hard_fp_p || const_below_saved_regs == 0) - && !(cfun->calls_alloca -- && frame.hard_fp_offset.is_constant (&const_fp_offset) -- && const_fp_offset < max_push_offset)) -+ && frame.bytes_above_hard_fp.is_constant (&const_above_fp) -+ && const_above_fp < max_push_offset)) - { - /* Frame with small area below the saved registers: - -@@ -8420,12 +8420,12 @@ aarch64_layout_frame (void) - sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size - save SVE registers relative to SP - sub sp, sp, bytes_below_saved_regs */ -- frame.initial_adjust = (frame.hard_fp_offset -+ frame.initial_adjust = (frame.bytes_above_hard_fp - + frame.below_hard_fp_saved_regs_size); - frame.final_adjust = frame.bytes_below_saved_regs; - } -- else if (frame.hard_fp_offset.is_constant (&const_fp_offset) -- && const_fp_offset < max_push_offset) -+ else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) -+ && const_above_fp < max_push_offset) - { - /* Frame with large area below the saved registers, or with SVE saves, - but with a small area above: -@@ -8435,7 +8435,7 @@ aarch64_layout_frame (void) - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ -- frame.callee_adjust = const_fp_offset; -+ frame.callee_adjust = const_above_fp; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } -@@ -8450,7 +8450,7 @@ aarch64_layout_frame (void) - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ -- frame.initial_adjust = frame.hard_fp_offset; -+ frame.initial_adjust = frame.bytes_above_hard_fp; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } -@@ -9754,7 +9754,7 @@ aarch64_expand_prologue (void) - { - /* The offset of the frame chain record (if any) from the current SP. */ - poly_int64 chain_offset = (initial_adjust + callee_adjust -- - frame.hard_fp_offset); -+ - frame.bytes_above_hard_fp); - gcc_assert (known_ge (chain_offset, 0)); - - if (callee_adjust == 0) -@@ -12575,10 +12575,10 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to) - if (to == HARD_FRAME_POINTER_REGNUM) - { - if (from == ARG_POINTER_REGNUM) -- return frame.hard_fp_offset; -+ return frame.bytes_above_hard_fp; - - if (from == FRAME_POINTER_REGNUM) -- return frame.hard_fp_offset - frame.bytes_above_locals; -+ return frame.bytes_above_hard_fp - frame.bytes_above_locals; - } - - if (to == STACK_POINTER_REGNUM) -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index bf46e6124aa9..dd1f403f9393 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -890,10 +890,10 @@ struct GTY (()) aarch64_frame - STACK_BOUNDARY. */ - poly_int64 bytes_above_locals; - -- /* Offset from the base of the frame (incomming SP) to the -- hard_frame_pointer. This value is always a multiple of -+ /* The number of bytes between the hard_frame_pointer and the top of -+ the frame (the incomming SP). This value is always a multiple of - STACK_BOUNDARY. */ -- poly_int64 hard_fp_offset; -+ poly_int64 bytes_above_hard_fp; - - /* The size of the frame. This value is the offset from base of the - frame (incomming SP) to the stack_pointer. This value is always --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0019-aarch64-Tweak-frame_size-comment.patch b/packages/gcc/12.3.0/0019-aarch64-Tweak-frame_size-comment.patch deleted file mode 100644 index b80eae96..00000000 --- a/packages/gcc/12.3.0/0019-aarch64-Tweak-frame_size-comment.patch +++ /dev/null @@ -1,35 +0,0 @@ -From aac8b31379ac3bbd14fc6427dce23f56e54e8485 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:52 +0100 -Subject: [PATCH 19/28] aarch64: Tweak frame_size comment -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch fixes another case in which a value was described with -an “upside-down” view. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment. ---- - gcc/config/aarch64/aarch64.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index dd1f403f9393..700524ae22bf 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -895,8 +895,8 @@ struct GTY (()) aarch64_frame - STACK_BOUNDARY. */ - poly_int64 bytes_above_hard_fp; - -- /* The size of the frame. This value is the offset from base of the -- frame (incomming SP) to the stack_pointer. This value is always -+ /* The size of the frame, i.e. the number of bytes between the bottom -+ of the outgoing arguments and the incoming SP. This value is always - a multiple of STACK_BOUNDARY. */ - poly_int64 frame_size; - --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0020-aarch64-Measure-reg_offset-from-the-bottom-of-the-fr.patch b/packages/gcc/12.3.0/0020-aarch64-Measure-reg_offset-from-the-bottom-of-the-fr.patch deleted file mode 100644 index 30de1b36..00000000 --- a/packages/gcc/12.3.0/0020-aarch64-Measure-reg_offset-from-the-bottom-of-the-fr.patch +++ /dev/null @@ -1,196 +0,0 @@ -From 8d5506a8aeb8dd7e8b209a3663b07688478f76b9 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:53 +0100 -Subject: [PATCH 20/28] aarch64: Measure reg_offset from the bottom of the - frame - -reg_offset was measured from the bottom of the saved register area. -This made perfect sense with the original layout, since the bottom -of the saved register area was also the hard frame pointer address. -It became slightly less obvious with SVE, since we save SVE -registers below the hard frame pointer, but it still made sense. - -However, if we want to allow different frame layouts, it's more -convenient and obvious to measure reg_offset from the bottom of -the frame. After previous patches, it's also a slight simplification -in its own right. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame): Add comment above - reg_offset. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets - from the bottom of the frame, rather than the bottom of the saved - register area. Measure reg_offset from the bottom of the frame - rather than the bottom of the saved register area. - (aarch64_save_callee_saves): Update accordingly. - (aarch64_restore_callee_saves): Likewise. - (aarch64_get_separate_components): Likewise. - (aarch64_process_components): Likewise. ---- - gcc/config/aarch64/aarch64.cc | 53 ++++++++++++++++------------------- - gcc/config/aarch64/aarch64.h | 3 ++ - 2 files changed, 27 insertions(+), 29 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 3c4052740e7a..97dd077844b4 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8139,7 +8139,6 @@ aarch64_needs_frame_chain (void) - static void - aarch64_layout_frame (void) - { -- poly_int64 offset = 0; - int regno, last_fp_reg = INVALID_REGNUM; - machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM); - poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); -@@ -8217,7 +8216,9 @@ aarch64_layout_frame (void) - gcc_assert (crtl->is_leaf - || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); - -- frame.bytes_below_saved_regs = crtl->outgoing_args_size; -+ poly_int64 offset = crtl->outgoing_args_size; -+ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); -+ frame.bytes_below_saved_regs = offset; - - /* Now assign stack slots for the registers. Start with the predicate - registers, since predicate LDR and STR have a relatively small -@@ -8229,7 +8230,8 @@ aarch64_layout_frame (void) - offset += BYTES_PER_SVE_PRED; - } - -- if (maybe_ne (offset, 0)) -+ poly_int64 saved_prs_size = offset - frame.bytes_below_saved_regs; -+ if (maybe_ne (saved_prs_size, 0)) - { - /* If we have any vector registers to save above the predicate registers, - the offset of the vector register save slots need to be a multiple -@@ -8247,10 +8249,10 @@ aarch64_layout_frame (void) - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - else - { -- if (known_le (offset, vector_save_size)) -- offset = vector_save_size; -- else if (known_le (offset, vector_save_size * 2)) -- offset = vector_save_size * 2; -+ if (known_le (saved_prs_size, vector_save_size)) -+ offset = frame.bytes_below_saved_regs + vector_save_size; -+ else if (known_le (saved_prs_size, vector_save_size * 2)) -+ offset = frame.bytes_below_saved_regs + vector_save_size * 2; - else - gcc_unreachable (); - } -@@ -8267,9 +8269,10 @@ aarch64_layout_frame (void) - - /* OFFSET is now the offset of the hard frame pointer from the bottom - of the callee save area. */ -- bool saves_below_hard_fp_p = maybe_ne (offset, 0); -- frame.below_hard_fp_saved_regs_size = offset; -- frame.bytes_below_hard_fp = offset + frame.bytes_below_saved_regs; -+ frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; -+ bool saves_below_hard_fp_p -+ = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); -+ frame.bytes_below_hard_fp = offset; - if (frame.emit_frame_chain) - { - /* FP and LR are placed in the linkage record. */ -@@ -8320,9 +8323,10 @@ aarch64_layout_frame (void) - - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - -- frame.saved_regs_size = offset; -+ frame.saved_regs_size = offset - frame.bytes_below_saved_regs; - -- poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; -+ poly_int64 varargs_and_saved_regs_size -+ = frame.saved_regs_size + frame.saved_varargs_size; - - poly_int64 saved_regs_and_above - = aligned_upper_bound (varargs_and_saved_regs_size -@@ -8790,9 +8794,7 @@ aarch64_save_callee_saves (poly_int64 bytes_below_sp, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = (frame.reg_offset[regno] -- + frame.bytes_below_saved_regs -- - bytes_below_sp); -+ offset = frame.reg_offset[regno] - bytes_below_sp; - rtx base_rtx = stack_pointer_rtx; - poly_int64 sp_offset = offset; - -@@ -8899,9 +8901,7 @@ aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = (frame.reg_offset[regno] -- + frame.bytes_below_saved_regs -- - bytes_below_sp); -+ offset = frame.reg_offset[regno] - bytes_below_sp; - rtx base_rtx = stack_pointer_rtx; - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, -@@ -9040,14 +9040,12 @@ aarch64_get_separate_components (void) - it as a stack probe for -fstack-clash-protection. */ - if (flag_stack_clash_protection - && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) -- && known_eq (offset, 0)) -+ && known_eq (offset, frame.bytes_below_saved_regs)) - continue; - - /* Get the offset relative to the register we'll use. */ - if (frame_pointer_needed) -- offset -= frame.below_hard_fp_saved_regs_size; -- else -- offset += frame.bytes_below_saved_regs; -+ offset -= frame.bytes_below_hard_fp; - - /* Check that we can access the stack slot of the register with one - direct load with no adjustments needed. */ -@@ -9194,9 +9192,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - rtx reg = gen_rtx_REG (mode, regno); - poly_int64 offset = frame.reg_offset[regno]; - if (frame_pointer_needed) -- offset -= frame.below_hard_fp_saved_regs_size; -- else -- offset += frame.bytes_below_saved_regs; -+ offset -= frame.bytes_below_hard_fp; - - rtx addr = plus_constant (Pmode, ptr_reg, offset); - rtx mem = gen_frame_mem (mode, addr); -@@ -9248,9 +9244,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - /* REGNO2 can be saved/restored in a pair with REGNO. */ - rtx reg2 = gen_rtx_REG (mode, regno2); - if (frame_pointer_needed) -- offset2 -= frame.below_hard_fp_saved_regs_size; -- else -- offset2 += frame.bytes_below_saved_regs; -+ offset2 -= frame.bytes_below_hard_fp; - rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); - rtx mem2 = gen_frame_mem (mode, addr2); - rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) -@@ -9366,7 +9360,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - if (final_adjustment_p - && known_eq (frame.below_hard_fp_saved_regs_size, 0)) - { -- poly_int64 lr_offset = frame.reg_offset[LR_REGNUM]; -+ poly_int64 lr_offset = (frame.reg_offset[LR_REGNUM] -+ - frame.bytes_below_saved_regs); - if (known_ge (lr_offset, 0)) - min_probe_threshold -= lr_offset.to_constant (); - else -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 700524ae22bf..b61358370732 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -860,6 +860,9 @@ extern enum aarch64_processor aarch64_tune; - #ifdef HAVE_POLY_INT_H - struct GTY (()) aarch64_frame - { -+ /* The offset from the bottom of the static frame (the bottom of the -+ outgoing arguments) of each register save slot, or -2 if no save is -+ needed. */ - poly_int64 reg_offset[LAST_SAVED_REGNUM + 1]; - - /* The number of extra stack bytes taken up by register varargs. --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0021-aarch64-Simplify-top-of-frame-allocation.patch b/packages/gcc/12.3.0/0021-aarch64-Simplify-top-of-frame-allocation.patch deleted file mode 100644 index 78ca6aa6..00000000 --- a/packages/gcc/12.3.0/0021-aarch64-Simplify-top-of-frame-allocation.patch +++ /dev/null @@ -1,55 +0,0 @@ -From b47766614df3b9df878262efb2ad73aaac108363 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:53 +0100 -Subject: [PATCH 21/28] aarch64: Simplify top of frame allocation - -After previous patches, it no longer really makes sense to allocate -the top of the frame in terms of varargs_and_saved_regs_size and -saved_regs_and_above. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify - the allocation of the top of the frame. ---- - gcc/config/aarch64/aarch64.cc | 23 ++++++++--------------- - 1 file changed, 8 insertions(+), 15 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 97dd077844b4..81935852d5b2 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8325,23 +8325,16 @@ aarch64_layout_frame (void) - - frame.saved_regs_size = offset - frame.bytes_below_saved_regs; - -- poly_int64 varargs_and_saved_regs_size -- = frame.saved_regs_size + frame.saved_varargs_size; -+ offset += get_frame_size (); -+ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -+ auto top_of_locals = offset; - -- poly_int64 saved_regs_and_above -- = aligned_upper_bound (varargs_and_saved_regs_size -- + get_frame_size (), -- STACK_BOUNDARY / BITS_PER_UNIT); -+ offset += frame.saved_varargs_size; -+ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); -+ frame.frame_size = offset; - -- frame.bytes_above_hard_fp -- = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; -- -- /* Both these values are already aligned. */ -- gcc_assert (multiple_p (frame.bytes_below_saved_regs, -- STACK_BOUNDARY / BITS_PER_UNIT)); -- frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; -- -- frame.bytes_above_locals = frame.saved_varargs_size; -+ frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; -+ frame.bytes_above_locals = frame.frame_size - top_of_locals; - - frame.initial_adjust = 0; - frame.final_adjust = 0; --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0022-aarch64-Minor-initial-adjustment-tweak.patch b/packages/gcc/12.3.0/0022-aarch64-Minor-initial-adjustment-tweak.patch deleted file mode 100644 index 16d3ad30..00000000 --- a/packages/gcc/12.3.0/0022-aarch64-Minor-initial-adjustment-tweak.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 08f71b4bb28fb74d20e8d2927a557e8119ce9f4d Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:54 +0100 -Subject: [PATCH 22/28] aarch64: Minor initial adjustment tweak - -This patch just changes a calculation of initial_adjust -to one that makes it slightly more obvious that the total -adjustment is frame.frame_size. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak - calculation of initial_adjust for frames in which all saves - are SVE saves. ---- - gcc/config/aarch64/aarch64.cc | 5 ++--- - 1 file changed, 2 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 81935852d5b2..4d9fcf3d1623 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8414,11 +8414,10 @@ aarch64_layout_frame (void) - { - /* Frame in which all saves are SVE saves: - -- sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size -+ sub sp, sp, frame_size - bytes_below_saved_regs - save SVE registers relative to SP - sub sp, sp, bytes_below_saved_regs */ -- frame.initial_adjust = (frame.bytes_above_hard_fp -- + frame.below_hard_fp_saved_regs_size); -+ frame.initial_adjust = frame.frame_size - frame.bytes_below_saved_regs; - frame.final_adjust = frame.bytes_below_saved_regs; - } - else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0023-aarch64-Tweak-stack-clash-boundary-condition.patch b/packages/gcc/12.3.0/0023-aarch64-Tweak-stack-clash-boundary-condition.patch deleted file mode 100644 index 44e82a3d..00000000 --- a/packages/gcc/12.3.0/0023-aarch64-Tweak-stack-clash-boundary-condition.patch +++ /dev/null @@ -1,125 +0,0 @@ -From f22315d5c19e8310e4dc880fd509678fd291fca8 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:54 +0100 -Subject: [PATCH 23/28] aarch64: Tweak stack clash boundary condition - -The AArch64 ABI says that, when stack clash protection is used, -there can be a maximum of 1KiB of unprobed space at sp on entry -to a function. Therefore, we need to probe when allocating ->= guard_size - 1KiB of data (>= rather than >). This is what -GCC does. - -If an allocation is exactly guard_size bytes, it is enough to allocate -those bytes and probe once at offset 1024. It isn't possible to use a -single probe at any other offset: higher would conmplicate later code, -by leaving more unprobed space than usual, while lower would risk -leaving an entire page unprobed. For simplicity, the code probes all -allocations at offset 1024. - -Some register saves also act as probes. If we need to allocate -more space below the last such register save probe, we need to -probe the allocation if it is > 1KiB. Again, this allocation is -then sometimes (but not always) probed at offset 1024. This sort of -allocation is currently only used for outgoing arguments, which are -rarely this big. - -However, the code also probed if this final outgoing-arguments -allocation was == 1KiB, rather than just > 1KiB. This isn't -necessary, since the register save then probes at offset 1024 -as required. Continuing to probe allocations of exactly 1KiB -would complicate later patches. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): - Don't probe final allocations that are exactly 1KiB in size (after - unprobed space above the final allocation has been deducted). - -gcc/testsuite/ - * gcc.target/aarch64/stack-check-prologue-17.c: New test. ---- - gcc/config/aarch64/aarch64.cc | 4 +- - .../aarch64/stack-check-prologue-17.c | 55 +++++++++++++++++++ - 2 files changed, 58 insertions(+), 1 deletion(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 4d9fcf3d1623..34c1d8614cd9 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -9333,9 +9333,11 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - HOST_WIDE_INT guard_size - = 1 << param_stack_clash_protection_guard_size; - HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; -+ HOST_WIDE_INT byte_sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT; -+ gcc_assert (multiple_p (poly_size, byte_sp_alignment)); - HOST_WIDE_INT min_probe_threshold - = (final_adjustment_p -- ? guard_used_by_caller -+ ? guard_used_by_caller + byte_sp_alignment - : guard_size - guard_used_by_caller); - /* When doing the final adjustment for the outgoing arguments, take into - account any unprobed space there is above the current SP. There are -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -new file mode 100644 -index 000000000000..0d8a25d73a24 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -@@ -0,0 +1,55 @@ -+/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void f(int, ...); -+void g(); -+ -+/* -+** test1: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1024 -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test1(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test2: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1040 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test2(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x); -+ } -+ g(); -+ return 1; -+} --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0024-aarch64-Put-LR-save-probe-in-first-16-bytes.patch b/packages/gcc/12.3.0/0024-aarch64-Put-LR-save-probe-in-first-16-bytes.patch deleted file mode 100644 index 7ed364f2..00000000 --- a/packages/gcc/12.3.0/0024-aarch64-Put-LR-save-probe-in-first-16-bytes.patch +++ /dev/null @@ -1,406 +0,0 @@ -From 15e18831bf98fd25af098b970ebf0c9a6200a34b Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:55 +0100 -Subject: [PATCH 24/28] aarch64: Put LR save probe in first 16 bytes - --fstack-clash-protection uses the save of LR as a probe for the next -allocation. The next allocation could be: - -* another part of the static frame, e.g. when allocating SVE save slots - or outgoing arguments - -* an alloca in the same function - -* an allocation made by a callee function - -However, when -fomit-frame-pointer is used, the LR save slot is placed -above the other GPR save slots. It could therefore be up to 80 bytes -above the base of the GPR save area (which is also the hard fp address). - -aarch64_allocate_and_probe_stack_space took this into account when -deciding how much subsequent space could be allocated without needing -a probe. However, it interacted badly with: - - /* If doing a small final adjustment, we always probe at offset 0. - This is done to avoid issues when LR is not at position 0 or when - the final adjustment is smaller than the probing offset. */ - else if (final_adjustment_p && rounded_size == 0) - residual_probe_offset = 0; - -which forces any allocation that is smaller than the guard page size -to be probed at offset 0 rather than the usual offset 1024. It was -therefore possible to construct cases in which we had: - -* a probe using LR at SP + 80 bytes (or some other value >= 16) -* an allocation of the guard page size - 16 bytes -* a probe at SP + 0 - -which allocates guard page size + 64 consecutive unprobed bytes. - -This patch requires the LR probe to be in the first 16 bytes of the -save area when stack clash protection is active. Doing it -unconditionally would cause code-quality regressions. - -Putting LR before other registers prevents push/pop allocation -when shadow call stacks are enabled, since LR is restored -separately from the other callee-saved registers. - -The new comment doesn't say that the probe register is required -to be LR, since a later patch removes that restriction. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that - the LR save slot is in the first 16 bytes of the register save area. - Only form STP/LDP push/pop candidates if both registers are valid. - (aarch64_allocate_and_probe_stack_space): Remove workaround for - when LR was not in the first 16 bytes. - -gcc/testsuite/ - * gcc.target/aarch64/stack-check-prologue-18.c: New test. - * gcc.target/aarch64/stack-check-prologue-19.c: Likewise. - * gcc.target/aarch64/stack-check-prologue-20.c: Likewise. ---- - gcc/config/aarch64/aarch64.cc | 72 ++++++------- - .../aarch64/stack-check-prologue-18.c | 100 ++++++++++++++++++ - .../aarch64/stack-check-prologue-19.c | 100 ++++++++++++++++++ - .../aarch64/stack-check-prologue-20.c | 3 + - 4 files changed, 233 insertions(+), 42 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 34c1d8614cd9..16433fb70f4f 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8273,26 +8273,34 @@ aarch64_layout_frame (void) - bool saves_below_hard_fp_p - = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); - frame.bytes_below_hard_fp = offset; -+ -+ auto allocate_gpr_slot = [&](unsigned int regno) -+ { -+ frame.reg_offset[regno] = offset; -+ if (frame.wb_push_candidate1 == INVALID_REGNUM) -+ frame.wb_push_candidate1 = regno; -+ else if (frame.wb_push_candidate2 == INVALID_REGNUM) -+ frame.wb_push_candidate2 = regno; -+ offset += UNITS_PER_WORD; -+ }; -+ - if (frame.emit_frame_chain) - { - /* FP and LR are placed in the linkage record. */ -- frame.reg_offset[R29_REGNUM] = offset; -- frame.wb_push_candidate1 = R29_REGNUM; -- frame.reg_offset[R30_REGNUM] = offset + UNITS_PER_WORD; -- frame.wb_push_candidate2 = R30_REGNUM; -- offset += 2 * UNITS_PER_WORD; -+ allocate_gpr_slot (R29_REGNUM); -+ allocate_gpr_slot (R30_REGNUM); - } -+ else if (flag_stack_clash_protection -+ && known_eq (frame.reg_offset[R30_REGNUM], SLOT_REQUIRED)) -+ /* Put the LR save slot first, since it makes a good choice of probe -+ for stack clash purposes. The idea is that the link register usually -+ has to be saved before a call anyway, and so we lose little by -+ stopping it from being individually shrink-wrapped. */ -+ allocate_gpr_slot (R30_REGNUM); - - for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) -- { -- frame.reg_offset[regno] = offset; -- if (frame.wb_push_candidate1 == INVALID_REGNUM) -- frame.wb_push_candidate1 = regno; -- else if (frame.wb_push_candidate2 == INVALID_REGNUM) -- frame.wb_push_candidate2 = regno; -- offset += UNITS_PER_WORD; -- } -+ allocate_gpr_slot (regno); - - poly_int64 max_int_offset = offset; - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -@@ -8370,10 +8378,13 @@ aarch64_layout_frame (void) - max_push_offset to 0, because no registers are popped at this time, - so callee_adjust cannot be adjusted. */ - HOST_WIDE_INT max_push_offset = 0; -- if (frame.wb_pop_candidate2 != INVALID_REGNUM) -- max_push_offset = 512; -- else if (frame.wb_pop_candidate1 != INVALID_REGNUM) -- max_push_offset = 256; -+ if (frame.wb_pop_candidate1 != INVALID_REGNUM) -+ { -+ if (frame.wb_pop_candidate2 != INVALID_REGNUM) -+ max_push_offset = 512; -+ else -+ max_push_offset = 256; -+ } - - HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; - HOST_WIDE_INT const_saved_regs_size; -@@ -9339,29 +9350,6 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - = (final_adjustment_p - ? guard_used_by_caller + byte_sp_alignment - : guard_size - guard_used_by_caller); -- /* When doing the final adjustment for the outgoing arguments, take into -- account any unprobed space there is above the current SP. There are -- two cases: -- -- - When saving SVE registers below the hard frame pointer, we force -- the lowest save to take place in the prologue before doing the final -- adjustment (i.e. we don't allow the save to be shrink-wrapped). -- This acts as a probe at SP, so there is no unprobed space. -- -- - When there are no SVE register saves, we use the store of the link -- register as a probe. We can't assume that LR was saved at position 0 -- though, so treat any space below it as unprobed. */ -- if (final_adjustment_p -- && known_eq (frame.below_hard_fp_saved_regs_size, 0)) -- { -- poly_int64 lr_offset = (frame.reg_offset[LR_REGNUM] -- - frame.bytes_below_saved_regs); -- if (known_ge (lr_offset, 0)) -- min_probe_threshold -= lr_offset.to_constant (); -- else -- gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); -- } -- - poly_int64 frame_size = frame.frame_size; - - /* We should always have a positive probe threshold. */ -@@ -9541,8 +9529,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - if (final_adjustment_p && rounded_size != 0) - min_probe_threshold = 0; - /* If doing a small final adjustment, we always probe at offset 0. -- This is done to avoid issues when LR is not at position 0 or when -- the final adjustment is smaller than the probing offset. */ -+ This is done to avoid issues when the final adjustment is smaller -+ than the probing offset. */ - else if (final_adjustment_p && rounded_size == 0) - residual_probe_offset = 0; - -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -new file mode 100644 -index 000000000000..82447d20fff5 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -@@ -0,0 +1,100 @@ -+/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void f(int, ...); -+void g(); -+ -+/* -+** test1: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #4064 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+** str x26, \[sp, #?4128\] -+** ... -+*/ -+int test1(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test2: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1040 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test2(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test3: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1024 -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test3(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -new file mode 100644 -index 000000000000..73ac3e4e4eb0 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -@@ -0,0 +1,100 @@ -+/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void f(int, ...); -+void g(); -+ -+/* -+** test1: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #4064 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+** str x26, \[sp, #?4128\] -+** ... -+*/ -+int test1(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test2: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1040 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test2(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test3: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1024 -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test3(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c -new file mode 100644 -index 000000000000..690aae8dfd5b ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c -@@ -0,0 +1,3 @@ -+/* { dg-options "-O2 -fstack-protector-all -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */ -+ -+#include "stack-check-prologue-19.c" --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0025-aarch64-Simplify-probe-of-final-frame-allocation.patch b/packages/gcc/12.3.0/0025-aarch64-Simplify-probe-of-final-frame-allocation.patch deleted file mode 100644 index fcd778e4..00000000 --- a/packages/gcc/12.3.0/0025-aarch64-Simplify-probe-of-final-frame-allocation.patch +++ /dev/null @@ -1,123 +0,0 @@ -From c4f0e121faa36342f1d21919e54a05ad841c4f86 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:55 +0100 -Subject: [PATCH 25/28] aarch64: Simplify probe of final frame allocation - -Previous patches ensured that the final frame allocation only needs -a probe when the size is strictly greater than 1KiB. It's therefore -safe to use the normal 1024 probe offset in all cases. - -The main motivation for doing this is to simplify the code and -remove the number of special cases. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): - Always probe the residual allocation at offset 1024, asserting - that that is in range. - -gcc/testsuite/ - * gcc.target/aarch64/stack-check-prologue-17.c: Expect the probe - to be at offset 1024 rather than offset 0. - * gcc.target/aarch64/stack-check-prologue-18.c: Likewise. - * gcc.target/aarch64/stack-check-prologue-19.c: Likewise. ---- - gcc/config/aarch64/aarch64.cc | 12 ++++-------- - .../gcc.target/aarch64/stack-check-prologue-17.c | 2 +- - .../gcc.target/aarch64/stack-check-prologue-18.c | 4 ++-- - .../gcc.target/aarch64/stack-check-prologue-19.c | 4 ++-- - 4 files changed, 9 insertions(+), 13 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 16433fb70f4f..8abf3d7a1e2b 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -9523,16 +9523,12 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - are still safe. */ - if (residual) - { -- HOST_WIDE_INT residual_probe_offset = guard_used_by_caller; -+ gcc_assert (guard_used_by_caller + byte_sp_alignment <= size); -+ - /* If we're doing final adjustments, and we've done any full page - allocations then any residual needs to be probed. */ - if (final_adjustment_p && rounded_size != 0) - min_probe_threshold = 0; -- /* If doing a small final adjustment, we always probe at offset 0. -- This is done to avoid issues when the final adjustment is smaller -- than the probing offset. */ -- else if (final_adjustment_p && rounded_size == 0) -- residual_probe_offset = 0; - - aarch64_sub_sp (temp1, temp2, residual, frame_related_p); - if (residual >= min_probe_threshold) -@@ -9543,8 +9539,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required." - "\n", residual); - -- emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, -- residual_probe_offset)); -+ emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, -+ guard_used_by_caller)); - emit_insn (gen_blockage ()); - } - } -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -index 0d8a25d73a24..f0ec1389771d 100644 ---- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -@@ -33,7 +33,7 @@ int test1(int z) { - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #1040 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -index 82447d20fff5..6383bec5ebcd 100644 ---- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -@@ -9,7 +9,7 @@ void g(); - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #4064 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -@@ -50,7 +50,7 @@ int test1(int z) { - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #1040 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -index 73ac3e4e4eb0..562039b5e9b8 100644 ---- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -@@ -9,7 +9,7 @@ void g(); - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #4064 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -@@ -50,7 +50,7 @@ int test1(int z) { - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #1040 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0026-aarch64-Explicitly-record-probe-registers-in-frame-i.patch b/packages/gcc/12.3.0/0026-aarch64-Explicitly-record-probe-registers-in-frame-i.patch deleted file mode 100644 index 4f13c582..00000000 --- a/packages/gcc/12.3.0/0026-aarch64-Explicitly-record-probe-registers-in-frame-i.patch +++ /dev/null @@ -1,278 +0,0 @@ -From 6f0ab0a9f46a17b68349ff6035aa776bf65f0575 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:56 +0100 -Subject: [PATCH 26/28] aarch64: Explicitly record probe registers in frame - info - -The stack frame is currently divided into three areas: - -A: the area above the hard frame pointer -B: the SVE saves below the hard frame pointer -C: the outgoing arguments - -If the stack frame is allocated in one chunk, the allocation needs a -probe if the frame size is >= guard_size - 1KiB. In addition, if the -function is not a leaf function, it must probe an address no more than -1KiB above the outgoing SP. We ensured the second condition by - -(1) using single-chunk allocations for non-leaf functions only if - the link register save slot is within 512 bytes of the bottom - of the frame; and - -(2) using the link register save as a probe (meaning, for instance, - that it can't be individually shrink wrapped) - -If instead the stack is allocated in multiple chunks, then: - -* an allocation involving only the outgoing arguments (C above) requires - a probe if the allocation size is > 1KiB - -* any other allocation requires a probe if the allocation size - is >= guard_size - 1KiB - -* second and subsequent allocations require the previous allocation - to probe at the bottom of the allocated area, regardless of the size - of that previous allocation - -The final point means that, unlike for single allocations, -it can be necessary to have both a non-SVE register probe and -an SVE register probe. For example: - -* allocate A, probe using a non-SVE register save -* allocate B, probe using an SVE register save -* allocate C - -The non-SVE register used in this case was again the link register. -It was previously used even if the link register save slot was some -bytes above the bottom of the non-SVE register saves, but an earlier -patch avoided that by putting the link register save slot first. - -As a belt-and-braces fix, this patch explicitly records which -probe registers we're using and allows the non-SVE probe to be -whichever register comes first (as for SVE). - -The patch also avoids unnecessary probes in sve/pcs/stack_clash_3.c. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe) - (aarch64_frame::hard_fp_save_and_probe): New fields. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them. - Rather than asserting that a leaf function saves LR, instead assert - that a leaf function saves something. - (aarch64_get_separate_components): Prevent the chosen probe - registers from being individually shrink-wrapped. - (aarch64_allocate_and_probe_stack_space): Remove workaround for - probe registers that aren't at the bottom of the previous allocation. - -gcc/testsuite/ - * gcc.target/aarch64/sve/pcs/stack_clash_3.c: Avoid redundant probes. ---- - gcc/config/aarch64/aarch64.cc | 68 +++++++++++++++---- - gcc/config/aarch64/aarch64.h | 8 +++ - .../aarch64/sve/pcs/stack_clash_3.c | 6 +- - 3 files changed, 64 insertions(+), 18 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 8abf3d7a1e2b..a8d907df8843 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8210,15 +8210,11 @@ aarch64_layout_frame (void) - && !crtl->abi->clobbers_full_reg_p (regno)) - frame.reg_offset[regno] = SLOT_REQUIRED; - -- /* With stack-clash, LR must be saved in non-leaf functions. The saving of -- LR counts as an implicit probe which allows us to maintain the invariant -- described in the comment at expand_prologue. */ -- gcc_assert (crtl->is_leaf -- || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); - - poly_int64 offset = crtl->outgoing_args_size; - gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); - frame.bytes_below_saved_regs = offset; -+ frame.sve_save_and_probe = INVALID_REGNUM; - - /* Now assign stack slots for the registers. Start with the predicate - registers, since predicate LDR and STR have a relatively small -@@ -8226,6 +8222,8 @@ aarch64_layout_frame (void) - for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { -+ if (frame.sve_save_and_probe == INVALID_REGNUM) -+ frame.sve_save_and_probe = regno; - frame.reg_offset[regno] = offset; - offset += BYTES_PER_SVE_PRED; - } -@@ -8263,6 +8261,8 @@ aarch64_layout_frame (void) - for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { -+ if (frame.sve_save_and_probe == INVALID_REGNUM) -+ frame.sve_save_and_probe = regno; - frame.reg_offset[regno] = offset; - offset += vector_save_size; - } -@@ -8272,10 +8272,18 @@ aarch64_layout_frame (void) - frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; - bool saves_below_hard_fp_p - = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); -+ gcc_assert (!saves_below_hard_fp_p -+ || (frame.sve_save_and_probe != INVALID_REGNUM -+ && known_eq (frame.reg_offset[frame.sve_save_and_probe], -+ frame.bytes_below_saved_regs))); -+ - frame.bytes_below_hard_fp = offset; -+ frame.hard_fp_save_and_probe = INVALID_REGNUM; - - auto allocate_gpr_slot = [&](unsigned int regno) - { -+ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) -+ frame.hard_fp_save_and_probe = regno; - frame.reg_offset[regno] = offset; - if (frame.wb_push_candidate1 == INVALID_REGNUM) - frame.wb_push_candidate1 = regno; -@@ -8309,6 +8317,8 @@ aarch64_layout_frame (void) - for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { -+ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) -+ frame.hard_fp_save_and_probe = regno; - /* If there is an alignment gap between integer and fp callee-saves, - allocate the last fp register to it if possible. */ - if (regno == last_fp_reg -@@ -8332,6 +8342,17 @@ aarch64_layout_frame (void) - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - - frame.saved_regs_size = offset - frame.bytes_below_saved_regs; -+ gcc_assert (known_eq (frame.saved_regs_size, -+ frame.below_hard_fp_saved_regs_size) -+ || (frame.hard_fp_save_and_probe != INVALID_REGNUM -+ && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], -+ frame.bytes_below_hard_fp))); -+ -+ /* With stack-clash, a register must be saved in non-leaf functions. -+ The saving of the bottommost register counts as an implicit probe, -+ which allows us to maintain the invariant described in the comment -+ at expand_prologue. */ -+ gcc_assert (crtl->is_leaf || maybe_ne (frame.saved_regs_size, 0)); - - offset += get_frame_size (); - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -@@ -8462,6 +8483,25 @@ aarch64_layout_frame (void) - frame.final_adjust = frame.bytes_below_saved_regs; - } - -+ /* The frame is allocated in pieces, with each non-final piece -+ including a register save at offset 0 that acts as a probe for -+ the following piece. In addition, the save of the bottommost register -+ acts as a probe for callees and allocas. Roll back any probes that -+ aren't needed. -+ -+ A probe isn't needed if it is associated with the final allocation -+ (including callees and allocas) that happens before the epilogue is -+ executed. */ -+ if (crtl->is_leaf -+ && !cfun->calls_alloca -+ && known_eq (frame.final_adjust, 0)) -+ { -+ if (maybe_ne (frame.sve_callee_adjust, 0)) -+ frame.sve_save_and_probe = INVALID_REGNUM; -+ else -+ frame.hard_fp_save_and_probe = INVALID_REGNUM; -+ } -+ - /* Make sure the individual adjustments add up to the full frame size. */ - gcc_assert (known_eq (frame.initial_adjust - + frame.callee_adjust -@@ -9039,13 +9079,6 @@ aarch64_get_separate_components (void) - - poly_int64 offset = frame.reg_offset[regno]; - -- /* If the register is saved in the first SVE save slot, we use -- it as a stack probe for -fstack-clash-protection. */ -- if (flag_stack_clash_protection -- && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) -- && known_eq (offset, frame.bytes_below_saved_regs)) -- continue; -- - /* Get the offset relative to the register we'll use. */ - if (frame_pointer_needed) - offset -= frame.bytes_below_hard_fp; -@@ -9080,6 +9113,13 @@ aarch64_get_separate_components (void) - - bitmap_clear_bit (components, LR_REGNUM); - bitmap_clear_bit (components, SP_REGNUM); -+ if (flag_stack_clash_protection) -+ { -+ if (frame.sve_save_and_probe != INVALID_REGNUM) -+ bitmap_clear_bit (components, frame.sve_save_and_probe); -+ if (frame.hard_fp_save_and_probe != INVALID_REGNUM) -+ bitmap_clear_bit (components, frame.hard_fp_save_and_probe); -+ } - - return components; - } -@@ -9616,8 +9656,8 @@ aarch64_epilogue_uses (int regno) - When probing is needed, we emit a probe at the start of the prologue - and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter. - -- We have to track how much space has been allocated and the only stores -- to the stack we track as implicit probes are the FP/LR stores. -+ We can also use register saves as probes. These are stored in -+ sve_save_and_probe and hard_fp_save_and_probe. - - For outgoing arguments we probe if the size is larger than 1KB, such that - the ABI specified buffer is maintained for the next callee. -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index b61358370732..46d4693e2064 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -957,6 +957,14 @@ struct GTY (()) aarch64_frame - This is the register they should use. */ - unsigned spare_pred_reg; - -+ /* An SVE register that is saved below the hard frame pointer and that acts -+ as a probe for later allocations, or INVALID_REGNUM if none. */ -+ unsigned sve_save_and_probe; -+ -+ /* A register that is saved at the hard frame pointer and that acts -+ as a probe for later allocations, or INVALID_REGNUM if none. */ -+ unsigned hard_fp_save_and_probe; -+ - bool laid_out; - - /* True if shadow call stack should be enabled for the current function. */ -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c -index 3e01ec36c3a4..3530a0d504ba 100644 ---- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c -+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c -@@ -11,11 +11,10 @@ - ** mov x11, sp - ** ... - ** sub sp, sp, x13 --** str p4, \[sp\] - ** cbz w0, [^\n]* -+** str p4, \[sp\] - ** ... - ** ptrue p0\.b, all --** ldr p4, \[sp\] - ** addvl sp, sp, #1 - ** ldr x24, \[sp\], 32 - ** ret -@@ -39,13 +38,12 @@ test_1 (int n) - ** mov x11, sp - ** ... - ** sub sp, sp, x13 --** str p4, \[sp\] - ** cbz w0, [^\n]* -+** str p4, \[sp\] - ** str p5, \[sp, #1, mul vl\] - ** str p6, \[sp, #2, mul vl\] - ** ... - ** ptrue p0\.b, all --** ldr p4, \[sp\] - ** addvl sp, sp, #1 - ** ldr x24, \[sp\], 32 - ** ret --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0027-aarch64-Remove-below_hard_fp_saved_regs_size.patch b/packages/gcc/12.3.0/0027-aarch64-Remove-below_hard_fp_saved_regs_size.patch deleted file mode 100644 index bfb7a318..00000000 --- a/packages/gcc/12.3.0/0027-aarch64-Remove-below_hard_fp_saved_regs_size.patch +++ /dev/null @@ -1,157 +0,0 @@ -From 8254e1b9cd500e0c278465a3657543477e9d1250 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:56 +0100 -Subject: [PATCH 27/28] aarch64: Remove below_hard_fp_saved_regs_size - -After previous patches, it's no longer necessary to store -saved_regs_size and below_hard_fp_saved_regs_size in the frame info. -All measurements instead use the top or bottom of the frame as -reference points. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size) - (aarch64_frame::below_hard_fp_saved_regs_size): Delete. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly. ---- - gcc/config/aarch64/aarch64.cc | 45 ++++++++++++++++------------------- - gcc/config/aarch64/aarch64.h | 7 ------ - 2 files changed, 21 insertions(+), 31 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index a8d907df8843..ac3d3b336a37 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8269,9 +8269,8 @@ aarch64_layout_frame (void) - - /* OFFSET is now the offset of the hard frame pointer from the bottom - of the callee save area. */ -- frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; -- bool saves_below_hard_fp_p -- = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); -+ auto below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; -+ bool saves_below_hard_fp_p = maybe_ne (below_hard_fp_saved_regs_size, 0); - gcc_assert (!saves_below_hard_fp_p - || (frame.sve_save_and_probe != INVALID_REGNUM - && known_eq (frame.reg_offset[frame.sve_save_and_probe], -@@ -8341,9 +8340,8 @@ aarch64_layout_frame (void) - - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - -- frame.saved_regs_size = offset - frame.bytes_below_saved_regs; -- gcc_assert (known_eq (frame.saved_regs_size, -- frame.below_hard_fp_saved_regs_size) -+ auto saved_regs_size = offset - frame.bytes_below_saved_regs; -+ gcc_assert (known_eq (saved_regs_size, below_hard_fp_saved_regs_size) - || (frame.hard_fp_save_and_probe != INVALID_REGNUM - && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], - frame.bytes_below_hard_fp))); -@@ -8352,7 +8350,7 @@ aarch64_layout_frame (void) - The saving of the bottommost register counts as an implicit probe, - which allows us to maintain the invariant described in the comment - at expand_prologue. */ -- gcc_assert (crtl->is_leaf || maybe_ne (frame.saved_regs_size, 0)); -+ gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); - - offset += get_frame_size (); - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -@@ -8409,7 +8407,7 @@ aarch64_layout_frame (void) - - HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; - HOST_WIDE_INT const_saved_regs_size; -- if (known_eq (frame.saved_regs_size, 0)) -+ if (known_eq (saved_regs_size, 0)) - frame.initial_adjust = frame.frame_size; - else if (frame.frame_size.is_constant (&const_size) - && const_size < max_push_offset -@@ -8422,7 +8420,7 @@ aarch64_layout_frame (void) - frame.callee_adjust = const_size; - } - else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) -- && frame.saved_regs_size.is_constant (&const_saved_regs_size) -+ && saved_regs_size.is_constant (&const_saved_regs_size) - && const_below_saved_regs + const_saved_regs_size < 512 - /* We could handle this case even with data below the saved - registers, provided that that data left us with valid offsets -@@ -8441,8 +8439,7 @@ aarch64_layout_frame (void) - frame.initial_adjust = frame.frame_size; - } - else if (saves_below_hard_fp_p -- && known_eq (frame.saved_regs_size, -- frame.below_hard_fp_saved_regs_size)) -+ && known_eq (saved_regs_size, below_hard_fp_saved_regs_size)) - { - /* Frame in which all saves are SVE saves: - -@@ -8464,7 +8461,7 @@ aarch64_layout_frame (void) - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ - frame.callee_adjust = const_above_fp; -- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -+ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } - else -@@ -8479,7 +8476,7 @@ aarch64_layout_frame (void) - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ - frame.initial_adjust = frame.bytes_above_hard_fp; -- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -+ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } - -@@ -9621,17 +9618,17 @@ aarch64_epilogue_uses (int regno) - | local variables | <-- frame_pointer_rtx - | | - +-------------------------------+ -- | padding | \ -- +-------------------------------+ | -- | callee-saved registers | | frame.saved_regs_size -- +-------------------------------+ | -- | LR' | | -- +-------------------------------+ | -- | FP' | | -- +-------------------------------+ |<- hard_frame_pointer_rtx (aligned) -- | SVE vector registers | | \ -- +-------------------------------+ | | below_hard_fp_saved_regs_size -- | SVE predicate registers | / / -+ | padding | -+ +-------------------------------+ -+ | callee-saved registers | -+ +-------------------------------+ -+ | LR' | -+ +-------------------------------+ -+ | FP' | -+ +-------------------------------+ <-- hard_frame_pointer_rtx (aligned) -+ | SVE vector registers | -+ +-------------------------------+ -+ | SVE predicate registers | - +-------------------------------+ - | dynamic allocation | - +-------------------------------+ -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 46d4693e2064..01f7751bc783 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -871,18 +871,11 @@ struct GTY (()) aarch64_frame - STACK_BOUNDARY. */ - HOST_WIDE_INT saved_varargs_size; - -- /* The size of the callee-save registers with a slot in REG_OFFSET. */ -- poly_int64 saved_regs_size; -- - /* The number of bytes between the bottom of the static frame (the bottom - of the outgoing arguments) and the bottom of the register save area. - This value is always a multiple of STACK_BOUNDARY. */ - poly_int64 bytes_below_saved_regs; - -- /* The size of the callee-save registers with a slot in REG_OFFSET that -- are saved below the hard frame pointer. */ -- poly_int64 below_hard_fp_saved_regs_size; -- - /* The number of bytes between the bottom of the static frame (the bottom - of the outgoing arguments) and the hard frame pointer. This value is - always a multiple of STACK_BOUNDARY. */ --- -2.42.0 - diff --git a/packages/gcc/12.3.0/0028-aarch64-Make-stack-smash-canary-protect-saved-regist.patch b/packages/gcc/12.3.0/0028-aarch64-Make-stack-smash-canary-protect-saved-regist.patch deleted file mode 100644 index db03001f..00000000 --- a/packages/gcc/12.3.0/0028-aarch64-Make-stack-smash-canary-protect-saved-regist.patch +++ /dev/null @@ -1,299 +0,0 @@ -From 75c37e031408262263442f5b4cdb83d3777b6422 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:08:57 +0100 -Subject: [PATCH 28/28] aarch64: Make stack smash canary protect saved - registers - -AArch64 normally puts the saved registers near the bottom of the frame, -immediately above any dynamic allocations. But this means that a -stack-smash attack on those dynamic allocations could overwrite the -saved registers without needing to reach as far as the stack smash -canary. - -The same thing could also happen for variable-sized arguments that are -passed by value, since those are allocated before a call and popped on -return. - -This patch avoids that by putting the locals (and thus the canary) below -the saved registers when stack smash protection is active. - -The patch fixes CVE-2023-4039. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p): - New function. - (aarch64_layout_frame): Use it to decide whether locals should - go above or below the saved registers. - (aarch64_expand_prologue): Update stack layout comment. - Emit a stack tie after the final adjustment. - -gcc/testsuite/ - * gcc.target/aarch64/stack-protector-8.c: New test. - * gcc.target/aarch64/stack-protector-9.c: Likewise. ---- - gcc/config/aarch64/aarch64.cc | 46 +++++++-- - .../gcc.target/aarch64/stack-protector-8.c | 95 +++++++++++++++++++ - .../gcc.target/aarch64/stack-protector-9.c | 33 +++++++ - 3 files changed, 168 insertions(+), 6 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-8.c - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-9.c - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index ac3d3b336a37..96c3f48fdc49 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8133,6 +8133,20 @@ aarch64_needs_frame_chain (void) - return aarch64_use_frame_pointer; - } - -+/* Return true if the current function should save registers above -+ the locals area, rather than below it. */ -+ -+static bool -+aarch64_save_regs_above_locals_p () -+{ -+ /* When using stack smash protection, make sure that the canary slot -+ comes between the locals and the saved registers. Otherwise, -+ it would be possible for a carefully sized smash attack to change -+ the saved registers (particularly LR and FP) without reaching the -+ canary. */ -+ return crtl->stack_protect_guard; -+} -+ - /* Mark the registers that need to be saved by the callee and calculate - the size of the callee-saved registers area and frame record (both FP - and LR may be omitted). */ -@@ -8144,6 +8158,7 @@ aarch64_layout_frame (void) - poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); - bool frame_related_fp_reg_p = false; - aarch64_frame &frame = cfun->machine->frame; -+ poly_int64 top_of_locals = -1; - - frame.emit_frame_chain = aarch64_needs_frame_chain (); - -@@ -8210,9 +8225,16 @@ aarch64_layout_frame (void) - && !crtl->abi->clobbers_full_reg_p (regno)) - frame.reg_offset[regno] = SLOT_REQUIRED; - -+ bool regs_at_top_p = aarch64_save_regs_above_locals_p (); - - poly_int64 offset = crtl->outgoing_args_size; - gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); -+ if (regs_at_top_p) -+ { -+ offset += get_frame_size (); -+ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -+ top_of_locals = offset; -+ } - frame.bytes_below_saved_regs = offset; - frame.sve_save_and_probe = INVALID_REGNUM; - -@@ -8352,15 +8374,18 @@ aarch64_layout_frame (void) - at expand_prologue. */ - gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); - -- offset += get_frame_size (); -- offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -- auto top_of_locals = offset; -- -+ if (!regs_at_top_p) -+ { -+ offset += get_frame_size (); -+ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -+ top_of_locals = offset; -+ } - offset += frame.saved_varargs_size; - gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); - frame.frame_size = offset; - - frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; -+ gcc_assert (known_ge (top_of_locals, 0)); - frame.bytes_above_locals = frame.frame_size - top_of_locals; - - frame.initial_adjust = 0; -@@ -9615,10 +9640,10 @@ aarch64_epilogue_uses (int regno) - | for register varargs | - | | - +-------------------------------+ -- | local variables | <-- frame_pointer_rtx -+ | local variables (1) | <-- frame_pointer_rtx - | | - +-------------------------------+ -- | padding | -+ | padding (1) | - +-------------------------------+ - | callee-saved registers | - +-------------------------------+ -@@ -9630,6 +9655,10 @@ aarch64_epilogue_uses (int regno) - +-------------------------------+ - | SVE predicate registers | - +-------------------------------+ -+ | local variables (2) | -+ +-------------------------------+ -+ | padding (2) | -+ +-------------------------------+ - | dynamic allocation | - +-------------------------------+ - | padding | -@@ -9639,6 +9668,9 @@ aarch64_epilogue_uses (int regno) - +-------------------------------+ - | | <-- stack_pointer_rtx (aligned) - -+ The regions marked (1) and (2) are mutually exclusive. (2) is used -+ when aarch64_save_regs_above_locals_p is true. -+ - Dynamic stack allocations via alloca() decrease stack_pointer_rtx - but leave frame_pointer_rtx and hard_frame_pointer_rtx - unchanged. -@@ -9834,6 +9866,8 @@ aarch64_expand_prologue (void) - gcc_assert (known_eq (bytes_below_sp, final_adjust)); - aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, - !frame_pointer_needed, true); -+ if (emit_frame_chain && maybe_ne (final_adjust, 0)) -+ emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); - } - - /* Return TRUE if we can use a simple_return insn. -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c -new file mode 100644 -index 000000000000..e71d820e3654 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c -@@ -0,0 +1,95 @@ -+/* { dg-options " -O -fstack-protector-strong -mstack-protector-guard=sysreg -mstack-protector-guard-reg=tpidr2_el0 -mstack-protector-guard-offset=16" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void g(void *); -+__SVBool_t *h(void *); -+ -+/* -+** test1: -+** sub sp, sp, #288 -+** stp x29, x30, \[sp, #?272\] -+** add x29, sp, #?272 -+** mrs (x[0-9]+), tpidr2_el0 -+** ldr (x[0-9]+), \[\1, #?16\] -+** str \2, \[sp, #?264\] -+** mov \2, #?0 -+** add x0, sp, #?8 -+** bl g -+** ... -+** mrs .* -+** ... -+** bne .* -+** ... -+** ldp x29, x30, \[sp, #?272\] -+** add sp, sp, #?288 -+** ret -+** bl __stack_chk_fail -+*/ -+int test1() { -+ int y[0x40]; -+ g(y); -+ return 1; -+} -+ -+/* -+** test2: -+** stp x29, x30, \[sp, #?-16\]! -+** mov x29, sp -+** sub sp, sp, #1040 -+** mrs (x[0-9]+), tpidr2_el0 -+** ldr (x[0-9]+), \[\1, #?16\] -+** str \2, \[sp, #?1032\] -+** mov \2, #?0 -+** add x0, sp, #?8 -+** bl g -+** ... -+** mrs .* -+** ... -+** bne .* -+** ... -+** add sp, sp, #?1040 -+** ldp x29, x30, \[sp\], #?16 -+** ret -+** bl __stack_chk_fail -+*/ -+int test2() { -+ int y[0x100]; -+ g(y); -+ return 1; -+} -+ -+#pragma GCC target "+sve" -+ -+/* -+** test3: -+** stp x29, x30, \[sp, #?-16\]! -+** mov x29, sp -+** addvl sp, sp, #-18 -+** ... -+** str p4, \[sp\] -+** ... -+** sub sp, sp, #272 -+** mrs (x[0-9]+), tpidr2_el0 -+** ldr (x[0-9]+), \[\1, #?16\] -+** str \2, \[sp, #?264\] -+** mov \2, #?0 -+** add x0, sp, #?8 -+** bl h -+** ... -+** mrs .* -+** ... -+** bne .* -+** ... -+** add sp, sp, #?272 -+** ... -+** ldr p4, \[sp\] -+** ... -+** addvl sp, sp, #18 -+** ldp x29, x30, \[sp\], #?16 -+** ret -+** bl __stack_chk_fail -+*/ -+__SVBool_t test3() { -+ int y[0x40]; -+ return *h(y); -+} -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c -new file mode 100644 -index 000000000000..58f322aa480a ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c -@@ -0,0 +1,33 @@ -+/* { dg-options "-O2 -mcpu=neoverse-v1 -fstack-protector-all" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+/* -+** main: -+** ... -+** stp x29, x30, \[sp, #?-[0-9]+\]! -+** ... -+** sub sp, sp, #[0-9]+ -+** ... -+** str x[0-9]+, \[x29, #?-8\] -+** ... -+*/ -+int f(const char *); -+void g(void *); -+int main(int argc, char* argv[]) -+{ -+ int a; -+ int b; -+ char c[2+f(argv[1])]; -+ int d[0x100]; -+ char y; -+ -+ y=42; a=4; b=10; -+ c[0] = 'h'; c[1] = '\0'; -+ -+ c[f(argv[2])] = '\0'; -+ -+ __builtin_printf("%d %d\n%s\n", a, b, c); -+ g(d); -+ -+ return 0; -+} --- -2.42.0 - diff --git a/packages/gcc/12.3.0/chksum b/packages/gcc/12.3.0/chksum deleted file mode 100644 index 8d4593d2..00000000 --- a/packages/gcc/12.3.0/chksum +++ /dev/null @@ -1,8 +0,0 @@ -md5 gcc-12.3.0.tar.xz 58a863b2a50e4d42eacc20fec419bc3b -sha1 gcc-12.3.0.tar.xz 85d66f058688db1e18545b6c4cf67ecc83d3b7eb -sha256 gcc-12.3.0.tar.xz 949a5d4f99e786421a93b532b22ffab5578de7321369975b91aec97adfda8c3b -sha512 gcc-12.3.0.tar.xz 8fb799dfa2e5de5284edf8f821e3d40c2781e4c570f5adfdb1ca0671fcae3fb7f794ea783e80f01ec7bfbf912ca508e478bd749b2755c2c14e4055648146c204 -md5 gcc-12.3.0.tar.gz 6506e4cea6b9eed3c13cd13e5b4dc7c3 -sha1 gcc-12.3.0.tar.gz 9ba0d3b1009ad7a3e1a8f5cc99ad9c6cb4318db9 -sha256 gcc-12.3.0.tar.gz 11275aa7bb34cd8ab101d01b341015499f8d9466342a2574ece93f954d92273b -sha512 gcc-12.3.0.tar.gz 3affe905593e8c64a916a59d4410d9bdf718a2b211ae5a6c7c66af9eed11da0869f4c30d12a5ebba1363f2f809d10ae4cb7aeaac27e3f70f8585c6593773d856 diff --git a/packages/gcc/12.3.0/0000-libtool-leave-framework-alone.patch b/packages/gcc/12.4.0/0000-libtool-leave-framework-alone.patch index 1a86e415..1a86e415 100644 --- a/packages/gcc/12.3.0/0000-libtool-leave-framework-alone.patch +++ b/packages/gcc/12.4.0/0000-libtool-leave-framework-alone.patch diff --git a/packages/gcc/12.3.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch b/packages/gcc/12.4.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch index 5f9a07a2..5f9a07a2 100644 --- a/packages/gcc/12.3.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch +++ b/packages/gcc/12.4.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch diff --git a/packages/gcc/12.3.0/0002-arm-softfloat-libgcc.patch b/packages/gcc/12.4.0/0002-arm-softfloat-libgcc.patch index d9800365..d9800365 100644 --- a/packages/gcc/12.3.0/0002-arm-softfloat-libgcc.patch +++ b/packages/gcc/12.4.0/0002-arm-softfloat-libgcc.patch diff --git a/packages/gcc/12.3.0/0003-libgcc-disable-split-stack-nothreads.patch b/packages/gcc/12.4.0/0003-libgcc-disable-split-stack-nothreads.patch index df91a9ff..df91a9ff 100644 --- a/packages/gcc/12.3.0/0003-libgcc-disable-split-stack-nothreads.patch +++ b/packages/gcc/12.4.0/0003-libgcc-disable-split-stack-nothreads.patch diff --git a/packages/gcc/12.3.0/0004-Remove-use-of-include_next-from-c-headers.patch b/packages/gcc/12.4.0/0004-Remove-use-of-include_next-from-c-headers.patch index 920e64da..c0e35ffc 100644 --- a/packages/gcc/12.3.0/0004-Remove-use-of-include_next-from-c-headers.patch +++ b/packages/gcc/12.4.0/0004-Remove-use-of-include_next-from-c-headers.patch @@ -1,4 +1,4 @@ -From 9db1164d68ee1da7434af48db4f828d7df51b055 Mon Sep 17 00:00:00 2001 +From ed1daa2cc9130e7807f32d515d16597fd2df8c25 Mon Sep 17 00:00:00 2001 From: Keith Packard <keithp@keithp.com> Date: Sun, 24 Jan 2021 14:20:33 -0800 Subject: [PATCH] Remove use of include_next from c++ headers diff --git a/packages/gcc/12.3.0/0005-Allow-default-libc-to-be-specified-to-configure.patch b/packages/gcc/12.4.0/0005-Allow-default-libc-to-be-specified-to-configure.patch index 8204723e..924260f2 100644 --- a/packages/gcc/12.3.0/0005-Allow-default-libc-to-be-specified-to-configure.patch +++ b/packages/gcc/12.4.0/0005-Allow-default-libc-to-be-specified-to-configure.patch @@ -1,7 +1,7 @@ -From e55524baedbf2dc94b5159373c2b71049bdde1a8 Mon Sep 17 00:00:00 2001 +From 62bed0c557c6f5836ba06c9b4e4ffa32c6c3c122 Mon Sep 17 00:00:00 2001 From: Keith Packard <keithp@keithp.com> Date: Fri, 2 Sep 2022 23:07:05 -0700 -Subject: [PATCH 5/9] Allow default libc to be specified to configure +Subject: [PATCH] Allow default libc to be specified to configure The default C library is normally computed based on the target triplet. However, for embedded systems, it can be useful to leave the @@ -121,7 +121,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> +esac --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -2476,6 +2476,10 @@ +@@ -2498,6 +2498,10 @@ fi AC_SUBST(inhibit_libc) diff --git a/packages/gcc/13.2.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch b/packages/gcc/12.4.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch index 4c73bd6f..f5429510 100644 --- a/packages/gcc/13.2.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch +++ b/packages/gcc/12.4.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch @@ -1,4 +1,4 @@ -From fd6aa8e67aec185b0d84ba9551fd38c90c9d6d8a Mon Sep 17 00:00:00 2001 +From e18ce0c5f968167b5337a06fe61c4377c4349f1a Mon Sep 17 00:00:00 2001 From: Keith Packard <keithp@keithp.com> Date: Fri, 26 Aug 2022 14:30:03 -0700 Subject: [PATCH] driver: Extend 'getenv' function to allow default value @@ -40,7 +40,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -34814,17 +34814,21 @@ +@@ -33837,17 +33837,21 @@ @table @code @item @code{getenv} @@ -71,7 +71,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> The @code{if-exists} spec function takes one argument, an absolute --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -10155,12 +10155,20 @@ +@@ -10167,12 +10167,20 @@ char *ptr; size_t len; diff --git a/packages/gcc/12.3.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch b/packages/gcc/12.4.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch index 13fe02ae..d1cf760c 100644 --- a/packages/gcc/12.3.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch +++ b/packages/gcc/12.4.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch @@ -1,7 +1,7 @@ -From 2e3918a283c1c9fb3b4775fe96a56e430748579a Mon Sep 17 00:00:00 2001 +From abbd605ce30a1ff8bea37ee955340b2247b8966b Mon Sep 17 00:00:00 2001 From: Keith Packard <keithp@keithp.com> Date: Tue, 23 Aug 2022 22:12:06 -0700 -Subject: [PATCH 6/9] Add newlib and picolibc as default C library choices +Subject: [PATCH] Add newlib and picolibc as default C library choices Signed-off-by: Keith Packard <keithp@keithp.com> --- diff --git a/packages/gcc/12.3.0/0008-Support-picolibc-targets.patch b/packages/gcc/12.4.0/0008-Support-picolibc-targets.patch index 45968bb9..cccc4ffb 100644 --- a/packages/gcc/12.3.0/0008-Support-picolibc-targets.patch +++ b/packages/gcc/12.4.0/0008-Support-picolibc-targets.patch @@ -1,7 +1,7 @@ -From 41b20e994970f0ae63fb3f49c6f89a0b2f06aecb Mon Sep 17 00:00:00 2001 +From 3d83dcc5d2936ab76caecbf6cc35c3ee846ce01b Mon Sep 17 00:00:00 2001 From: Keith Packard <keithp@keithp.com> Date: Sun, 12 Feb 2023 14:23:32 -0800 -Subject: [PATCH 7/9] Support picolibc targets +Subject: [PATCH] Support picolibc targets Match *-picolibc-* and select picolibc as the default C library, plus continuing to use the newlib-based logic for other configuration items. diff --git a/packages/gcc/12.3.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch b/packages/gcc/12.4.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch index 1e5e9415..7b2a9bc2 100644 --- a/packages/gcc/12.3.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch +++ b/packages/gcc/12.4.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch @@ -1,7 +1,7 @@ -From e426a20988185695675a2c456e0c24dcea515baf Mon Sep 17 00:00:00 2001 +From 69e8976de231174e10316452de791d63fa5b9ee8 Mon Sep 17 00:00:00 2001 From: Keith Packard <keithp@keithp.com> Date: Sat, 11 Feb 2023 23:07:08 -0800 -Subject: [PATCH 8/9] gcc: Allow g++ to work differently from gcc +Subject: [PATCH] gcc: Allow g++ to work differently from gcc Compile gcc.cc with -DIN_GPP defined when building g++ so that the code can respond appropriately for the default target language. This diff --git a/packages/gcc/12.4.0/0010-Remove-crypt-and-crypt_r-interceptors.patch b/packages/gcc/12.4.0/0010-Remove-crypt-and-crypt_r-interceptors.patch new file mode 100644 index 00000000..f22c8d73 --- /dev/null +++ b/packages/gcc/12.4.0/0010-Remove-crypt-and-crypt_r-interceptors.patch @@ -0,0 +1,124 @@ +From 95f0b5a33ef2f774e7fc0f3f85c0472b0b670996 Mon Sep 17 00:00:00 2001 +From: Fangrui Song <i@maskray.me> +Date: Fri, 28 Apr 2023 09:59:17 -0700 +Subject: [PATCH] Remove crypt and crypt_r interceptors + +From Florian Weimer's D144073 + +> On GNU/Linux (glibc), the crypt and crypt_r functions are not part of the main shared object (libc.so.6), but libcrypt (with multiple possible sonames). The sanitizer libraries do not depend on libcrypt, so it can happen that during sanitizer library initialization, no real implementation will be found because the crypt, crypt_r functions are not present in the process image (yet). If its interceptors are called nevertheless, this results in a call through a null pointer when the sanitizer library attempts to forward the call to the real implementation. +> +> Many distributions have already switched to libxcrypt, a library that is separate from glibc and that can be build with sanitizers directly (avoiding the need for interceptors). This patch disables building the interceptor for glibc targets. + +Let's remove crypt and crypt_r interceptors (D68431) to fix issues with +newer glibc. + +For older glibc, msan will not know that an uninstrumented crypt_r call +initializes `data`, so there is a risk for false positives. However, with some +codebase survey, I think crypt_r uses are very few and the call sites typically +have a `memset(&data, 0, sizeof(data));` anyway. + +Fix https://github.com/google/sanitizers/issues/1365 +Related: https://bugzilla.redhat.com/show_bug.cgi?id=2169432 + +Reviewed By: #sanitizers, fweimer, thesamesam, vitalybuka + +Differential Revision: https://reviews.llvm.org/D149403 +--- + libsanitizer/sanitizer_common/sanitizer_common_interceptors.inc | 37 ---------- + libsanitizer/sanitizer_common/sanitizer_platform_interceptors.h | 2 + libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp | 2 + libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h | 1 + 4 files changed, 42 deletions(-) + +--- a/libsanitizer/sanitizer_common/sanitizer_common_interceptors.inc ++++ b/libsanitizer/sanitizer_common/sanitizer_common_interceptors.inc +@@ -9977,41 +9977,6 @@ + #define INIT_GETRANDOM + #endif + +-#if SANITIZER_INTERCEPT_CRYPT +-INTERCEPTOR(char *, crypt, char *key, char *salt) { +- void *ctx; +- COMMON_INTERCEPTOR_ENTER(ctx, crypt, key, salt); +- COMMON_INTERCEPTOR_READ_RANGE(ctx, key, internal_strlen(key) + 1); +- COMMON_INTERCEPTOR_READ_RANGE(ctx, salt, internal_strlen(salt) + 1); +- char *res = REAL(crypt)(key, salt); +- if (res != nullptr) +- COMMON_INTERCEPTOR_INITIALIZE_RANGE(res, internal_strlen(res) + 1); +- return res; +-} +-#define INIT_CRYPT COMMON_INTERCEPT_FUNCTION(crypt); +-#else +-#define INIT_CRYPT +-#endif +- +-#if SANITIZER_INTERCEPT_CRYPT_R +-INTERCEPTOR(char *, crypt_r, char *key, char *salt, void *data) { +- void *ctx; +- COMMON_INTERCEPTOR_ENTER(ctx, crypt_r, key, salt, data); +- COMMON_INTERCEPTOR_READ_RANGE(ctx, key, internal_strlen(key) + 1); +- COMMON_INTERCEPTOR_READ_RANGE(ctx, salt, internal_strlen(salt) + 1); +- char *res = REAL(crypt_r)(key, salt, data); +- if (res != nullptr) { +- COMMON_INTERCEPTOR_WRITE_RANGE(ctx, data, +- __sanitizer::struct_crypt_data_sz); +- COMMON_INTERCEPTOR_INITIALIZE_RANGE(res, internal_strlen(res) + 1); +- } +- return res; +-} +-#define INIT_CRYPT_R COMMON_INTERCEPT_FUNCTION(crypt_r); +-#else +-#define INIT_CRYPT_R +-#endif +- + #if SANITIZER_INTERCEPT_GETENTROPY + INTERCEPTOR(int, getentropy, void *buf, SIZE_T buflen) { + void *ctx; +@@ -10521,8 +10486,6 @@ + INIT_GETUSERSHELL; + INIT_SL_INIT; + INIT_GETRANDOM; +- INIT_CRYPT; +- INIT_CRYPT_R; + INIT_GETENTROPY; + INIT_QSORT; + INIT_QSORT_R; +--- a/libsanitizer/sanitizer_common/sanitizer_platform_interceptors.h ++++ b/libsanitizer/sanitizer_common/sanitizer_platform_interceptors.h +@@ -568,8 +568,6 @@ + #define SANITIZER_INTERCEPT_FDEVNAME SI_FREEBSD + #define SANITIZER_INTERCEPT_GETUSERSHELL (SI_POSIX && !SI_ANDROID) + #define SANITIZER_INTERCEPT_SL_INIT (SI_FREEBSD || SI_NETBSD) +-#define SANITIZER_INTERCEPT_CRYPT (SI_POSIX && !SI_ANDROID) +-#define SANITIZER_INTERCEPT_CRYPT_R (SI_LINUX && !SI_ANDROID) + + #define SANITIZER_INTERCEPT_GETRANDOM \ + ((SI_LINUX && __GLIBC_PREREQ(2, 25)) || SI_FREEBSD) +--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp ++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp +@@ -154,7 +154,6 @@ + #include <linux/serial.h> + #include <sys/msg.h> + #include <sys/ipc.h> +-#include <crypt.h> + #endif // SANITIZER_ANDROID + + #include <link.h> +@@ -254,7 +253,6 @@ + unsigned struct_ustat_sz = SIZEOF_STRUCT_USTAT; + unsigned struct_rlimit64_sz = sizeof(struct rlimit64); + unsigned struct_statvfs64_sz = sizeof(struct statvfs64); +- unsigned struct_crypt_data_sz = sizeof(struct crypt_data); + #endif // SANITIZER_LINUX && !SANITIZER_ANDROID + + #if SANITIZER_LINUX && !SANITIZER_ANDROID +--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h ++++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h +@@ -298,7 +298,6 @@ + extern unsigned struct_mq_attr_sz; + extern unsigned struct_timex_sz; + extern unsigned struct_statvfs_sz; +-extern unsigned struct_crypt_data_sz; + #endif // SANITIZER_LINUX && !SANITIZER_ANDROID + + struct __sanitizer_iovec { diff --git a/packages/gcc/12.4.0/0011-always-define-win32-lean-and-mean-before-windows-h.patch b/packages/gcc/12.4.0/0011-always-define-win32-lean-and-mean-before-windows-h.patch new file mode 100644 index 00000000..688ad8fe --- /dev/null +++ b/packages/gcc/12.4.0/0011-always-define-win32-lean-and-mean-before-windows-h.patch @@ -0,0 +1,379 @@ +Original patch for GCC 13 by LIU Hao <lh_mouse@126.com> + +Recently, mingw-w64 has got updated <msxml.h> from Wine which is included +indirectly by <windows.h> if `WIN32_LEAN_AND_MEAN` is not defined. The +`IXMLDOMDocument` class has a member function named `abort()`, which gets +affected by our `abort()` macro in "system.h". + +`WIN32_LEAN_AND_MEAN` should, nevertheless, always be defined. This +can exclude 'APIs such as Cryptography, DDE, RPC, Shell, and Windows +Sockets' [1], and speed up compilation of these files a bit. + +[1] https://learn.microsoft.com/en-us/windows/win32/winprog/using-the-windows-headers + +--- a/gcc/ada/adaint.c ++++ b/gcc/ada/adaint.c +@@ -227,6 +227,7 @@ UINT __gnat_current_ccs_encoding; + + #elif defined (_WIN32) + ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #include <accctrl.h> + #include <aclapi.h> +--- a/gcc/ada/cio.c ++++ b/gcc/ada/cio.c +@@ -67,6 +67,7 @@ extern "C" { + #endif + + #ifdef RTX ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #include <Rtapi.h> + #endif +--- a/gcc/ada/ctrl_c.c ++++ b/gcc/ada/ctrl_c.c +@@ -126,6 +126,7 @@ __gnat_uninstall_int_handler (void) + + #elif defined (__MINGW32__) + ++#define WIN32_LEAN_AND_MEAN + #include "mingw32.h" + #include <windows.h> + +--- a/gcc/ada/expect.c ++++ b/gcc/ada/expect.c +@@ -71,6 +71,7 @@ + + #ifdef _WIN32 + ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #include <process.h> + #include <signal.h> +--- a/gcc/ada/gsocket.h ++++ b/gcc/ada/gsocket.h +@@ -167,6 +167,7 @@ + + #endif + ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + + #elif defined(VMS) +--- a/gcc/ada/mingw32.h ++++ b/gcc/ada/mingw32.h +@@ -53,6 +53,7 @@ + #define _X86INTRIN_H_INCLUDED + #define _EMMINTRIN_H_INCLUDED + #endif ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + + /* After including this file it is possible to use the character t as prefix +--- a/gcc/ada/mkdir.c ++++ b/gcc/ada/mkdir.c +@@ -43,6 +43,7 @@ + #endif + + #ifdef __MINGW32__ ++#define WIN32_LEAN_AND_MEAN + #include "mingw32.h" + #include <windows.h> + #ifdef MAXPATHLEN +--- a/gcc/ada/rtfinal.c ++++ b/gcc/ada/rtfinal.c +@@ -46,6 +46,7 @@ extern int __gnat_rt_init_count; + /* see initialize.c */ + + #if defined (__MINGW32__) ++#define WIN32_LEAN_AND_MEAN + #include "mingw32.h" + #include <windows.h> + +--- a/gcc/ada/rtinit.c ++++ b/gcc/ada/rtinit.c +@@ -70,6 +70,7 @@ int __gnat_rt_init_count = 0; + and finalize properly the run-time. */ + + #if defined (__MINGW32__) ++#define WIN32_LEAN_AND_MEAN + #include "mingw32.h" + #include <windows.h> + +--- a/gcc/ada/seh_init.c ++++ b/gcc/ada/seh_init.c +@@ -34,6 +34,7 @@ + + #if defined (_WIN32) || (defined (__CYGWIN__) && defined (__SEH__)) + /* Include system headers, before system.h poisons malloc. */ ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #include <excpt.h> + #endif +--- a/gcc/ada/sysdep.c ++++ b/gcc/ada/sysdep.c +@@ -217,6 +217,7 @@ __gnat_ttyname (int filedes) + #endif /* __CYGWIN__ */ + + #if defined (__CYGWIN__) || defined (__MINGW32__) ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + + int __gnat_is_windows_xp (void); +@@ -589,6 +590,7 @@ getc_immediate_common (FILE *stream, + Ada programs. */ + + #ifdef WINNT ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + + /* Provide functions to echo the values passed to WinMain (windows bindings +--- a/gcc/ada/terminals.c ++++ b/gcc/ada/terminals.c +@@ -151,6 +151,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED, + #include <stdio.h> + #include <stdlib.h> + ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #include <winternl.h> + #include <io.h> +--- a/gcc/ada/tracebak.c ++++ b/gcc/ada/tracebak.c +@@ -93,6 +93,7 @@ extern void (*Unlock_Task) (void); + + #if defined (_WIN64) && defined (__SEH__) + ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + + #define IS_BAD_PTR(ptr) (IsBadCodePtr((FARPROC)ptr)) +@@ -455,6 +456,7 @@ struct layout + #elif defined (__i386__) || defined (__x86_64__) + + #if defined (__WIN32) ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #define IS_BAD_PTR(ptr) (IsBadCodePtr((FARPROC)ptr)) + #elif defined (__sun__) +--- a/gcc/diagnostic-color.cc ++++ b/gcc/diagnostic-color.cc +@@ -22,6 +22,7 @@ + #include "diagnostic-url.h" + + #ifdef __MINGW32__ ++# define WIN32_LEAN_AND_MEAN + # include <windows.h> + #endif + +--- a/gcc/jit/jit-w32.h ++++ b/gcc/jit/jit-w32.h +@@ -20,6 +20,7 @@ along with GCC; see the file COPYING3. If not see + + #include "config.h" + ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + + namespace gcc { +--- a/gcc/plugin.cc ++++ b/gcc/plugin.cc +@@ -41,6 +41,7 @@ along with GCC; see the file COPYING3. If not see + #ifndef NOMINMAX + #define NOMINMAX + #endif ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #endif + +--- a/gcc/prefix.cc ++++ b/gcc/prefix.cc +@@ -67,6 +67,7 @@ License along with GCC; see the file COPYING3. If not see + #include "system.h" + #include "coretypes.h" + #if defined(_WIN32) && defined(ENABLE_WIN32_REGISTRY) ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #endif + #include "prefix.h" +--- a/libatomic/config/mingw/lock.c ++++ b/libatomic/config/mingw/lock.c +@@ -23,6 +23,7 @@ + <http://www.gnu.org/licenses/>. */ + + #define UWORD __shadow_UWORD ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #undef UWORD + #include "libatomic_i.h" +--- a/libffi/src/aarch64/ffi.c ++++ b/libffi/src/aarch64/ffi.c +@@ -28,6 +28,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + #include <ffi_common.h> + #include "internal.h" + #ifdef _WIN32 ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> /* FlushInstructionCache */ + #endif + #include <tramp.h> +--- a/libgcc/config/i386/enable-execute-stack-mingw32.c ++++ b/libgcc/config/i386/enable-execute-stack-mingw32.c +@@ -22,6 +22,7 @@ + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + + extern void __enable_execute_stack (void *); +--- a/libgcc/libgcc2.c ++++ b/libgcc/libgcc2.c +@@ -2273,6 +2273,7 @@ __clear_cache (void *beg __attribute__((__unused__)), + /* Jump to a trampoline, loading the static chain address. */ + + #if defined(WINNT) && ! defined(__CYGWIN__) ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + int getpagesize (void); + int mprotect (char *,int, int); +--- a/libgcc/unwind-generic.h ++++ b/libgcc/unwind-generic.h +@@ -30,6 +30,7 @@ + + #if defined (__SEH__) && !defined (__USING_SJLJ_EXCEPTIONS__) + /* Only for _GCC_specific_handler. */ ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #endif + +--- a/libgfortran/intrinsics/sleep.c ++++ b/libgfortran/intrinsics/sleep.c +@@ -30,6 +30,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + #endif + + #ifdef __MINGW32__ ++# define WIN32_LEAN_AND_MEAN + # include <windows.h> + # undef sleep + # define sleep(x) Sleep(1000*(x)) +--- a/libgo/misc/cgo/test/callback_c.c ++++ b/libgo/misc/cgo/test/callback_c.c +@@ -32,6 +32,7 @@ IntoC(void) + } + + #ifdef WIN32 ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + long long + mysleep(int seconds) { +--- a/libgomp/config/mingw32/proc.c ++++ b/libgomp/config/mingw32/proc.c +@@ -30,6 +30,7 @@ + The following implementation uses win32 API routines. */ + + #include "libgomp.h" ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + + /* Count the CPU's currently available to this process. */ +--- a/libiberty/make-temp-file.c ++++ b/libiberty/make-temp-file.c +@@ -37,6 +37,7 @@ Boston, MA 02110-1301, USA. */ + #include <sys/file.h> /* May get R_OK, etc. on some systems. */ + #endif + #if defined(_WIN32) && !defined(__CYGWIN__) ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #endif + #if HAVE_SYS_STAT_H +--- a/libiberty/pex-win32.c ++++ b/libiberty/pex-win32.c +@@ -20,6 +20,7 @@ Boston, MA 02110-1301, USA. */ + + #include "pex-common.h" + ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + + #ifdef HAVE_STDLIB_H +--- a/libssp/ssp.c ++++ b/libssp/ssp.c +@@ -55,6 +55,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + /* Native win32 apps don't know about /dev/tty but can print directly + to the console using "CONOUT$" */ + #if defined (_WIN32) && !defined (__CYGWIN__) ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #include <wincrypt.h> + # define _PATH_TTY "CONOUT$" +--- a/libstdc++-v3/src/c++11/system_error.cc ++++ b/libstdc++-v3/src/c++11/system_error.cc +@@ -33,6 +33,7 @@ + #undef __sso_string + + #if defined(_WIN32) && !defined(__CYGWIN__) ++#define WIN32_LEAN_AND_MEAN + #include <memory> + #include <windows.h> + #endif +--- a/libstdc++-v3/src/c++11/thread.cc ++++ b/libstdc++-v3/src/c++11/thread.cc +@@ -34,6 +34,7 @@ + # ifdef _GLIBCXX_HAVE_SLEEP + # include <unistd.h> + # elif defined(_GLIBCXX_HAVE_WIN32_SLEEP) ++# define WIN32_LEAN_AND_MEAN + # include <windows.h> + # elif defined _GLIBCXX_NO_SLEEP && defined _GLIBCXX_HAS_GTHREADS + // We expect to be able to sleep for targets that support multiple threads: +--- a/libstdc++-v3/src/c++17/fs_ops.cc ++++ b/libstdc++-v3/src/c++17/fs_ops.cc +@@ -54,6 +54,7 @@ + # include <utime.h> // utime + #endif + #ifdef _GLIBCXX_FILESYSTEM_IS_WINDOWS ++# define WIN32_LEAN_AND_MEAN + # include <windows.h> + #endif + +--- a/libstdc++-v3/src/filesystem/ops.cc ++++ b/libstdc++-v3/src/filesystem/ops.cc +@@ -55,6 +55,7 @@ + # include <utime.h> // utime + #endif + #ifdef _GLIBCXX_FILESYSTEM_IS_WINDOWS ++# define WIN32_LEAN_AND_MEAN + # include <windows.h> + #endif + +--- a/libvtv/vtv_malloc.cc ++++ b/libvtv/vtv_malloc.cc +@@ -33,6 +33,7 @@ + #include <stdlib.h> + #include <unistd.h> + #if defined (__CYGWIN__) || defined (__MINGW32__) ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #else + #include <sys/mman.h> +--- a/libvtv/vtv_rts.cc ++++ b/libvtv/vtv_rts.cc +@@ -121,6 +121,7 @@ + #include <stdio.h> + #include <string.h> + #if defined (__CYGWIN__) || defined (__MINGW32__) ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #include <winternl.h> + #include <psapi.h> +--- a/libvtv/vtv_utils.cc ++++ b/libvtv/vtv_utils.cc +@@ -33,6 +33,7 @@ + #include <stdlib.h> + #include <string.h> + #if defined (__CYGWIN__) || defined (__MINGW32__) ++#define WIN32_LEAN_AND_MEAN + #include <windows.h> + #else + #include <execinfo.h> diff --git a/packages/gcc/12.4.0/chksum b/packages/gcc/12.4.0/chksum new file mode 100644 index 00000000..228b42d4 --- /dev/null +++ b/packages/gcc/12.4.0/chksum @@ -0,0 +1,8 @@ +md5 gcc-12.4.0.tar.xz fd7779aee878db67456575922281fa71 +sha1 gcc-12.4.0.tar.xz b373d4ac29bb06ca64d288621906cbf63ab5a1f5 +sha256 gcc-12.4.0.tar.xz 704f652604ccbccb14bdabf3478c9511c89788b12cb3bbffded37341916a9175 +sha512 gcc-12.4.0.tar.xz 5bd29402cad2deb5d9388d0236c7146414d77e5b8d5f1c6c941c7a1f47691c3389f08656d5f6e8e2d6717bf2c81f018d326f632fb468f42925b40bd217fc4853 +md5 gcc-12.4.0.tar.gz 2c34e2879ee25358417dc53ed8896d9a +sha1 gcc-12.4.0.tar.gz 02f5483b3114a1704943e832dff95a512f3e6ae7 +sha256 gcc-12.4.0.tar.gz 5a30de2be740062bb3ddd3fd13c9b1bb4584d8f85616d33f23a713439d714148 +sha512 gcc-12.4.0.tar.gz 13b2054a761b96d1d9b448999ea9978027deb54c5ea21af5344997efc74ca7da2df6fea462e4513c8307c672a35a74a1354de46e23d4005c60b9d50c8e5a89c8 diff --git a/packages/gcc/12.3.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch b/packages/gcc/12.4.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch index 0c4b90b5..0c4b90b5 100644 --- a/packages/gcc/12.3.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch +++ b/packages/gcc/12.4.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch diff --git a/packages/gcc/12.3.0/version.desc b/packages/gcc/12.4.0/version.desc index e69de29b..e69de29b 100644 --- a/packages/gcc/12.3.0/version.desc +++ b/packages/gcc/12.4.0/version.desc diff --git a/packages/gcc/13.2.0/0014-aarch64-Use-local-frame-vars-in-shrink-wrapping-code.patch b/packages/gcc/13.2.0/0014-aarch64-Use-local-frame-vars-in-shrink-wrapping-code.patch deleted file mode 100644 index d3502cd2..00000000 --- a/packages/gcc/13.2.0/0014-aarch64-Use-local-frame-vars-in-shrink-wrapping-code.patch +++ /dev/null @@ -1,378 +0,0 @@ -From 71a2aa2127283f450c623d3604dbcabe0e14a8d4 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:12 +0100 -Subject: [PATCH 14/32] aarch64: Use local frame vars in shrink-wrapping code - -aarch64_layout_frame uses a shorthand for referring to -cfun->machine->frame: - - aarch64_frame &frame = cfun->machine->frame; - -This patch does the same for some other heavy users of the structure. -No functional change intended. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use - a local shorthand for cfun->machine->frame. - (aarch64_restore_callee_saves, aarch64_get_separate_components): - (aarch64_process_components): Likewise. - (aarch64_allocate_and_probe_stack_space): Likewise. - (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. - (aarch64_layout_frame): Use existing shorthand for one more case. ---- - gcc/config/aarch64/aarch64.cc | 123 ++++++++++++++++++---------------- - 1 file changed, 64 insertions(+), 59 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 822a2b49a46e..5d473d161d97 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8612,7 +8612,7 @@ aarch64_layout_frame (void) - frame.is_scs_enabled - = (!crtl->calls_eh_return - && sanitize_flags_p (SANITIZE_SHADOW_CALL_STACK) -- && known_ge (cfun->machine->frame.reg_offset[LR_REGNUM], 0)); -+ && known_ge (frame.reg_offset[LR_REGNUM], 0)); - - /* When shadow call stack is enabled, the scs_pop in the epilogue will - restore x30, and we don't need to pop x30 again in the traditional -@@ -9078,6 +9078,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - unsigned start, unsigned limit, bool skip_wb, - bool hard_fp_valid_p) - { -+ aarch64_frame &frame = cfun->machine->frame; - rtx_insn *insn; - unsigned regno; - unsigned regno2; -@@ -9092,8 +9093,8 @@ aarch64_save_callee_saves (poly_int64 start_offset, - bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno); - - if (skip_wb -- && (regno == cfun->machine->frame.wb_push_candidate1 -- || regno == cfun->machine->frame.wb_push_candidate2)) -+ && (regno == frame.wb_push_candidate1 -+ || regno == frame.wb_push_candidate2)) - continue; - - if (cfun->machine->reg_is_wrapped_separately[regno]) -@@ -9101,7 +9102,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + cfun->machine->frame.reg_offset[regno]; -+ offset = start_offset + frame.reg_offset[regno]; - rtx base_rtx = stack_pointer_rtx; - poly_int64 sp_offset = offset; - -@@ -9114,7 +9115,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - { - gcc_assert (known_eq (start_offset, 0)); - poly_int64 fp_offset -- = cfun->machine->frame.below_hard_fp_saved_regs_size; -+ = frame.below_hard_fp_saved_regs_size; - if (hard_fp_valid_p) - base_rtx = hard_frame_pointer_rtx; - else -@@ -9136,8 +9137,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit - && !cfun->machine->reg_is_wrapped_separately[regno2] - && known_eq (GET_MODE_SIZE (mode), -- cfun->machine->frame.reg_offset[regno2] -- - cfun->machine->frame.reg_offset[regno])) -+ frame.reg_offset[regno2] - frame.reg_offset[regno])) - { - rtx reg2 = gen_rtx_REG (mode, regno2); - rtx mem2; -@@ -9187,6 +9187,7 @@ static void - aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - unsigned limit, bool skip_wb, rtx *cfi_ops) - { -+ aarch64_frame &frame = cfun->machine->frame; - unsigned regno; - unsigned regno2; - poly_int64 offset; -@@ -9203,13 +9204,13 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - rtx reg, mem; - - if (skip_wb -- && (regno == cfun->machine->frame.wb_pop_candidate1 -- || regno == cfun->machine->frame.wb_pop_candidate2)) -+ && (regno == frame.wb_pop_candidate1 -+ || regno == frame.wb_pop_candidate2)) - continue; - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + cfun->machine->frame.reg_offset[regno]; -+ offset = start_offset + frame.reg_offset[regno]; - rtx base_rtx = stack_pointer_rtx; - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, -@@ -9220,8 +9221,7 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit - && !cfun->machine->reg_is_wrapped_separately[regno2] - && known_eq (GET_MODE_SIZE (mode), -- cfun->machine->frame.reg_offset[regno2] -- - cfun->machine->frame.reg_offset[regno])) -+ frame.reg_offset[regno2] - frame.reg_offset[regno])) - { - rtx reg2 = gen_rtx_REG (mode, regno2); - rtx mem2; -@@ -9326,6 +9326,7 @@ offset_12bit_unsigned_scaled_p (machine_mode mode, poly_int64 offset) - static sbitmap - aarch64_get_separate_components (void) - { -+ aarch64_frame &frame = cfun->machine->frame; - sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1); - bitmap_clear (components); - -@@ -9342,18 +9343,18 @@ aarch64_get_separate_components (void) - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - continue; - -- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; -+ poly_int64 offset = frame.reg_offset[regno]; - - /* If the register is saved in the first SVE save slot, we use - it as a stack probe for -fstack-clash-protection. */ - if (flag_stack_clash_protection -- && maybe_ne (cfun->machine->frame.below_hard_fp_saved_regs_size, 0) -+ && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) - && known_eq (offset, 0)) - continue; - - /* Get the offset relative to the register we'll use. */ - if (frame_pointer_needed) -- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; -+ offset -= frame.below_hard_fp_saved_regs_size; - else - offset += crtl->outgoing_args_size; - -@@ -9372,11 +9373,11 @@ aarch64_get_separate_components (void) - /* If the spare predicate register used by big-endian SVE code - is call-preserved, it must be saved in the main prologue - before any saves that use it. */ -- if (cfun->machine->frame.spare_pred_reg != INVALID_REGNUM) -- bitmap_clear_bit (components, cfun->machine->frame.spare_pred_reg); -+ if (frame.spare_pred_reg != INVALID_REGNUM) -+ bitmap_clear_bit (components, frame.spare_pred_reg); - -- unsigned reg1 = cfun->machine->frame.wb_push_candidate1; -- unsigned reg2 = cfun->machine->frame.wb_push_candidate2; -+ unsigned reg1 = frame.wb_push_candidate1; -+ unsigned reg2 = frame.wb_push_candidate2; - /* If registers have been chosen to be stored/restored with - writeback don't interfere with them to avoid having to output explicit - stack adjustment instructions. */ -@@ -9485,6 +9486,7 @@ aarch64_get_next_set_bit (sbitmap bmp, unsigned int start) - static void - aarch64_process_components (sbitmap components, bool prologue_p) - { -+ aarch64_frame &frame = cfun->machine->frame; - rtx ptr_reg = gen_rtx_REG (Pmode, frame_pointer_needed - ? HARD_FRAME_POINTER_REGNUM - : STACK_POINTER_REGNUM); -@@ -9499,9 +9501,9 @@ aarch64_process_components (sbitmap components, bool prologue_p) - machine_mode mode = aarch64_reg_save_mode (regno); - - rtx reg = gen_rtx_REG (mode, regno); -- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; -+ poly_int64 offset = frame.reg_offset[regno]; - if (frame_pointer_needed) -- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; -+ offset -= frame.below_hard_fp_saved_regs_size; - else - offset += crtl->outgoing_args_size; - -@@ -9526,14 +9528,14 @@ aarch64_process_components (sbitmap components, bool prologue_p) - break; - } - -- poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2]; -+ poly_int64 offset2 = frame.reg_offset[regno2]; - /* The next register is not of the same class or its offset is not - mergeable with the current one into a pair. */ - if (aarch64_sve_mode_p (mode) - || !satisfies_constraint_Ump (mem) - || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2) - || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno)) -- || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]), -+ || maybe_ne ((offset2 - frame.reg_offset[regno]), - GET_MODE_SIZE (mode))) - { - insn = emit_insn (set); -@@ -9555,7 +9557,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - /* REGNO2 can be saved/restored in a pair with REGNO. */ - rtx reg2 = gen_rtx_REG (mode, regno2); - if (frame_pointer_needed) -- offset2 -= cfun->machine->frame.below_hard_fp_saved_regs_size; -+ offset2 -= frame.below_hard_fp_saved_regs_size; - else - offset2 += crtl->outgoing_args_size; - rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); -@@ -9650,6 +9652,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - bool frame_related_p, - bool final_adjustment_p) - { -+ aarch64_frame &frame = cfun->machine->frame; - HOST_WIDE_INT guard_size - = 1 << param_stack_clash_protection_guard_size; - HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; -@@ -9670,25 +9673,25 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - register as a probe. We can't assume that LR was saved at position 0 - though, so treat any space below it as unprobed. */ - if (final_adjustment_p -- && known_eq (cfun->machine->frame.below_hard_fp_saved_regs_size, 0)) -+ && known_eq (frame.below_hard_fp_saved_regs_size, 0)) - { -- poly_int64 lr_offset = cfun->machine->frame.reg_offset[LR_REGNUM]; -+ poly_int64 lr_offset = frame.reg_offset[LR_REGNUM]; - if (known_ge (lr_offset, 0)) - min_probe_threshold -= lr_offset.to_constant (); - else - gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); - } - -- poly_int64 frame_size = cfun->machine->frame.frame_size; -+ poly_int64 frame_size = frame.frame_size; - - /* We should always have a positive probe threshold. */ - gcc_assert (min_probe_threshold > 0); - - if (flag_stack_clash_protection && !final_adjustment_p) - { -- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; -- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; -- poly_int64 final_adjust = cfun->machine->frame.final_adjust; -+ poly_int64 initial_adjust = frame.initial_adjust; -+ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; -+ poly_int64 final_adjust = frame.final_adjust; - - if (known_eq (frame_size, 0)) - { -@@ -9977,17 +9980,18 @@ aarch64_epilogue_uses (int regno) - void - aarch64_expand_prologue (void) - { -- poly_int64 frame_size = cfun->machine->frame.frame_size; -- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; -- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; -- poly_int64 final_adjust = cfun->machine->frame.final_adjust; -- poly_int64 callee_offset = cfun->machine->frame.callee_offset; -- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; -+ aarch64_frame &frame = cfun->machine->frame; -+ poly_int64 frame_size = frame.frame_size; -+ poly_int64 initial_adjust = frame.initial_adjust; -+ HOST_WIDE_INT callee_adjust = frame.callee_adjust; -+ poly_int64 final_adjust = frame.final_adjust; -+ poly_int64 callee_offset = frame.callee_offset; -+ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size -- = cfun->machine->frame.below_hard_fp_saved_regs_size; -- unsigned reg1 = cfun->machine->frame.wb_push_candidate1; -- unsigned reg2 = cfun->machine->frame.wb_push_candidate2; -- bool emit_frame_chain = cfun->machine->frame.emit_frame_chain; -+ = frame.below_hard_fp_saved_regs_size; -+ unsigned reg1 = frame.wb_push_candidate1; -+ unsigned reg2 = frame.wb_push_candidate2; -+ bool emit_frame_chain = frame.emit_frame_chain; - rtx_insn *insn; - - if (flag_stack_clash_protection && known_eq (callee_adjust, 0)) -@@ -10018,7 +10022,7 @@ aarch64_expand_prologue (void) - } - - /* Push return address to shadow call stack. */ -- if (cfun->machine->frame.is_scs_enabled) -+ if (frame.is_scs_enabled) - emit_insn (gen_scs_push ()); - - if (flag_stack_usage_info) -@@ -10057,7 +10061,7 @@ aarch64_expand_prologue (void) - - /* The offset of the frame chain record (if any) from the current SP. */ - poly_int64 chain_offset = (initial_adjust + callee_adjust -- - cfun->machine->frame.hard_fp_offset); -+ - frame.hard_fp_offset); - gcc_assert (known_ge (chain_offset, 0)); - - /* The offset of the bottom of the save area from the current SP. */ -@@ -10160,16 +10164,17 @@ aarch64_use_return_insn_p (void) - void - aarch64_expand_epilogue (bool for_sibcall) - { -- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; -- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; -- poly_int64 final_adjust = cfun->machine->frame.final_adjust; -- poly_int64 callee_offset = cfun->machine->frame.callee_offset; -- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; -+ aarch64_frame &frame = cfun->machine->frame; -+ poly_int64 initial_adjust = frame.initial_adjust; -+ HOST_WIDE_INT callee_adjust = frame.callee_adjust; -+ poly_int64 final_adjust = frame.final_adjust; -+ poly_int64 callee_offset = frame.callee_offset; -+ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size -- = cfun->machine->frame.below_hard_fp_saved_regs_size; -- unsigned reg1 = cfun->machine->frame.wb_pop_candidate1; -- unsigned reg2 = cfun->machine->frame.wb_pop_candidate2; -- unsigned int last_gpr = (cfun->machine->frame.is_scs_enabled -+ = frame.below_hard_fp_saved_regs_size; -+ unsigned reg1 = frame.wb_pop_candidate1; -+ unsigned reg2 = frame.wb_pop_candidate2; -+ unsigned int last_gpr = (frame.is_scs_enabled - ? R29_REGNUM : R30_REGNUM); - rtx cfi_ops = NULL; - rtx_insn *insn; -@@ -10203,7 +10208,7 @@ aarch64_expand_epilogue (bool for_sibcall) - /* We need to add memory barrier to prevent read from deallocated stack. */ - bool need_barrier_p - = maybe_ne (get_frame_size () -- + cfun->machine->frame.saved_varargs_size, 0); -+ + frame.saved_varargs_size, 0); - - /* Emit a barrier to prevent loads from a deallocated stack. */ - if (maybe_gt (final_adjust, crtl->outgoing_args_size) -@@ -10284,7 +10289,7 @@ aarch64_expand_epilogue (bool for_sibcall) - } - - /* Pop return address from shadow call stack. */ -- if (cfun->machine->frame.is_scs_enabled) -+ if (frame.is_scs_enabled) - { - machine_mode mode = aarch64_reg_save_mode (R30_REGNUM); - rtx reg = gen_rtx_REG (mode, R30_REGNUM); -@@ -12740,24 +12745,24 @@ aarch64_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) - poly_int64 - aarch64_initial_elimination_offset (unsigned from, unsigned to) - { -+ aarch64_frame &frame = cfun->machine->frame; -+ - if (to == HARD_FRAME_POINTER_REGNUM) - { - if (from == ARG_POINTER_REGNUM) -- return cfun->machine->frame.hard_fp_offset; -+ return frame.hard_fp_offset; - - if (from == FRAME_POINTER_REGNUM) -- return cfun->machine->frame.hard_fp_offset -- - cfun->machine->frame.locals_offset; -+ return frame.hard_fp_offset - frame.locals_offset; - } - - if (to == STACK_POINTER_REGNUM) - { - if (from == FRAME_POINTER_REGNUM) -- return cfun->machine->frame.frame_size -- - cfun->machine->frame.locals_offset; -+ return frame.frame_size - frame.locals_offset; - } - -- return cfun->machine->frame.frame_size; -+ return frame.frame_size; - } - - --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0015-aarch64-Avoid-a-use-of-callee_offset.patch b/packages/gcc/13.2.0/0015-aarch64-Avoid-a-use-of-callee_offset.patch deleted file mode 100644 index 8a30f5a6..00000000 --- a/packages/gcc/13.2.0/0015-aarch64-Avoid-a-use-of-callee_offset.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 89a9fa287706c5011f61926eaf65e7b996b963a3 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:12 +0100 -Subject: [PATCH 15/32] aarch64: Avoid a use of callee_offset - -When we emit the frame chain, i.e. when we reach Here in this statement -of aarch64_expand_prologue: - - if (emit_frame_chain) - { - // Here - ... - } - -the stack is in one of two states: - -- We've allocated up to the frame chain, but no more. - -- We've allocated the whole frame, and the frame chain is within easy - reach of the new SP. - -The offset of the frame chain from the current SP is available -in aarch64_frame as callee_offset. It is also available as the -chain_offset local variable, where the latter is calculated from other -data. (However, chain_offset is not always equal to callee_offset when -!emit_frame_chain, so chain_offset isn't redundant.) - -In c600df9a4060da3c6121ff4d0b93f179eafd69d1 I switched to using -chain_offset for the initialisation of the hard frame pointer: - - aarch64_add_offset (Pmode, hard_frame_pointer_rtx, -- stack_pointer_rtx, callee_offset, -+ stack_pointer_rtx, chain_offset, - tmp1_rtx, tmp0_rtx, frame_pointer_needed); - -But the later REG_CFA_ADJUST_CFA handling still used callee_offset. - -I think the difference is harmless, but it's more logical for the -CFA note to be in sync, and it's more convenient for later patches -if it uses chain_offset. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use - chain_offset rather than callee_offset. ---- - gcc/config/aarch64/aarch64.cc | 4 +--- - 1 file changed, 1 insertion(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 5d473d161d97..4f233c95140e 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -9985,7 +9985,6 @@ aarch64_expand_prologue (void) - poly_int64 initial_adjust = frame.initial_adjust; - HOST_WIDE_INT callee_adjust = frame.callee_adjust; - poly_int64 final_adjust = frame.final_adjust; -- poly_int64 callee_offset = frame.callee_offset; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 below_hard_fp_saved_regs_size - = frame.below_hard_fp_saved_regs_size; -@@ -10098,8 +10097,7 @@ aarch64_expand_prologue (void) - implicit. */ - if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX)) - { -- rtx src = plus_constant (Pmode, stack_pointer_rtx, -- callee_offset); -+ rtx src = plus_constant (Pmode, stack_pointer_rtx, chain_offset); - add_reg_note (insn, REG_CFA_ADJUST_CFA, - gen_rtx_SET (hard_frame_pointer_rtx, src)); - } --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0016-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch b/packages/gcc/13.2.0/0016-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch deleted file mode 100644 index c19ea80c..00000000 --- a/packages/gcc/13.2.0/0016-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch +++ /dev/null @@ -1,49 +0,0 @@ -From b36a2a78040722dab6124366c5d6baf8eaf80aef Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:13 +0100 -Subject: [PATCH 16/32] aarch64: Explicitly handle frames with no saved - registers - -If a frame has no saved registers, it can be allocated in one go. -There is no need to treat the areas below and above the saved -registers as separate. - -And if we allocate the frame in one go, it should be allocated -as the initial_adjust rather than the final_adjust. This allows the -frame size to grow to guard_size - guard_used_by_caller before a stack -probe is needed. (A frame with no register saves is necessarily a -leaf frame.) - -This is a no-op as thing stand, since a leaf function will have -no outgoing arguments, and so all the frame will be above where -the saved registers normally go. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly - allocate the frame in one go if there are no saved registers. ---- - gcc/config/aarch64/aarch64.cc | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 4f233c95140e..37643041ffb1 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8639,9 +8639,11 @@ aarch64_layout_frame (void) - - HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; - HOST_WIDE_INT const_saved_regs_size; -- if (frame.frame_size.is_constant (&const_size) -- && const_size < max_push_offset -- && known_eq (frame.hard_fp_offset, const_size)) -+ if (known_eq (frame.saved_regs_size, 0)) -+ frame.initial_adjust = frame.frame_size; -+ else if (frame.frame_size.is_constant (&const_size) -+ && const_size < max_push_offset -+ && known_eq (frame.hard_fp_offset, const_size)) - { - /* Simple, small frame with no outgoing arguments: - --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0017-aarch64-Add-bytes_below_saved_regs-to-frame-info.patch b/packages/gcc/13.2.0/0017-aarch64-Add-bytes_below_saved_regs-to-frame-info.patch deleted file mode 100644 index 761f7c53..00000000 --- a/packages/gcc/13.2.0/0017-aarch64-Add-bytes_below_saved_regs-to-frame-info.patch +++ /dev/null @@ -1,233 +0,0 @@ -From ada2ab0093596be707f23a3466ac82cff59fcffe Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:13 +0100 -Subject: [PATCH 17/32] aarch64: Add bytes_below_saved_regs to frame info - -The frame layout code currently hard-codes the assumption that -the number of bytes below the saved registers is equal to the -size of the outgoing arguments. This patch abstracts that -value into a new field of aarch64_frame. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New - field. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it, - and use it instead of crtl->outgoing_args_size. - (aarch64_get_separate_components): Use bytes_below_saved_regs instead - of outgoing_args_size. - (aarch64_process_components): Likewise. ---- - gcc/config/aarch64/aarch64.cc | 71 ++++++++++++++++++----------------- - gcc/config/aarch64/aarch64.h | 5 +++ - 2 files changed, 41 insertions(+), 35 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 37643041ffb1..dacc2b0e4dd2 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8478,6 +8478,8 @@ aarch64_layout_frame (void) - gcc_assert (crtl->is_leaf - || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); - -+ frame.bytes_below_saved_regs = crtl->outgoing_args_size; -+ - /* Now assign stack slots for the registers. Start with the predicate - registers, since predicate LDR and STR have a relatively small - offset range. These saves happen below the hard frame pointer. */ -@@ -8582,18 +8584,18 @@ aarch64_layout_frame (void) - - poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; - -- poly_int64 above_outgoing_args -+ poly_int64 saved_regs_and_above - = aligned_upper_bound (varargs_and_saved_regs_size - + get_frame_size (), - STACK_BOUNDARY / BITS_PER_UNIT); - - frame.hard_fp_offset -- = above_outgoing_args - frame.below_hard_fp_saved_regs_size; -+ = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; - - /* Both these values are already aligned. */ -- gcc_assert (multiple_p (crtl->outgoing_args_size, -+ gcc_assert (multiple_p (frame.bytes_below_saved_regs, - STACK_BOUNDARY / BITS_PER_UNIT)); -- frame.frame_size = above_outgoing_args + crtl->outgoing_args_size; -+ frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; - - frame.locals_offset = frame.saved_varargs_size; - -@@ -8637,7 +8639,7 @@ aarch64_layout_frame (void) - else if (frame.wb_pop_candidate1 != INVALID_REGNUM) - max_push_offset = 256; - -- HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; -+ HOST_WIDE_INT const_size, const_below_saved_regs, const_fp_offset; - HOST_WIDE_INT const_saved_regs_size; - if (known_eq (frame.saved_regs_size, 0)) - frame.initial_adjust = frame.frame_size; -@@ -8645,31 +8647,31 @@ aarch64_layout_frame (void) - && const_size < max_push_offset - && known_eq (frame.hard_fp_offset, const_size)) - { -- /* Simple, small frame with no outgoing arguments: -+ /* Simple, small frame with no data below the saved registers. - - stp reg1, reg2, [sp, -frame_size]! - stp reg3, reg4, [sp, 16] */ - frame.callee_adjust = const_size; - } -- else if (crtl->outgoing_args_size.is_constant (&const_outgoing_args_size) -+ else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) - && frame.saved_regs_size.is_constant (&const_saved_regs_size) -- && const_outgoing_args_size + const_saved_regs_size < 512 -- /* We could handle this case even with outgoing args, provided -- that the number of args left us with valid offsets for all -- predicate and vector save slots. It's such a rare case that -- it hardly seems worth the effort though. */ -- && (!saves_below_hard_fp_p || const_outgoing_args_size == 0) -+ && const_below_saved_regs + const_saved_regs_size < 512 -+ /* We could handle this case even with data below the saved -+ registers, provided that that data left us with valid offsets -+ for all predicate and vector save slots. It's such a rare -+ case that it hardly seems worth the effort though. */ -+ && (!saves_below_hard_fp_p || const_below_saved_regs == 0) - && !(cfun->calls_alloca - && frame.hard_fp_offset.is_constant (&const_fp_offset) - && const_fp_offset < max_push_offset)) - { -- /* Frame with small outgoing arguments: -+ /* Frame with small area below the saved registers: - - sub sp, sp, frame_size -- stp reg1, reg2, [sp, outgoing_args_size] -- stp reg3, reg4, [sp, outgoing_args_size + 16] */ -+ stp reg1, reg2, [sp, bytes_below_saved_regs] -+ stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ - frame.initial_adjust = frame.frame_size; -- frame.callee_offset = const_outgoing_args_size; -+ frame.callee_offset = const_below_saved_regs; - } - else if (saves_below_hard_fp_p - && known_eq (frame.saved_regs_size, -@@ -8679,30 +8681,29 @@ aarch64_layout_frame (void) - - sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size - save SVE registers relative to SP -- sub sp, sp, outgoing_args_size */ -+ sub sp, sp, bytes_below_saved_regs */ - frame.initial_adjust = (frame.hard_fp_offset - + frame.below_hard_fp_saved_regs_size); -- frame.final_adjust = crtl->outgoing_args_size; -+ frame.final_adjust = frame.bytes_below_saved_regs; - } - else if (frame.hard_fp_offset.is_constant (&const_fp_offset) - && const_fp_offset < max_push_offset) - { -- /* Frame with large outgoing arguments or SVE saves, but with -- a small local area: -+ /* Frame with large area below the saved registers, or with SVE saves, -+ but with a small area above: - - stp reg1, reg2, [sp, -hard_fp_offset]! - stp reg3, reg4, [sp, 16] - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] -- sub sp, sp, outgoing_args_size */ -+ sub sp, sp, bytes_below_saved_regs */ - frame.callee_adjust = const_fp_offset; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -- frame.final_adjust = crtl->outgoing_args_size; -+ frame.final_adjust = frame.bytes_below_saved_regs; - } - else - { -- /* Frame with large local area and outgoing arguments or SVE saves, -- using frame pointer: -+ /* General case: - - sub sp, sp, hard_fp_offset - stp x29, x30, [sp, 0] -@@ -8710,10 +8711,10 @@ aarch64_layout_frame (void) - stp reg3, reg4, [sp, 16] - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] -- sub sp, sp, outgoing_args_size */ -+ sub sp, sp, bytes_below_saved_regs */ - frame.initial_adjust = frame.hard_fp_offset; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -- frame.final_adjust = crtl->outgoing_args_size; -+ frame.final_adjust = frame.bytes_below_saved_regs; - } - - /* Make sure the individual adjustments add up to the full frame size. */ -@@ -9358,7 +9359,7 @@ aarch64_get_separate_components (void) - if (frame_pointer_needed) - offset -= frame.below_hard_fp_saved_regs_size; - else -- offset += crtl->outgoing_args_size; -+ offset += frame.bytes_below_saved_regs; - - /* Check that we can access the stack slot of the register with one - direct load with no adjustments needed. */ -@@ -9507,7 +9508,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - if (frame_pointer_needed) - offset -= frame.below_hard_fp_saved_regs_size; - else -- offset += crtl->outgoing_args_size; -+ offset += frame.bytes_below_saved_regs; - - rtx addr = plus_constant (Pmode, ptr_reg, offset); - rtx mem = gen_frame_mem (mode, addr); -@@ -9561,7 +9562,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - if (frame_pointer_needed) - offset2 -= frame.below_hard_fp_saved_regs_size; - else -- offset2 += crtl->outgoing_args_size; -+ offset2 += frame.bytes_below_saved_regs; - rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); - rtx mem2 = gen_frame_mem (mode, addr2); - rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) -@@ -9635,10 +9636,10 @@ aarch64_stack_clash_protection_alloca_probe_range (void) - registers. If POLY_SIZE is not large enough to require a probe this function - will only adjust the stack. When allocating the stack space - FRAME_RELATED_P is then used to indicate if the allocation is frame related. -- FINAL_ADJUSTMENT_P indicates whether we are allocating the outgoing -- arguments. If we are then we ensure that any allocation larger than the ABI -- defined buffer needs a probe so that the invariant of having a 1KB buffer is -- maintained. -+ FINAL_ADJUSTMENT_P indicates whether we are allocating the area below -+ the saved registers. If we are then we ensure that any allocation -+ larger than the ABI defined buffer needs a probe so that the -+ invariant of having a 1KB buffer is maintained. - - We emit barriers after each stack adjustment to prevent optimizations from - breaking the invariant that we never drop the stack more than a page. This -@@ -9847,7 +9848,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - /* Handle any residuals. Residuals of at least MIN_PROBE_THRESHOLD have to - be probed. This maintains the requirement that each page is probed at - least once. For initial probing we probe only if the allocation is -- more than GUARD_SIZE - buffer, and for the outgoing arguments we probe -+ more than GUARD_SIZE - buffer, and below the saved registers we probe - if the amount is larger than buffer. GUARD_SIZE - buffer + buffer == - GUARD_SIZE. This works that for any allocation that is large enough to - trigger a probe here, we'll have at least one, and if they're not large -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 73b09e205083..0b6faa3ddf17 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -777,6 +777,11 @@ struct GTY (()) aarch64_frame - /* The size of the callee-save registers with a slot in REG_OFFSET. */ - poly_int64 saved_regs_size; - -+ /* The number of bytes between the bottom of the static frame (the bottom -+ of the outgoing arguments) and the bottom of the register save area. -+ This value is always a multiple of STACK_BOUNDARY. */ -+ poly_int64 bytes_below_saved_regs; -+ - /* The size of the callee-save registers with a slot in REG_OFFSET that - are saved below the hard frame pointer. */ - poly_int64 below_hard_fp_saved_regs_size; --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0018-aarch64-Add-bytes_below_hard_fp-to-frame-info.patch b/packages/gcc/13.2.0/0018-aarch64-Add-bytes_below_hard_fp-to-frame-info.patch deleted file mode 100644 index bc9379b4..00000000 --- a/packages/gcc/13.2.0/0018-aarch64-Add-bytes_below_hard_fp-to-frame-info.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 82f6b3e1b596ef0f4e3ac3bb9c6e88fb4458f402 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:14 +0100 -Subject: [PATCH 18/32] aarch64: Add bytes_below_hard_fp to frame info - -Following on from the previous bytes_below_saved_regs patch, this one -records the number of bytes that are below the hard frame pointer. -This eventually replaces below_hard_fp_saved_regs_size. - -If a frame pointer is not needed, the epilogue adds final_adjust -to the stack pointer before restoring registers: - - aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); - -Therefore, if the epilogue needs to restore the stack pointer from -the hard frame pointer, the directly corresponding offset is: - - -bytes_below_hard_fp + final_adjust - -i.e. go from the hard frame pointer to the bottom of the frame, -then add the same amount as if we were using the stack pointer -from the outset. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New - field. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it. - (aarch64_expand_epilogue): Use it instead of - below_hard_fp_saved_regs_size. ---- - gcc/config/aarch64/aarch64.cc | 6 +++--- - gcc/config/aarch64/aarch64.h | 5 +++++ - 2 files changed, 8 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index dacc2b0e4dd2..a3f7aabcc594 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8530,6 +8530,7 @@ aarch64_layout_frame (void) - of the callee save area. */ - bool saves_below_hard_fp_p = maybe_ne (offset, 0); - frame.below_hard_fp_saved_regs_size = offset; -+ frame.bytes_below_hard_fp = offset + frame.bytes_below_saved_regs; - if (frame.emit_frame_chain) - { - /* FP and LR are placed in the linkage record. */ -@@ -10171,8 +10172,7 @@ aarch64_expand_epilogue (bool for_sibcall) - poly_int64 final_adjust = frame.final_adjust; - poly_int64 callee_offset = frame.callee_offset; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; -- poly_int64 below_hard_fp_saved_regs_size -- = frame.below_hard_fp_saved_regs_size; -+ poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; - unsigned reg1 = frame.wb_pop_candidate1; - unsigned reg2 = frame.wb_pop_candidate2; - unsigned int last_gpr = (frame.is_scs_enabled -@@ -10230,7 +10230,7 @@ aarch64_expand_epilogue (bool for_sibcall) - is restored on the instruction doing the writeback. */ - aarch64_add_offset (Pmode, stack_pointer_rtx, - hard_frame_pointer_rtx, -- -callee_offset - below_hard_fp_saved_regs_size, -+ -bytes_below_hard_fp + final_adjust, - tmp1_rtx, tmp0_rtx, callee_adjust == 0); - else - /* The case where we need to re-use the register here is very rare, so -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 0b6faa3ddf17..4263d29d29d7 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -786,6 +786,11 @@ struct GTY (()) aarch64_frame - are saved below the hard frame pointer. */ - poly_int64 below_hard_fp_saved_regs_size; - -+ /* The number of bytes between the bottom of the static frame (the bottom -+ of the outgoing arguments) and the hard frame pointer. This value is -+ always a multiple of STACK_BOUNDARY. */ -+ poly_int64 bytes_below_hard_fp; -+ - /* Offset from the base of the frame (incomming SP) to the - top of the locals area. This value is always a multiple of - STACK_BOUNDARY. */ --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0019-aarch64-Tweak-aarch64_save-restore_callee_saves.patch b/packages/gcc/13.2.0/0019-aarch64-Tweak-aarch64_save-restore_callee_saves.patch deleted file mode 100644 index ebe3fe89..00000000 --- a/packages/gcc/13.2.0/0019-aarch64-Tweak-aarch64_save-restore_callee_saves.patch +++ /dev/null @@ -1,225 +0,0 @@ -From 86fa43e9fe4a8bf954f2919f07cbe3646d1d1df3 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:14 +0100 -Subject: [PATCH 19/32] aarch64: Tweak aarch64_save/restore_callee_saves - -aarch64_save_callee_saves and aarch64_restore_callee_saves took -a parameter called start_offset that gives the offset of the -bottom of the saved register area from the current stack pointer. -However, it's more convenient for later patches if we use the -bottom of the entire frame as the reference point, rather than -the bottom of the saved registers. - -Doing that removes the need for the callee_offset field. -Other than that, this is not a win on its own. It only really -makes sense in combination with the follow-on patches. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove - callee_offset handling. - (aarch64_save_callee_saves): Replace the start_offset parameter - with a bytes_below_sp parameter. - (aarch64_restore_callee_saves): Likewise. - (aarch64_expand_prologue): Update accordingly. - (aarch64_expand_epilogue): Likewise. ---- - gcc/config/aarch64/aarch64.cc | 56 +++++++++++++++++------------------ - gcc/config/aarch64/aarch64.h | 4 --- - 2 files changed, 28 insertions(+), 32 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index a3f7aabcc594..46ae5cf76735 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8604,7 +8604,6 @@ aarch64_layout_frame (void) - frame.final_adjust = 0; - frame.callee_adjust = 0; - frame.sve_callee_adjust = 0; -- frame.callee_offset = 0; - - frame.wb_pop_candidate1 = frame.wb_push_candidate1; - frame.wb_pop_candidate2 = frame.wb_push_candidate2; -@@ -8672,7 +8671,6 @@ aarch64_layout_frame (void) - stp reg1, reg2, [sp, bytes_below_saved_regs] - stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ - frame.initial_adjust = frame.frame_size; -- frame.callee_offset = const_below_saved_regs; - } - else if (saves_below_hard_fp_p - && known_eq (frame.saved_regs_size, -@@ -9073,12 +9071,13 @@ aarch64_add_cfa_expression (rtx_insn *insn, rtx reg, - } - - /* Emit code to save the callee-saved registers from register number START -- to LIMIT to the stack at the location starting at offset START_OFFSET, -- skipping any write-back candidates if SKIP_WB is true. HARD_FP_VALID_P -- is true if the hard frame pointer has been set up. */ -+ to LIMIT to the stack. The stack pointer is currently BYTES_BELOW_SP -+ bytes above the bottom of the static frame. Skip any write-back -+ candidates if SKIP_WB is true. HARD_FP_VALID_P is true if the hard -+ frame pointer has been set up. */ - - static void --aarch64_save_callee_saves (poly_int64 start_offset, -+aarch64_save_callee_saves (poly_int64 bytes_below_sp, - unsigned start, unsigned limit, bool skip_wb, - bool hard_fp_valid_p) - { -@@ -9106,7 +9105,9 @@ aarch64_save_callee_saves (poly_int64 start_offset, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + frame.reg_offset[regno]; -+ offset = (frame.reg_offset[regno] -+ + frame.bytes_below_saved_regs -+ - bytes_below_sp); - rtx base_rtx = stack_pointer_rtx; - poly_int64 sp_offset = offset; - -@@ -9117,9 +9118,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, - else if (GP_REGNUM_P (regno) - && (!offset.is_constant (&const_offset) || const_offset >= 512)) - { -- gcc_assert (known_eq (start_offset, 0)); -- poly_int64 fp_offset -- = frame.below_hard_fp_saved_regs_size; -+ poly_int64 fp_offset = frame.bytes_below_hard_fp - bytes_below_sp; - if (hard_fp_valid_p) - base_rtx = hard_frame_pointer_rtx; - else -@@ -9183,12 +9182,13 @@ aarch64_save_callee_saves (poly_int64 start_offset, - } - - /* Emit code to restore the callee registers from register number START -- up to and including LIMIT. Restore from the stack offset START_OFFSET, -- skipping any write-back candidates if SKIP_WB is true. Write the -- appropriate REG_CFA_RESTORE notes into CFI_OPS. */ -+ up to and including LIMIT. The stack pointer is currently BYTES_BELOW_SP -+ bytes above the bottom of the static frame. Skip any write-back -+ candidates if SKIP_WB is true. Write the appropriate REG_CFA_RESTORE -+ notes into CFI_OPS. */ - - static void --aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, -+aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, - unsigned limit, bool skip_wb, rtx *cfi_ops) - { - aarch64_frame &frame = cfun->machine->frame; -@@ -9214,7 +9214,9 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = start_offset + frame.reg_offset[regno]; -+ offset = (frame.reg_offset[regno] -+ + frame.bytes_below_saved_regs -+ - bytes_below_sp); - rtx base_rtx = stack_pointer_rtx; - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, -@@ -9990,8 +9992,6 @@ aarch64_expand_prologue (void) - HOST_WIDE_INT callee_adjust = frame.callee_adjust; - poly_int64 final_adjust = frame.final_adjust; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; -- poly_int64 below_hard_fp_saved_regs_size -- = frame.below_hard_fp_saved_regs_size; - unsigned reg1 = frame.wb_push_candidate1; - unsigned reg2 = frame.wb_push_candidate2; - bool emit_frame_chain = frame.emit_frame_chain; -@@ -10067,8 +10067,8 @@ aarch64_expand_prologue (void) - - frame.hard_fp_offset); - gcc_assert (known_ge (chain_offset, 0)); - -- /* The offset of the bottom of the save area from the current SP. */ -- poly_int64 saved_regs_offset = chain_offset - below_hard_fp_saved_regs_size; -+ /* The offset of the current SP from the bottom of the static frame. */ -+ poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; - - if (emit_frame_chain) - { -@@ -10076,7 +10076,7 @@ aarch64_expand_prologue (void) - { - reg1 = R29_REGNUM; - reg2 = R30_REGNUM; -- aarch64_save_callee_saves (saved_regs_offset, reg1, reg2, -+ aarch64_save_callee_saves (bytes_below_sp, reg1, reg2, - false, false); - } - else -@@ -10116,7 +10116,7 @@ aarch64_expand_prologue (void) - emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); - } - -- aarch64_save_callee_saves (saved_regs_offset, R0_REGNUM, R30_REGNUM, -+ aarch64_save_callee_saves (bytes_below_sp, R0_REGNUM, R30_REGNUM, - callee_adjust != 0 || emit_frame_chain, - emit_frame_chain); - if (maybe_ne (sve_callee_adjust, 0)) -@@ -10126,16 +10126,17 @@ aarch64_expand_prologue (void) - aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, - sve_callee_adjust, - !frame_pointer_needed, false); -- saved_regs_offset += sve_callee_adjust; -+ bytes_below_sp -= sve_callee_adjust; - } -- aarch64_save_callee_saves (saved_regs_offset, P0_REGNUM, P15_REGNUM, -+ aarch64_save_callee_saves (bytes_below_sp, P0_REGNUM, P15_REGNUM, - false, emit_frame_chain); -- aarch64_save_callee_saves (saved_regs_offset, V0_REGNUM, V31_REGNUM, -+ aarch64_save_callee_saves (bytes_below_sp, V0_REGNUM, V31_REGNUM, - callee_adjust != 0 || emit_frame_chain, - emit_frame_chain); - - /* We may need to probe the final adjustment if it is larger than the guard - that is assumed by the called. */ -+ gcc_assert (known_eq (bytes_below_sp, final_adjust)); - aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, - !frame_pointer_needed, true); - } -@@ -10170,7 +10171,6 @@ aarch64_expand_epilogue (bool for_sibcall) - poly_int64 initial_adjust = frame.initial_adjust; - HOST_WIDE_INT callee_adjust = frame.callee_adjust; - poly_int64 final_adjust = frame.final_adjust; -- poly_int64 callee_offset = frame.callee_offset; - poly_int64 sve_callee_adjust = frame.sve_callee_adjust; - poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; - unsigned reg1 = frame.wb_pop_candidate1; -@@ -10240,9 +10240,9 @@ aarch64_expand_epilogue (bool for_sibcall) - - /* Restore the vector registers before the predicate registers, - so that we can use P4 as a temporary for big-endian SVE frames. */ -- aarch64_restore_callee_saves (callee_offset, V0_REGNUM, V31_REGNUM, -+ aarch64_restore_callee_saves (final_adjust, V0_REGNUM, V31_REGNUM, - callee_adjust != 0, &cfi_ops); -- aarch64_restore_callee_saves (callee_offset, P0_REGNUM, P15_REGNUM, -+ aarch64_restore_callee_saves (final_adjust, P0_REGNUM, P15_REGNUM, - false, &cfi_ops); - if (maybe_ne (sve_callee_adjust, 0)) - aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); -@@ -10250,7 +10250,7 @@ aarch64_expand_epilogue (bool for_sibcall) - /* When shadow call stack is enabled, the scs_pop in the epilogue will - restore x30, we don't need to restore x30 again in the traditional - way. */ -- aarch64_restore_callee_saves (callee_offset - sve_callee_adjust, -+ aarch64_restore_callee_saves (final_adjust + sve_callee_adjust, - R0_REGNUM, last_gpr, - callee_adjust != 0, &cfi_ops); - -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 4263d29d29d7..fd820b1be4eb 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -813,10 +813,6 @@ struct GTY (()) aarch64_frame - It is zero when no push is used. */ - HOST_WIDE_INT callee_adjust; - -- /* The offset from SP to the callee-save registers after initial_adjust. -- It may be non-zero if no push is used (ie. callee_adjust == 0). */ -- poly_int64 callee_offset; -- - /* The size of the stack adjustment before saving or after restoring - SVE registers. */ - poly_int64 sve_callee_adjust; --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0020-aarch64-Only-calculate-chain_offset-if-there-is-a-ch.patch b/packages/gcc/13.2.0/0020-aarch64-Only-calculate-chain_offset-if-there-is-a-ch.patch deleted file mode 100644 index 0c62ada0..00000000 --- a/packages/gcc/13.2.0/0020-aarch64-Only-calculate-chain_offset-if-there-is-a-ch.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 8ae9181426f2700c2e5a2909487fa630e6fa406b Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:15 +0100 -Subject: [PATCH 20/32] aarch64: Only calculate chain_offset if there is a - chain - -After previous patches, it is no longer necessary to calculate -a chain_offset in cases where there is no chain record. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the - calculation of chain_offset into the emit_frame_chain block. ---- - gcc/config/aarch64/aarch64.cc | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 46ae5cf76735..0e9b9717c085 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -10062,16 +10062,16 @@ aarch64_expand_prologue (void) - if (callee_adjust != 0) - aarch64_push_regs (reg1, reg2, callee_adjust); - -- /* The offset of the frame chain record (if any) from the current SP. */ -- poly_int64 chain_offset = (initial_adjust + callee_adjust -- - frame.hard_fp_offset); -- gcc_assert (known_ge (chain_offset, 0)); -- - /* The offset of the current SP from the bottom of the static frame. */ - poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; - - if (emit_frame_chain) - { -+ /* The offset of the frame chain record (if any) from the current SP. */ -+ poly_int64 chain_offset = (initial_adjust + callee_adjust -+ - frame.hard_fp_offset); -+ gcc_assert (known_ge (chain_offset, 0)); -+ - if (callee_adjust == 0) - { - reg1 = R29_REGNUM; --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0021-aarch64-Rename-locals_offset-to-bytes_above_locals.patch b/packages/gcc/13.2.0/0021-aarch64-Rename-locals_offset-to-bytes_above_locals.patch deleted file mode 100644 index f00913e8..00000000 --- a/packages/gcc/13.2.0/0021-aarch64-Rename-locals_offset-to-bytes_above_locals.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 375794feb614cee1f41b710b9cc1b6f25da6c1cb Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:15 +0100 -Subject: [PATCH 21/32] aarch64: Rename locals_offset to bytes_above_locals -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -locals_offset was described as: - - /* Offset from the base of the frame (incomming SP) to the - top of the locals area. This value is always a multiple of - STACK_BOUNDARY. */ - -This is implicitly an “upside down” view of the frame: the incoming -SP is at offset 0, and anything N bytes below the incoming SP is at -offset N (rather than -N). - -However, reg_offset instead uses a “right way up” view; that is, -it views offsets in address terms. Something above X is at a -positive offset from X and something below X is at a negative -offset from X. - -Also, even on FRAME_GROWS_DOWNWARD targets like AArch64, -target-independent code views offsets in address terms too: -locals are allocated at negative offsets to virtual_stack_vars. - -It seems confusing to have *_offset fields of the same structure -using different polarities like this. This patch tries to avoid -that by renaming locals_offset to bytes_above_locals. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to... - (aarch64_frame::bytes_above_locals): ...this. - * config/aarch64/aarch64.cc (aarch64_layout_frame) - (aarch64_initial_elimination_offset): Update accordingly. ---- - gcc/config/aarch64/aarch64.cc | 6 +++--- - gcc/config/aarch64/aarch64.h | 6 +++--- - 2 files changed, 6 insertions(+), 6 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 0e9b9717c085..0a22f91520e5 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8598,7 +8598,7 @@ aarch64_layout_frame (void) - STACK_BOUNDARY / BITS_PER_UNIT)); - frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; - -- frame.locals_offset = frame.saved_varargs_size; -+ frame.bytes_above_locals = frame.saved_varargs_size; - - frame.initial_adjust = 0; - frame.final_adjust = 0; -@@ -12754,13 +12754,13 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to) - return frame.hard_fp_offset; - - if (from == FRAME_POINTER_REGNUM) -- return frame.hard_fp_offset - frame.locals_offset; -+ return frame.hard_fp_offset - frame.bytes_above_locals; - } - - if (to == STACK_POINTER_REGNUM) - { - if (from == FRAME_POINTER_REGNUM) -- return frame.frame_size - frame.locals_offset; -+ return frame.frame_size - frame.bytes_above_locals; - } - - return frame.frame_size; -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index fd820b1be4eb..7ae12d13e2b4 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -791,10 +791,10 @@ struct GTY (()) aarch64_frame - always a multiple of STACK_BOUNDARY. */ - poly_int64 bytes_below_hard_fp; - -- /* Offset from the base of the frame (incomming SP) to the -- top of the locals area. This value is always a multiple of -+ /* The number of bytes between the top of the locals area and the top -+ of the frame (the incomming SP). This value is always a multiple of - STACK_BOUNDARY. */ -- poly_int64 locals_offset; -+ poly_int64 bytes_above_locals; - - /* Offset from the base of the frame (incomming SP) to the - hard_frame_pointer. This value is always a multiple of --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0022-aarch64-Rename-hard_fp_offset-to-bytes_above_hard_fp.patch b/packages/gcc/13.2.0/0022-aarch64-Rename-hard_fp_offset-to-bytes_above_hard_fp.patch deleted file mode 100644 index b8fac757..00000000 --- a/packages/gcc/13.2.0/0022-aarch64-Rename-hard_fp_offset-to-bytes_above_hard_fp.patch +++ /dev/null @@ -1,148 +0,0 @@ -From 1a9ea1c45c75615ffbfabe652b3598a1d7be2168 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:16 +0100 -Subject: [PATCH 22/32] aarch64: Rename hard_fp_offset to bytes_above_hard_fp -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Similarly to the previous locals_offset patch, hard_fp_offset -was described as: - - /* Offset from the base of the frame (incomming SP) to the - hard_frame_pointer. This value is always a multiple of - STACK_BOUNDARY. */ - poly_int64 hard_fp_offset; - -which again took an “upside-down” view: higher offsets meant lower -addresses. This patch renames the field to bytes_above_hard_fp instead. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename - to... - (aarch64_frame::bytes_above_hard_fp): ...this. - * config/aarch64/aarch64.cc (aarch64_layout_frame) - (aarch64_expand_prologue): Update accordingly. - (aarch64_initial_elimination_offset): Likewise. ---- - gcc/config/aarch64/aarch64.cc | 26 +++++++++++++------------- - gcc/config/aarch64/aarch64.h | 6 +++--- - 2 files changed, 16 insertions(+), 16 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 0a22f91520e5..95499ae49ba2 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8590,7 +8590,7 @@ aarch64_layout_frame (void) - + get_frame_size (), - STACK_BOUNDARY / BITS_PER_UNIT); - -- frame.hard_fp_offset -+ frame.bytes_above_hard_fp - = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; - - /* Both these values are already aligned. */ -@@ -8639,13 +8639,13 @@ aarch64_layout_frame (void) - else if (frame.wb_pop_candidate1 != INVALID_REGNUM) - max_push_offset = 256; - -- HOST_WIDE_INT const_size, const_below_saved_regs, const_fp_offset; -+ HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; - HOST_WIDE_INT const_saved_regs_size; - if (known_eq (frame.saved_regs_size, 0)) - frame.initial_adjust = frame.frame_size; - else if (frame.frame_size.is_constant (&const_size) - && const_size < max_push_offset -- && known_eq (frame.hard_fp_offset, const_size)) -+ && known_eq (frame.bytes_above_hard_fp, const_size)) - { - /* Simple, small frame with no data below the saved registers. - -@@ -8662,8 +8662,8 @@ aarch64_layout_frame (void) - case that it hardly seems worth the effort though. */ - && (!saves_below_hard_fp_p || const_below_saved_regs == 0) - && !(cfun->calls_alloca -- && frame.hard_fp_offset.is_constant (&const_fp_offset) -- && const_fp_offset < max_push_offset)) -+ && frame.bytes_above_hard_fp.is_constant (&const_above_fp) -+ && const_above_fp < max_push_offset)) - { - /* Frame with small area below the saved registers: - -@@ -8681,12 +8681,12 @@ aarch64_layout_frame (void) - sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size - save SVE registers relative to SP - sub sp, sp, bytes_below_saved_regs */ -- frame.initial_adjust = (frame.hard_fp_offset -+ frame.initial_adjust = (frame.bytes_above_hard_fp - + frame.below_hard_fp_saved_regs_size); - frame.final_adjust = frame.bytes_below_saved_regs; - } -- else if (frame.hard_fp_offset.is_constant (&const_fp_offset) -- && const_fp_offset < max_push_offset) -+ else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) -+ && const_above_fp < max_push_offset) - { - /* Frame with large area below the saved registers, or with SVE saves, - but with a small area above: -@@ -8696,7 +8696,7 @@ aarch64_layout_frame (void) - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ -- frame.callee_adjust = const_fp_offset; -+ frame.callee_adjust = const_above_fp; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } -@@ -8711,7 +8711,7 @@ aarch64_layout_frame (void) - [sub sp, sp, below_hard_fp_saved_regs_size] - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ -- frame.initial_adjust = frame.hard_fp_offset; -+ frame.initial_adjust = frame.bytes_above_hard_fp; - frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } -@@ -10069,7 +10069,7 @@ aarch64_expand_prologue (void) - { - /* The offset of the frame chain record (if any) from the current SP. */ - poly_int64 chain_offset = (initial_adjust + callee_adjust -- - frame.hard_fp_offset); -+ - frame.bytes_above_hard_fp); - gcc_assert (known_ge (chain_offset, 0)); - - if (callee_adjust == 0) -@@ -12751,10 +12751,10 @@ aarch64_initial_elimination_offset (unsigned from, unsigned to) - if (to == HARD_FRAME_POINTER_REGNUM) - { - if (from == ARG_POINTER_REGNUM) -- return frame.hard_fp_offset; -+ return frame.bytes_above_hard_fp; - - if (from == FRAME_POINTER_REGNUM) -- return frame.hard_fp_offset - frame.bytes_above_locals; -+ return frame.bytes_above_hard_fp - frame.bytes_above_locals; - } - - if (to == STACK_POINTER_REGNUM) -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 7ae12d13e2b4..3808f49e9ca5 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -796,10 +796,10 @@ struct GTY (()) aarch64_frame - STACK_BOUNDARY. */ - poly_int64 bytes_above_locals; - -- /* Offset from the base of the frame (incomming SP) to the -- hard_frame_pointer. This value is always a multiple of -+ /* The number of bytes between the hard_frame_pointer and the top of -+ the frame (the incomming SP). This value is always a multiple of - STACK_BOUNDARY. */ -- poly_int64 hard_fp_offset; -+ poly_int64 bytes_above_hard_fp; - - /* The size of the frame. This value is the offset from base of the - frame (incomming SP) to the stack_pointer. This value is always --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0023-aarch64-Tweak-frame_size-comment.patch b/packages/gcc/13.2.0/0023-aarch64-Tweak-frame_size-comment.patch deleted file mode 100644 index c6f66660..00000000 --- a/packages/gcc/13.2.0/0023-aarch64-Tweak-frame_size-comment.patch +++ /dev/null @@ -1,35 +0,0 @@ -From d202ce1ecf60a36a3e1009917dd76109248ce9be Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:16 +0100 -Subject: [PATCH 23/32] aarch64: Tweak frame_size comment -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch fixes another case in which a value was described with -an “upside-down” view. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment. ---- - gcc/config/aarch64/aarch64.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 3808f49e9ca5..108a5731b0d7 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -801,8 +801,8 @@ struct GTY (()) aarch64_frame - STACK_BOUNDARY. */ - poly_int64 bytes_above_hard_fp; - -- /* The size of the frame. This value is the offset from base of the -- frame (incomming SP) to the stack_pointer. This value is always -+ /* The size of the frame, i.e. the number of bytes between the bottom -+ of the outgoing arguments and the incoming SP. This value is always - a multiple of STACK_BOUNDARY. */ - poly_int64 frame_size; - --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0024-aarch64-Measure-reg_offset-from-the-bottom-of-the-fr.patch b/packages/gcc/13.2.0/0024-aarch64-Measure-reg_offset-from-the-bottom-of-the-fr.patch deleted file mode 100644 index 709a632b..00000000 --- a/packages/gcc/13.2.0/0024-aarch64-Measure-reg_offset-from-the-bottom-of-the-fr.patch +++ /dev/null @@ -1,196 +0,0 @@ -From f2b585375205b0a1802d79c682ba33766ecd1f0f Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:17 +0100 -Subject: [PATCH 24/32] aarch64: Measure reg_offset from the bottom of the - frame - -reg_offset was measured from the bottom of the saved register area. -This made perfect sense with the original layout, since the bottom -of the saved register area was also the hard frame pointer address. -It became slightly less obvious with SVE, since we save SVE -registers below the hard frame pointer, but it still made sense. - -However, if we want to allow different frame layouts, it's more -convenient and obvious to measure reg_offset from the bottom of -the frame. After previous patches, it's also a slight simplification -in its own right. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame): Add comment above - reg_offset. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets - from the bottom of the frame, rather than the bottom of the saved - register area. Measure reg_offset from the bottom of the frame - rather than the bottom of the saved register area. - (aarch64_save_callee_saves): Update accordingly. - (aarch64_restore_callee_saves): Likewise. - (aarch64_get_separate_components): Likewise. - (aarch64_process_components): Likewise. ---- - gcc/config/aarch64/aarch64.cc | 53 ++++++++++++++++------------------- - gcc/config/aarch64/aarch64.h | 3 ++ - 2 files changed, 27 insertions(+), 29 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 95499ae49ba2..af99807ef8ab 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8400,7 +8400,6 @@ aarch64_needs_frame_chain (void) - static void - aarch64_layout_frame (void) - { -- poly_int64 offset = 0; - int regno, last_fp_reg = INVALID_REGNUM; - machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM); - poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); -@@ -8478,7 +8477,9 @@ aarch64_layout_frame (void) - gcc_assert (crtl->is_leaf - || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); - -- frame.bytes_below_saved_regs = crtl->outgoing_args_size; -+ poly_int64 offset = crtl->outgoing_args_size; -+ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); -+ frame.bytes_below_saved_regs = offset; - - /* Now assign stack slots for the registers. Start with the predicate - registers, since predicate LDR and STR have a relatively small -@@ -8490,7 +8491,8 @@ aarch64_layout_frame (void) - offset += BYTES_PER_SVE_PRED; - } - -- if (maybe_ne (offset, 0)) -+ poly_int64 saved_prs_size = offset - frame.bytes_below_saved_regs; -+ if (maybe_ne (saved_prs_size, 0)) - { - /* If we have any vector registers to save above the predicate registers, - the offset of the vector register save slots need to be a multiple -@@ -8508,10 +8510,10 @@ aarch64_layout_frame (void) - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - else - { -- if (known_le (offset, vector_save_size)) -- offset = vector_save_size; -- else if (known_le (offset, vector_save_size * 2)) -- offset = vector_save_size * 2; -+ if (known_le (saved_prs_size, vector_save_size)) -+ offset = frame.bytes_below_saved_regs + vector_save_size; -+ else if (known_le (saved_prs_size, vector_save_size * 2)) -+ offset = frame.bytes_below_saved_regs + vector_save_size * 2; - else - gcc_unreachable (); - } -@@ -8528,9 +8530,10 @@ aarch64_layout_frame (void) - - /* OFFSET is now the offset of the hard frame pointer from the bottom - of the callee save area. */ -- bool saves_below_hard_fp_p = maybe_ne (offset, 0); -- frame.below_hard_fp_saved_regs_size = offset; -- frame.bytes_below_hard_fp = offset + frame.bytes_below_saved_regs; -+ frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; -+ bool saves_below_hard_fp_p -+ = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); -+ frame.bytes_below_hard_fp = offset; - if (frame.emit_frame_chain) - { - /* FP and LR are placed in the linkage record. */ -@@ -8581,9 +8584,10 @@ aarch64_layout_frame (void) - - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - -- frame.saved_regs_size = offset; -+ frame.saved_regs_size = offset - frame.bytes_below_saved_regs; - -- poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; -+ poly_int64 varargs_and_saved_regs_size -+ = frame.saved_regs_size + frame.saved_varargs_size; - - poly_int64 saved_regs_and_above - = aligned_upper_bound (varargs_and_saved_regs_size -@@ -9105,9 +9109,7 @@ aarch64_save_callee_saves (poly_int64 bytes_below_sp, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = (frame.reg_offset[regno] -- + frame.bytes_below_saved_regs -- - bytes_below_sp); -+ offset = frame.reg_offset[regno] - bytes_below_sp; - rtx base_rtx = stack_pointer_rtx; - poly_int64 sp_offset = offset; - -@@ -9214,9 +9216,7 @@ aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, - - machine_mode mode = aarch64_reg_save_mode (regno); - reg = gen_rtx_REG (mode, regno); -- offset = (frame.reg_offset[regno] -- + frame.bytes_below_saved_regs -- - bytes_below_sp); -+ offset = frame.reg_offset[regno] - bytes_below_sp; - rtx base_rtx = stack_pointer_rtx; - if (mode == VNx2DImode && BYTES_BIG_ENDIAN) - aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, -@@ -9355,14 +9355,12 @@ aarch64_get_separate_components (void) - it as a stack probe for -fstack-clash-protection. */ - if (flag_stack_clash_protection - && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) -- && known_eq (offset, 0)) -+ && known_eq (offset, frame.bytes_below_saved_regs)) - continue; - - /* Get the offset relative to the register we'll use. */ - if (frame_pointer_needed) -- offset -= frame.below_hard_fp_saved_regs_size; -- else -- offset += frame.bytes_below_saved_regs; -+ offset -= frame.bytes_below_hard_fp; - - /* Check that we can access the stack slot of the register with one - direct load with no adjustments needed. */ -@@ -9509,9 +9507,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - rtx reg = gen_rtx_REG (mode, regno); - poly_int64 offset = frame.reg_offset[regno]; - if (frame_pointer_needed) -- offset -= frame.below_hard_fp_saved_regs_size; -- else -- offset += frame.bytes_below_saved_regs; -+ offset -= frame.bytes_below_hard_fp; - - rtx addr = plus_constant (Pmode, ptr_reg, offset); - rtx mem = gen_frame_mem (mode, addr); -@@ -9563,9 +9559,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) - /* REGNO2 can be saved/restored in a pair with REGNO. */ - rtx reg2 = gen_rtx_REG (mode, regno2); - if (frame_pointer_needed) -- offset2 -= frame.below_hard_fp_saved_regs_size; -- else -- offset2 += frame.bytes_below_saved_regs; -+ offset2 -= frame.bytes_below_hard_fp; - rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); - rtx mem2 = gen_frame_mem (mode, addr2); - rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) -@@ -9681,7 +9675,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - if (final_adjustment_p - && known_eq (frame.below_hard_fp_saved_regs_size, 0)) - { -- poly_int64 lr_offset = frame.reg_offset[LR_REGNUM]; -+ poly_int64 lr_offset = (frame.reg_offset[LR_REGNUM] -+ - frame.bytes_below_saved_regs); - if (known_ge (lr_offset, 0)) - min_probe_threshold -= lr_offset.to_constant (); - else -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 108a5731b0d7..c8becb098c88 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -766,6 +766,9 @@ extern enum aarch64_processor aarch64_tune; - #ifdef HAVE_POLY_INT_H - struct GTY (()) aarch64_frame - { -+ /* The offset from the bottom of the static frame (the bottom of the -+ outgoing arguments) of each register save slot, or -2 if no save is -+ needed. */ - poly_int64 reg_offset[LAST_SAVED_REGNUM + 1]; - - /* The number of extra stack bytes taken up by register varargs. --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0025-aarch64-Simplify-top-of-frame-allocation.patch b/packages/gcc/13.2.0/0025-aarch64-Simplify-top-of-frame-allocation.patch deleted file mode 100644 index 509050a0..00000000 --- a/packages/gcc/13.2.0/0025-aarch64-Simplify-top-of-frame-allocation.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 79faabda181d0d9fd29a3cf5726ba65bdee945b5 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:17 +0100 -Subject: [PATCH 25/32] aarch64: Simplify top of frame allocation - -After previous patches, it no longer really makes sense to allocate -the top of the frame in terms of varargs_and_saved_regs_size and -saved_regs_and_above. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify - the allocation of the top of the frame. ---- - gcc/config/aarch64/aarch64.cc | 23 ++++++++--------------- - 1 file changed, 8 insertions(+), 15 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index af99807ef8ab..31b00094c2a7 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8586,23 +8586,16 @@ aarch64_layout_frame (void) - - frame.saved_regs_size = offset - frame.bytes_below_saved_regs; - -- poly_int64 varargs_and_saved_regs_size -- = frame.saved_regs_size + frame.saved_varargs_size; -+ offset += get_frame_size (); -+ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -+ auto top_of_locals = offset; - -- poly_int64 saved_regs_and_above -- = aligned_upper_bound (varargs_and_saved_regs_size -- + get_frame_size (), -- STACK_BOUNDARY / BITS_PER_UNIT); -+ offset += frame.saved_varargs_size; -+ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); -+ frame.frame_size = offset; - -- frame.bytes_above_hard_fp -- = saved_regs_and_above - frame.below_hard_fp_saved_regs_size; -- -- /* Both these values are already aligned. */ -- gcc_assert (multiple_p (frame.bytes_below_saved_regs, -- STACK_BOUNDARY / BITS_PER_UNIT)); -- frame.frame_size = saved_regs_and_above + frame.bytes_below_saved_regs; -- -- frame.bytes_above_locals = frame.saved_varargs_size; -+ frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; -+ frame.bytes_above_locals = frame.frame_size - top_of_locals; - - frame.initial_adjust = 0; - frame.final_adjust = 0; --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0026-aarch64-Minor-initial-adjustment-tweak.patch b/packages/gcc/13.2.0/0026-aarch64-Minor-initial-adjustment-tweak.patch deleted file mode 100644 index 4de884f3..00000000 --- a/packages/gcc/13.2.0/0026-aarch64-Minor-initial-adjustment-tweak.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 4e62049e403b141e6f916176160dac8cbd65fe47 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:18 +0100 -Subject: [PATCH 26/32] aarch64: Minor initial adjustment tweak - -This patch just changes a calculation of initial_adjust -to one that makes it slightly more obvious that the total -adjustment is frame.frame_size. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak - calculation of initial_adjust for frames in which all saves - are SVE saves. ---- - gcc/config/aarch64/aarch64.cc | 5 ++--- - 1 file changed, 2 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 31b00094c2a7..1aa79da0673c 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8675,11 +8675,10 @@ aarch64_layout_frame (void) - { - /* Frame in which all saves are SVE saves: - -- sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size -+ sub sp, sp, frame_size - bytes_below_saved_regs - save SVE registers relative to SP - sub sp, sp, bytes_below_saved_regs */ -- frame.initial_adjust = (frame.bytes_above_hard_fp -- + frame.below_hard_fp_saved_regs_size); -+ frame.initial_adjust = frame.frame_size - frame.bytes_below_saved_regs; - frame.final_adjust = frame.bytes_below_saved_regs; - } - else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0027-aarch64-Tweak-stack-clash-boundary-condition.patch b/packages/gcc/13.2.0/0027-aarch64-Tweak-stack-clash-boundary-condition.patch deleted file mode 100644 index cc376eb0..00000000 --- a/packages/gcc/13.2.0/0027-aarch64-Tweak-stack-clash-boundary-condition.patch +++ /dev/null @@ -1,125 +0,0 @@ -From aaa1a0a5912d9e5d571e5f1c6f09ceac99544ab5 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:18 +0100 -Subject: [PATCH 27/32] aarch64: Tweak stack clash boundary condition - -The AArch64 ABI says that, when stack clash protection is used, -there can be a maximum of 1KiB of unprobed space at sp on entry -to a function. Therefore, we need to probe when allocating ->= guard_size - 1KiB of data (>= rather than >). This is what -GCC does. - -If an allocation is exactly guard_size bytes, it is enough to allocate -those bytes and probe once at offset 1024. It isn't possible to use a -single probe at any other offset: higher would conmplicate later code, -by leaving more unprobed space than usual, while lower would risk -leaving an entire page unprobed. For simplicity, the code probes all -allocations at offset 1024. - -Some register saves also act as probes. If we need to allocate -more space below the last such register save probe, we need to -probe the allocation if it is > 1KiB. Again, this allocation is -then sometimes (but not always) probed at offset 1024. This sort of -allocation is currently only used for outgoing arguments, which are -rarely this big. - -However, the code also probed if this final outgoing-arguments -allocation was == 1KiB, rather than just > 1KiB. This isn't -necessary, since the register save then probes at offset 1024 -as required. Continuing to probe allocations of exactly 1KiB -would complicate later patches. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): - Don't probe final allocations that are exactly 1KiB in size (after - unprobed space above the final allocation has been deducted). - -gcc/testsuite/ - * gcc.target/aarch64/stack-check-prologue-17.c: New test. ---- - gcc/config/aarch64/aarch64.cc | 4 +- - .../aarch64/stack-check-prologue-17.c | 55 +++++++++++++++++++ - 2 files changed, 58 insertions(+), 1 deletion(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 1aa79da0673c..5cad847977a4 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -9648,9 +9648,11 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - HOST_WIDE_INT guard_size - = 1 << param_stack_clash_protection_guard_size; - HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; -+ HOST_WIDE_INT byte_sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT; -+ gcc_assert (multiple_p (poly_size, byte_sp_alignment)); - HOST_WIDE_INT min_probe_threshold - = (final_adjustment_p -- ? guard_used_by_caller -+ ? guard_used_by_caller + byte_sp_alignment - : guard_size - guard_used_by_caller); - /* When doing the final adjustment for the outgoing arguments, take into - account any unprobed space there is above the current SP. There are -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -new file mode 100644 -index 000000000000..0d8a25d73a24 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -@@ -0,0 +1,55 @@ -+/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void f(int, ...); -+void g(); -+ -+/* -+** test1: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1024 -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test1(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test2: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1040 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test2(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x); -+ } -+ g(); -+ return 1; -+} --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0028-aarch64-Put-LR-save-probe-in-first-16-bytes.patch b/packages/gcc/13.2.0/0028-aarch64-Put-LR-save-probe-in-first-16-bytes.patch deleted file mode 100644 index 4ba2df93..00000000 --- a/packages/gcc/13.2.0/0028-aarch64-Put-LR-save-probe-in-first-16-bytes.patch +++ /dev/null @@ -1,406 +0,0 @@ -From 8433953434a7b58c0923140d39eb3c5988c1d097 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:19 +0100 -Subject: [PATCH 28/32] aarch64: Put LR save probe in first 16 bytes - --fstack-clash-protection uses the save of LR as a probe for the next -allocation. The next allocation could be: - -* another part of the static frame, e.g. when allocating SVE save slots - or outgoing arguments - -* an alloca in the same function - -* an allocation made by a callee function - -However, when -fomit-frame-pointer is used, the LR save slot is placed -above the other GPR save slots. It could therefore be up to 80 bytes -above the base of the GPR save area (which is also the hard fp address). - -aarch64_allocate_and_probe_stack_space took this into account when -deciding how much subsequent space could be allocated without needing -a probe. However, it interacted badly with: - - /* If doing a small final adjustment, we always probe at offset 0. - This is done to avoid issues when LR is not at position 0 or when - the final adjustment is smaller than the probing offset. */ - else if (final_adjustment_p && rounded_size == 0) - residual_probe_offset = 0; - -which forces any allocation that is smaller than the guard page size -to be probed at offset 0 rather than the usual offset 1024. It was -therefore possible to construct cases in which we had: - -* a probe using LR at SP + 80 bytes (or some other value >= 16) -* an allocation of the guard page size - 16 bytes -* a probe at SP + 0 - -which allocates guard page size + 64 consecutive unprobed bytes. - -This patch requires the LR probe to be in the first 16 bytes of the -save area when stack clash protection is active. Doing it -unconditionally would cause code-quality regressions. - -Putting LR before other registers prevents push/pop allocation -when shadow call stacks are enabled, since LR is restored -separately from the other callee-saved registers. - -The new comment doesn't say that the probe register is required -to be LR, since a later patch removes that restriction. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that - the LR save slot is in the first 16 bytes of the register save area. - Only form STP/LDP push/pop candidates if both registers are valid. - (aarch64_allocate_and_probe_stack_space): Remove workaround for - when LR was not in the first 16 bytes. - -gcc/testsuite/ - * gcc.target/aarch64/stack-check-prologue-18.c: New test. - * gcc.target/aarch64/stack-check-prologue-19.c: Likewise. - * gcc.target/aarch64/stack-check-prologue-20.c: Likewise. ---- - gcc/config/aarch64/aarch64.cc | 72 ++++++------- - .../aarch64/stack-check-prologue-18.c | 100 ++++++++++++++++++ - .../aarch64/stack-check-prologue-19.c | 100 ++++++++++++++++++ - .../aarch64/stack-check-prologue-20.c | 3 + - 4 files changed, 233 insertions(+), 42 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 5cad847977a4..a765f92329d3 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8534,26 +8534,34 @@ aarch64_layout_frame (void) - bool saves_below_hard_fp_p - = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); - frame.bytes_below_hard_fp = offset; -+ -+ auto allocate_gpr_slot = [&](unsigned int regno) -+ { -+ frame.reg_offset[regno] = offset; -+ if (frame.wb_push_candidate1 == INVALID_REGNUM) -+ frame.wb_push_candidate1 = regno; -+ else if (frame.wb_push_candidate2 == INVALID_REGNUM) -+ frame.wb_push_candidate2 = regno; -+ offset += UNITS_PER_WORD; -+ }; -+ - if (frame.emit_frame_chain) - { - /* FP and LR are placed in the linkage record. */ -- frame.reg_offset[R29_REGNUM] = offset; -- frame.wb_push_candidate1 = R29_REGNUM; -- frame.reg_offset[R30_REGNUM] = offset + UNITS_PER_WORD; -- frame.wb_push_candidate2 = R30_REGNUM; -- offset += 2 * UNITS_PER_WORD; -+ allocate_gpr_slot (R29_REGNUM); -+ allocate_gpr_slot (R30_REGNUM); - } -+ else if (flag_stack_clash_protection -+ && known_eq (frame.reg_offset[R30_REGNUM], SLOT_REQUIRED)) -+ /* Put the LR save slot first, since it makes a good choice of probe -+ for stack clash purposes. The idea is that the link register usually -+ has to be saved before a call anyway, and so we lose little by -+ stopping it from being individually shrink-wrapped. */ -+ allocate_gpr_slot (R30_REGNUM); - - for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) -- { -- frame.reg_offset[regno] = offset; -- if (frame.wb_push_candidate1 == INVALID_REGNUM) -- frame.wb_push_candidate1 = regno; -- else if (frame.wb_push_candidate2 == INVALID_REGNUM) -- frame.wb_push_candidate2 = regno; -- offset += UNITS_PER_WORD; -- } -+ allocate_gpr_slot (regno); - - poly_int64 max_int_offset = offset; - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -@@ -8631,10 +8639,13 @@ aarch64_layout_frame (void) - max_push_offset to 0, because no registers are popped at this time, - so callee_adjust cannot be adjusted. */ - HOST_WIDE_INT max_push_offset = 0; -- if (frame.wb_pop_candidate2 != INVALID_REGNUM) -- max_push_offset = 512; -- else if (frame.wb_pop_candidate1 != INVALID_REGNUM) -- max_push_offset = 256; -+ if (frame.wb_pop_candidate1 != INVALID_REGNUM) -+ { -+ if (frame.wb_pop_candidate2 != INVALID_REGNUM) -+ max_push_offset = 512; -+ else -+ max_push_offset = 256; -+ } - - HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; - HOST_WIDE_INT const_saved_regs_size; -@@ -9654,29 +9665,6 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - = (final_adjustment_p - ? guard_used_by_caller + byte_sp_alignment - : guard_size - guard_used_by_caller); -- /* When doing the final adjustment for the outgoing arguments, take into -- account any unprobed space there is above the current SP. There are -- two cases: -- -- - When saving SVE registers below the hard frame pointer, we force -- the lowest save to take place in the prologue before doing the final -- adjustment (i.e. we don't allow the save to be shrink-wrapped). -- This acts as a probe at SP, so there is no unprobed space. -- -- - When there are no SVE register saves, we use the store of the link -- register as a probe. We can't assume that LR was saved at position 0 -- though, so treat any space below it as unprobed. */ -- if (final_adjustment_p -- && known_eq (frame.below_hard_fp_saved_regs_size, 0)) -- { -- poly_int64 lr_offset = (frame.reg_offset[LR_REGNUM] -- - frame.bytes_below_saved_regs); -- if (known_ge (lr_offset, 0)) -- min_probe_threshold -= lr_offset.to_constant (); -- else -- gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); -- } -- - poly_int64 frame_size = frame.frame_size; - - /* We should always have a positive probe threshold. */ -@@ -9856,8 +9844,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - if (final_adjustment_p && rounded_size != 0) - min_probe_threshold = 0; - /* If doing a small final adjustment, we always probe at offset 0. -- This is done to avoid issues when LR is not at position 0 or when -- the final adjustment is smaller than the probing offset. */ -+ This is done to avoid issues when the final adjustment is smaller -+ than the probing offset. */ - else if (final_adjustment_p && rounded_size == 0) - residual_probe_offset = 0; - -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -new file mode 100644 -index 000000000000..82447d20fff5 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -@@ -0,0 +1,100 @@ -+/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void f(int, ...); -+void g(); -+ -+/* -+** test1: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #4064 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+** str x26, \[sp, #?4128\] -+** ... -+*/ -+int test1(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test2: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1040 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test2(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test3: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1024 -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test3(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -new file mode 100644 -index 000000000000..73ac3e4e4eb0 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -@@ -0,0 +1,100 @@ -+/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void f(int, ...); -+void g(); -+ -+/* -+** test1: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #4064 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+** str x26, \[sp, #?4128\] -+** ... -+*/ -+int test1(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test2: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1040 -+** str xzr, \[sp\] -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test2(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x); -+ } -+ g(); -+ return 1; -+} -+ -+/* -+** test3: -+** ... -+** str x30, \[sp\] -+** sub sp, sp, #1024 -+** cbnz w0, .* -+** bl g -+** ... -+*/ -+int test3(int z) { -+ __uint128_t x = 0; -+ int y[0x400]; -+ if (z) -+ { -+ asm volatile ("" ::: -+ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); -+ f(0, 0, 0, 0, 0, 0, 0, &y, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, -+ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); -+ } -+ g(); -+ return 1; -+} -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c -new file mode 100644 -index 000000000000..690aae8dfd5b ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c -@@ -0,0 +1,3 @@ -+/* { dg-options "-O2 -fstack-protector-all -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */ -+ -+#include "stack-check-prologue-19.c" --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0029-aarch64-Simplify-probe-of-final-frame-allocation.patch b/packages/gcc/13.2.0/0029-aarch64-Simplify-probe-of-final-frame-allocation.patch deleted file mode 100644 index 5e031466..00000000 --- a/packages/gcc/13.2.0/0029-aarch64-Simplify-probe-of-final-frame-allocation.patch +++ /dev/null @@ -1,123 +0,0 @@ -From eea1759073e09dd1aefbc9a881601ab1eebfdd18 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:19 +0100 -Subject: [PATCH 29/32] aarch64: Simplify probe of final frame allocation - -Previous patches ensured that the final frame allocation only needs -a probe when the size is strictly greater than 1KiB. It's therefore -safe to use the normal 1024 probe offset in all cases. - -The main motivation for doing this is to simplify the code and -remove the number of special cases. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): - Always probe the residual allocation at offset 1024, asserting - that that is in range. - -gcc/testsuite/ - * gcc.target/aarch64/stack-check-prologue-17.c: Expect the probe - to be at offset 1024 rather than offset 0. - * gcc.target/aarch64/stack-check-prologue-18.c: Likewise. - * gcc.target/aarch64/stack-check-prologue-19.c: Likewise. ---- - gcc/config/aarch64/aarch64.cc | 12 ++++-------- - .../gcc.target/aarch64/stack-check-prologue-17.c | 2 +- - .../gcc.target/aarch64/stack-check-prologue-18.c | 4 ++-- - .../gcc.target/aarch64/stack-check-prologue-19.c | 4 ++-- - 4 files changed, 9 insertions(+), 13 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index a765f92329d3..37809a306f79 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -9838,16 +9838,12 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - are still safe. */ - if (residual) - { -- HOST_WIDE_INT residual_probe_offset = guard_used_by_caller; -+ gcc_assert (guard_used_by_caller + byte_sp_alignment <= size); -+ - /* If we're doing final adjustments, and we've done any full page - allocations then any residual needs to be probed. */ - if (final_adjustment_p && rounded_size != 0) - min_probe_threshold = 0; -- /* If doing a small final adjustment, we always probe at offset 0. -- This is done to avoid issues when the final adjustment is smaller -- than the probing offset. */ -- else if (final_adjustment_p && rounded_size == 0) -- residual_probe_offset = 0; - - aarch64_sub_sp (temp1, temp2, residual, frame_related_p); - if (residual >= min_probe_threshold) -@@ -9858,8 +9854,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, - HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required." - "\n", residual); - -- emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, -- residual_probe_offset)); -+ emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, -+ guard_used_by_caller)); - emit_insn (gen_blockage ()); - } - } -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -index 0d8a25d73a24..f0ec1389771d 100644 ---- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c -@@ -33,7 +33,7 @@ int test1(int z) { - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #1040 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -index 82447d20fff5..6383bec5ebcd 100644 ---- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c -@@ -9,7 +9,7 @@ void g(); - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #4064 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -@@ -50,7 +50,7 @@ int test1(int z) { - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #1040 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -index 73ac3e4e4eb0..562039b5e9b8 100644 ---- a/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c -@@ -9,7 +9,7 @@ void g(); - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #4064 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... -@@ -50,7 +50,7 @@ int test1(int z) { - ** ... - ** str x30, \[sp\] - ** sub sp, sp, #1040 --** str xzr, \[sp\] -+** str xzr, \[sp, #?1024\] - ** cbnz w0, .* - ** bl g - ** ... --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0030-aarch64-Explicitly-record-probe-registers-in-frame-i.patch b/packages/gcc/13.2.0/0030-aarch64-Explicitly-record-probe-registers-in-frame-i.patch deleted file mode 100644 index 8e3ae4b7..00000000 --- a/packages/gcc/13.2.0/0030-aarch64-Explicitly-record-probe-registers-in-frame-i.patch +++ /dev/null @@ -1,278 +0,0 @@ -From 96d85187c3b9c9a7efc2fd698c3d452e80d8aa47 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:20 +0100 -Subject: [PATCH 30/32] aarch64: Explicitly record probe registers in frame - info - -The stack frame is currently divided into three areas: - -A: the area above the hard frame pointer -B: the SVE saves below the hard frame pointer -C: the outgoing arguments - -If the stack frame is allocated in one chunk, the allocation needs a -probe if the frame size is >= guard_size - 1KiB. In addition, if the -function is not a leaf function, it must probe an address no more than -1KiB above the outgoing SP. We ensured the second condition by - -(1) using single-chunk allocations for non-leaf functions only if - the link register save slot is within 512 bytes of the bottom - of the frame; and - -(2) using the link register save as a probe (meaning, for instance, - that it can't be individually shrink wrapped) - -If instead the stack is allocated in multiple chunks, then: - -* an allocation involving only the outgoing arguments (C above) requires - a probe if the allocation size is > 1KiB - -* any other allocation requires a probe if the allocation size - is >= guard_size - 1KiB - -* second and subsequent allocations require the previous allocation - to probe at the bottom of the allocated area, regardless of the size - of that previous allocation - -The final point means that, unlike for single allocations, -it can be necessary to have both a non-SVE register probe and -an SVE register probe. For example: - -* allocate A, probe using a non-SVE register save -* allocate B, probe using an SVE register save -* allocate C - -The non-SVE register used in this case was again the link register. -It was previously used even if the link register save slot was some -bytes above the bottom of the non-SVE register saves, but an earlier -patch avoided that by putting the link register save slot first. - -As a belt-and-braces fix, this patch explicitly records which -probe registers we're using and allows the non-SVE probe to be -whichever register comes first (as for SVE). - -The patch also avoids unnecessary probes in sve/pcs/stack_clash_3.c. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe) - (aarch64_frame::hard_fp_save_and_probe): New fields. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them. - Rather than asserting that a leaf function saves LR, instead assert - that a leaf function saves something. - (aarch64_get_separate_components): Prevent the chosen probe - registers from being individually shrink-wrapped. - (aarch64_allocate_and_probe_stack_space): Remove workaround for - probe registers that aren't at the bottom of the previous allocation. - -gcc/testsuite/ - * gcc.target/aarch64/sve/pcs/stack_clash_3.c: Avoid redundant probes. ---- - gcc/config/aarch64/aarch64.cc | 68 +++++++++++++++---- - gcc/config/aarch64/aarch64.h | 8 +++ - .../aarch64/sve/pcs/stack_clash_3.c | 6 +- - 3 files changed, 64 insertions(+), 18 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 37809a306f79..6c59c39a639d 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8471,15 +8471,11 @@ aarch64_layout_frame (void) - && !crtl->abi->clobbers_full_reg_p (regno)) - frame.reg_offset[regno] = SLOT_REQUIRED; - -- /* With stack-clash, LR must be saved in non-leaf functions. The saving of -- LR counts as an implicit probe which allows us to maintain the invariant -- described in the comment at expand_prologue. */ -- gcc_assert (crtl->is_leaf -- || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); - - poly_int64 offset = crtl->outgoing_args_size; - gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); - frame.bytes_below_saved_regs = offset; -+ frame.sve_save_and_probe = INVALID_REGNUM; - - /* Now assign stack slots for the registers. Start with the predicate - registers, since predicate LDR and STR have a relatively small -@@ -8487,6 +8483,8 @@ aarch64_layout_frame (void) - for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { -+ if (frame.sve_save_and_probe == INVALID_REGNUM) -+ frame.sve_save_and_probe = regno; - frame.reg_offset[regno] = offset; - offset += BYTES_PER_SVE_PRED; - } -@@ -8524,6 +8522,8 @@ aarch64_layout_frame (void) - for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { -+ if (frame.sve_save_and_probe == INVALID_REGNUM) -+ frame.sve_save_and_probe = regno; - frame.reg_offset[regno] = offset; - offset += vector_save_size; - } -@@ -8533,10 +8533,18 @@ aarch64_layout_frame (void) - frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; - bool saves_below_hard_fp_p - = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); -+ gcc_assert (!saves_below_hard_fp_p -+ || (frame.sve_save_and_probe != INVALID_REGNUM -+ && known_eq (frame.reg_offset[frame.sve_save_and_probe], -+ frame.bytes_below_saved_regs))); -+ - frame.bytes_below_hard_fp = offset; -+ frame.hard_fp_save_and_probe = INVALID_REGNUM; - - auto allocate_gpr_slot = [&](unsigned int regno) - { -+ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) -+ frame.hard_fp_save_and_probe = regno; - frame.reg_offset[regno] = offset; - if (frame.wb_push_candidate1 == INVALID_REGNUM) - frame.wb_push_candidate1 = regno; -@@ -8570,6 +8578,8 @@ aarch64_layout_frame (void) - for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) - if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) - { -+ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) -+ frame.hard_fp_save_and_probe = regno; - /* If there is an alignment gap between integer and fp callee-saves, - allocate the last fp register to it if possible. */ - if (regno == last_fp_reg -@@ -8593,6 +8603,17 @@ aarch64_layout_frame (void) - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - - frame.saved_regs_size = offset - frame.bytes_below_saved_regs; -+ gcc_assert (known_eq (frame.saved_regs_size, -+ frame.below_hard_fp_saved_regs_size) -+ || (frame.hard_fp_save_and_probe != INVALID_REGNUM -+ && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], -+ frame.bytes_below_hard_fp))); -+ -+ /* With stack-clash, a register must be saved in non-leaf functions. -+ The saving of the bottommost register counts as an implicit probe, -+ which allows us to maintain the invariant described in the comment -+ at expand_prologue. */ -+ gcc_assert (crtl->is_leaf || maybe_ne (frame.saved_regs_size, 0)); - - offset += get_frame_size (); - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -@@ -8723,6 +8744,25 @@ aarch64_layout_frame (void) - frame.final_adjust = frame.bytes_below_saved_regs; - } - -+ /* The frame is allocated in pieces, with each non-final piece -+ including a register save at offset 0 that acts as a probe for -+ the following piece. In addition, the save of the bottommost register -+ acts as a probe for callees and allocas. Roll back any probes that -+ aren't needed. -+ -+ A probe isn't needed if it is associated with the final allocation -+ (including callees and allocas) that happens before the epilogue is -+ executed. */ -+ if (crtl->is_leaf -+ && !cfun->calls_alloca -+ && known_eq (frame.final_adjust, 0)) -+ { -+ if (maybe_ne (frame.sve_callee_adjust, 0)) -+ frame.sve_save_and_probe = INVALID_REGNUM; -+ else -+ frame.hard_fp_save_and_probe = INVALID_REGNUM; -+ } -+ - /* Make sure the individual adjustments add up to the full frame size. */ - gcc_assert (known_eq (frame.initial_adjust - + frame.callee_adjust -@@ -9354,13 +9394,6 @@ aarch64_get_separate_components (void) - - poly_int64 offset = frame.reg_offset[regno]; - -- /* If the register is saved in the first SVE save slot, we use -- it as a stack probe for -fstack-clash-protection. */ -- if (flag_stack_clash_protection -- && maybe_ne (frame.below_hard_fp_saved_regs_size, 0) -- && known_eq (offset, frame.bytes_below_saved_regs)) -- continue; -- - /* Get the offset relative to the register we'll use. */ - if (frame_pointer_needed) - offset -= frame.bytes_below_hard_fp; -@@ -9395,6 +9428,13 @@ aarch64_get_separate_components (void) - - bitmap_clear_bit (components, LR_REGNUM); - bitmap_clear_bit (components, SP_REGNUM); -+ if (flag_stack_clash_protection) -+ { -+ if (frame.sve_save_and_probe != INVALID_REGNUM) -+ bitmap_clear_bit (components, frame.sve_save_and_probe); -+ if (frame.hard_fp_save_and_probe != INVALID_REGNUM) -+ bitmap_clear_bit (components, frame.hard_fp_save_and_probe); -+ } - - return components; - } -@@ -9931,8 +9971,8 @@ aarch64_epilogue_uses (int regno) - When probing is needed, we emit a probe at the start of the prologue - and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter. - -- We have to track how much space has been allocated and the only stores -- to the stack we track as implicit probes are the FP/LR stores. -+ We can also use register saves as probes. These are stored in -+ sve_save_and_probe and hard_fp_save_and_probe. - - For outgoing arguments we probe if the size is larger than 1KB, such that - the ABI specified buffer is maintained for the next callee. -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index c8becb098c88..fbfb73545bae 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -863,6 +863,14 @@ struct GTY (()) aarch64_frame - This is the register they should use. */ - unsigned spare_pred_reg; - -+ /* An SVE register that is saved below the hard frame pointer and that acts -+ as a probe for later allocations, or INVALID_REGNUM if none. */ -+ unsigned sve_save_and_probe; -+ -+ /* A register that is saved at the hard frame pointer and that acts -+ as a probe for later allocations, or INVALID_REGNUM if none. */ -+ unsigned hard_fp_save_and_probe; -+ - bool laid_out; - - /* True if shadow call stack should be enabled for the current function. */ -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c b/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c -index 3e01ec36c3a4..3530a0d504ba 100644 ---- a/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c -+++ b/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c -@@ -11,11 +11,10 @@ - ** mov x11, sp - ** ... - ** sub sp, sp, x13 --** str p4, \[sp\] - ** cbz w0, [^\n]* -+** str p4, \[sp\] - ** ... - ** ptrue p0\.b, all --** ldr p4, \[sp\] - ** addvl sp, sp, #1 - ** ldr x24, \[sp\], 32 - ** ret -@@ -39,13 +38,12 @@ test_1 (int n) - ** mov x11, sp - ** ... - ** sub sp, sp, x13 --** str p4, \[sp\] - ** cbz w0, [^\n]* -+** str p4, \[sp\] - ** str p5, \[sp, #1, mul vl\] - ** str p6, \[sp, #2, mul vl\] - ** ... - ** ptrue p0\.b, all --** ldr p4, \[sp\] - ** addvl sp, sp, #1 - ** ldr x24, \[sp\], 32 - ** ret --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0031-aarch64-Remove-below_hard_fp_saved_regs_size.patch b/packages/gcc/13.2.0/0031-aarch64-Remove-below_hard_fp_saved_regs_size.patch deleted file mode 100644 index c9bc9153..00000000 --- a/packages/gcc/13.2.0/0031-aarch64-Remove-below_hard_fp_saved_regs_size.patch +++ /dev/null @@ -1,157 +0,0 @@ -From 56df065080950bb30dda9c260f71be54269bdda5 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:20 +0100 -Subject: [PATCH 31/32] aarch64: Remove below_hard_fp_saved_regs_size - -After previous patches, it's no longer necessary to store -saved_regs_size and below_hard_fp_saved_regs_size in the frame info. -All measurements instead use the top or bottom of the frame as -reference points. - -gcc/ - * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size) - (aarch64_frame::below_hard_fp_saved_regs_size): Delete. - * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly. ---- - gcc/config/aarch64/aarch64.cc | 45 ++++++++++++++++------------------- - gcc/config/aarch64/aarch64.h | 7 ------ - 2 files changed, 21 insertions(+), 31 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 6c59c39a639d..b95e805a8cc2 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8530,9 +8530,8 @@ aarch64_layout_frame (void) - - /* OFFSET is now the offset of the hard frame pointer from the bottom - of the callee save area. */ -- frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; -- bool saves_below_hard_fp_p -- = maybe_ne (frame.below_hard_fp_saved_regs_size, 0); -+ auto below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; -+ bool saves_below_hard_fp_p = maybe_ne (below_hard_fp_saved_regs_size, 0); - gcc_assert (!saves_below_hard_fp_p - || (frame.sve_save_and_probe != INVALID_REGNUM - && known_eq (frame.reg_offset[frame.sve_save_and_probe], -@@ -8602,9 +8601,8 @@ aarch64_layout_frame (void) - - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); - -- frame.saved_regs_size = offset - frame.bytes_below_saved_regs; -- gcc_assert (known_eq (frame.saved_regs_size, -- frame.below_hard_fp_saved_regs_size) -+ auto saved_regs_size = offset - frame.bytes_below_saved_regs; -+ gcc_assert (known_eq (saved_regs_size, below_hard_fp_saved_regs_size) - || (frame.hard_fp_save_and_probe != INVALID_REGNUM - && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], - frame.bytes_below_hard_fp))); -@@ -8613,7 +8611,7 @@ aarch64_layout_frame (void) - The saving of the bottommost register counts as an implicit probe, - which allows us to maintain the invariant described in the comment - at expand_prologue. */ -- gcc_assert (crtl->is_leaf || maybe_ne (frame.saved_regs_size, 0)); -+ gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); - - offset += get_frame_size (); - offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -@@ -8670,7 +8668,7 @@ aarch64_layout_frame (void) - - HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; - HOST_WIDE_INT const_saved_regs_size; -- if (known_eq (frame.saved_regs_size, 0)) -+ if (known_eq (saved_regs_size, 0)) - frame.initial_adjust = frame.frame_size; - else if (frame.frame_size.is_constant (&const_size) - && const_size < max_push_offset -@@ -8683,7 +8681,7 @@ aarch64_layout_frame (void) - frame.callee_adjust = const_size; - } - else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) -- && frame.saved_regs_size.is_constant (&const_saved_regs_size) -+ && saved_regs_size.is_constant (&const_saved_regs_size) - && const_below_saved_regs + const_saved_regs_size < 512 - /* We could handle this case even with data below the saved - registers, provided that that data left us with valid offsets -@@ -8702,8 +8700,7 @@ aarch64_layout_frame (void) - frame.initial_adjust = frame.frame_size; - } - else if (saves_below_hard_fp_p -- && known_eq (frame.saved_regs_size, -- frame.below_hard_fp_saved_regs_size)) -+ && known_eq (saved_regs_size, below_hard_fp_saved_regs_size)) - { - /* Frame in which all saves are SVE saves: - -@@ -8725,7 +8722,7 @@ aarch64_layout_frame (void) - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ - frame.callee_adjust = const_above_fp; -- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -+ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } - else -@@ -8740,7 +8737,7 @@ aarch64_layout_frame (void) - [save SVE registers relative to SP] - sub sp, sp, bytes_below_saved_regs */ - frame.initial_adjust = frame.bytes_above_hard_fp; -- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; -+ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; - frame.final_adjust = frame.bytes_below_saved_regs; - } - -@@ -9936,17 +9933,17 @@ aarch64_epilogue_uses (int regno) - | local variables | <-- frame_pointer_rtx - | | - +-------------------------------+ -- | padding | \ -- +-------------------------------+ | -- | callee-saved registers | | frame.saved_regs_size -- +-------------------------------+ | -- | LR' | | -- +-------------------------------+ | -- | FP' | | -- +-------------------------------+ |<- hard_frame_pointer_rtx (aligned) -- | SVE vector registers | | \ -- +-------------------------------+ | | below_hard_fp_saved_regs_size -- | SVE predicate registers | / / -+ | padding | -+ +-------------------------------+ -+ | callee-saved registers | -+ +-------------------------------+ -+ | LR' | -+ +-------------------------------+ -+ | FP' | -+ +-------------------------------+ <-- hard_frame_pointer_rtx (aligned) -+ | SVE vector registers | -+ +-------------------------------+ -+ | SVE predicate registers | - +-------------------------------+ - | dynamic allocation | - +-------------------------------+ -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index fbfb73545bae..cfeaf4657abb 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -777,18 +777,11 @@ struct GTY (()) aarch64_frame - STACK_BOUNDARY. */ - HOST_WIDE_INT saved_varargs_size; - -- /* The size of the callee-save registers with a slot in REG_OFFSET. */ -- poly_int64 saved_regs_size; -- - /* The number of bytes between the bottom of the static frame (the bottom - of the outgoing arguments) and the bottom of the register save area. - This value is always a multiple of STACK_BOUNDARY. */ - poly_int64 bytes_below_saved_regs; - -- /* The size of the callee-save registers with a slot in REG_OFFSET that -- are saved below the hard frame pointer. */ -- poly_int64 below_hard_fp_saved_regs_size; -- - /* The number of bytes between the bottom of the static frame (the bottom - of the outgoing arguments) and the hard frame pointer. This value is - always a multiple of STACK_BOUNDARY. */ --- -2.42.0 - diff --git a/packages/gcc/13.2.0/0032-aarch64-Make-stack-smash-canary-protect-saved-regist.patch b/packages/gcc/13.2.0/0032-aarch64-Make-stack-smash-canary-protect-saved-regist.patch deleted file mode 100644 index 774109d4..00000000 --- a/packages/gcc/13.2.0/0032-aarch64-Make-stack-smash-canary-protect-saved-regist.patch +++ /dev/null @@ -1,299 +0,0 @@ -From b96e66fd4ef3e36983969fb8cdd1956f551a074b Mon Sep 17 00:00:00 2001 -From: Richard Sandiford <richard.sandiford@arm.com> -Date: Tue, 12 Sep 2023 16:07:21 +0100 -Subject: [PATCH 32/32] aarch64: Make stack smash canary protect saved - registers - -AArch64 normally puts the saved registers near the bottom of the frame, -immediately above any dynamic allocations. But this means that a -stack-smash attack on those dynamic allocations could overwrite the -saved registers without needing to reach as far as the stack smash -canary. - -The same thing could also happen for variable-sized arguments that are -passed by value, since those are allocated before a call and popped on -return. - -This patch avoids that by putting the locals (and thus the canary) below -the saved registers when stack smash protection is active. - -The patch fixes CVE-2023-4039. - -gcc/ - * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p): - New function. - (aarch64_layout_frame): Use it to decide whether locals should - go above or below the saved registers. - (aarch64_expand_prologue): Update stack layout comment. - Emit a stack tie after the final adjustment. - -gcc/testsuite/ - * gcc.target/aarch64/stack-protector-8.c: New test. - * gcc.target/aarch64/stack-protector-9.c: Likewise. ---- - gcc/config/aarch64/aarch64.cc | 46 +++++++-- - .../gcc.target/aarch64/stack-protector-8.c | 95 +++++++++++++++++++ - .../gcc.target/aarch64/stack-protector-9.c | 33 +++++++ - 3 files changed, 168 insertions(+), 6 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-8.c - create mode 100644 gcc/testsuite/gcc.target/aarch64/stack-protector-9.c - -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index b95e805a8cc2..389c0e293536 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -8394,6 +8394,20 @@ aarch64_needs_frame_chain (void) - return aarch64_use_frame_pointer; - } - -+/* Return true if the current function should save registers above -+ the locals area, rather than below it. */ -+ -+static bool -+aarch64_save_regs_above_locals_p () -+{ -+ /* When using stack smash protection, make sure that the canary slot -+ comes between the locals and the saved registers. Otherwise, -+ it would be possible for a carefully sized smash attack to change -+ the saved registers (particularly LR and FP) without reaching the -+ canary. */ -+ return crtl->stack_protect_guard; -+} -+ - /* Mark the registers that need to be saved by the callee and calculate - the size of the callee-saved registers area and frame record (both FP - and LR may be omitted). */ -@@ -8405,6 +8419,7 @@ aarch64_layout_frame (void) - poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); - bool frame_related_fp_reg_p = false; - aarch64_frame &frame = cfun->machine->frame; -+ poly_int64 top_of_locals = -1; - - frame.emit_frame_chain = aarch64_needs_frame_chain (); - -@@ -8471,9 +8486,16 @@ aarch64_layout_frame (void) - && !crtl->abi->clobbers_full_reg_p (regno)) - frame.reg_offset[regno] = SLOT_REQUIRED; - -+ bool regs_at_top_p = aarch64_save_regs_above_locals_p (); - - poly_int64 offset = crtl->outgoing_args_size; - gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); -+ if (regs_at_top_p) -+ { -+ offset += get_frame_size (); -+ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -+ top_of_locals = offset; -+ } - frame.bytes_below_saved_regs = offset; - frame.sve_save_and_probe = INVALID_REGNUM; - -@@ -8613,15 +8635,18 @@ aarch64_layout_frame (void) - at expand_prologue. */ - gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); - -- offset += get_frame_size (); -- offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -- auto top_of_locals = offset; -- -+ if (!regs_at_top_p) -+ { -+ offset += get_frame_size (); -+ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); -+ top_of_locals = offset; -+ } - offset += frame.saved_varargs_size; - gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); - frame.frame_size = offset; - - frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; -+ gcc_assert (known_ge (top_of_locals, 0)); - frame.bytes_above_locals = frame.frame_size - top_of_locals; - - frame.initial_adjust = 0; -@@ -9930,10 +9955,10 @@ aarch64_epilogue_uses (int regno) - | for register varargs | - | | - +-------------------------------+ -- | local variables | <-- frame_pointer_rtx -+ | local variables (1) | <-- frame_pointer_rtx - | | - +-------------------------------+ -- | padding | -+ | padding (1) | - +-------------------------------+ - | callee-saved registers | - +-------------------------------+ -@@ -9945,6 +9970,10 @@ aarch64_epilogue_uses (int regno) - +-------------------------------+ - | SVE predicate registers | - +-------------------------------+ -+ | local variables (2) | -+ +-------------------------------+ -+ | padding (2) | -+ +-------------------------------+ - | dynamic allocation | - +-------------------------------+ - | padding | -@@ -9954,6 +9983,9 @@ aarch64_epilogue_uses (int regno) - +-------------------------------+ - | | <-- stack_pointer_rtx (aligned) - -+ The regions marked (1) and (2) are mutually exclusive. (2) is used -+ when aarch64_save_regs_above_locals_p is true. -+ - Dynamic stack allocations via alloca() decrease stack_pointer_rtx - but leave frame_pointer_rtx and hard_frame_pointer_rtx - unchanged. -@@ -10149,6 +10181,8 @@ aarch64_expand_prologue (void) - gcc_assert (known_eq (bytes_below_sp, final_adjust)); - aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, - !frame_pointer_needed, true); -+ if (emit_frame_chain && maybe_ne (final_adjust, 0)) -+ emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); - } - - /* Return TRUE if we can use a simple_return insn. -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c -new file mode 100644 -index 000000000000..e71d820e3654 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c -@@ -0,0 +1,95 @@ -+/* { dg-options " -O -fstack-protector-strong -mstack-protector-guard=sysreg -mstack-protector-guard-reg=tpidr2_el0 -mstack-protector-guard-offset=16" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+void g(void *); -+__SVBool_t *h(void *); -+ -+/* -+** test1: -+** sub sp, sp, #288 -+** stp x29, x30, \[sp, #?272\] -+** add x29, sp, #?272 -+** mrs (x[0-9]+), tpidr2_el0 -+** ldr (x[0-9]+), \[\1, #?16\] -+** str \2, \[sp, #?264\] -+** mov \2, #?0 -+** add x0, sp, #?8 -+** bl g -+** ... -+** mrs .* -+** ... -+** bne .* -+** ... -+** ldp x29, x30, \[sp, #?272\] -+** add sp, sp, #?288 -+** ret -+** bl __stack_chk_fail -+*/ -+int test1() { -+ int y[0x40]; -+ g(y); -+ return 1; -+} -+ -+/* -+** test2: -+** stp x29, x30, \[sp, #?-16\]! -+** mov x29, sp -+** sub sp, sp, #1040 -+** mrs (x[0-9]+), tpidr2_el0 -+** ldr (x[0-9]+), \[\1, #?16\] -+** str \2, \[sp, #?1032\] -+** mov \2, #?0 -+** add x0, sp, #?8 -+** bl g -+** ... -+** mrs .* -+** ... -+** bne .* -+** ... -+** add sp, sp, #?1040 -+** ldp x29, x30, \[sp\], #?16 -+** ret -+** bl __stack_chk_fail -+*/ -+int test2() { -+ int y[0x100]; -+ g(y); -+ return 1; -+} -+ -+#pragma GCC target "+sve" -+ -+/* -+** test3: -+** stp x29, x30, \[sp, #?-16\]! -+** mov x29, sp -+** addvl sp, sp, #-18 -+** ... -+** str p4, \[sp\] -+** ... -+** sub sp, sp, #272 -+** mrs (x[0-9]+), tpidr2_el0 -+** ldr (x[0-9]+), \[\1, #?16\] -+** str \2, \[sp, #?264\] -+** mov \2, #?0 -+** add x0, sp, #?8 -+** bl h -+** ... -+** mrs .* -+** ... -+** bne .* -+** ... -+** add sp, sp, #?272 -+** ... -+** ldr p4, \[sp\] -+** ... -+** addvl sp, sp, #18 -+** ldp x29, x30, \[sp\], #?16 -+** ret -+** bl __stack_chk_fail -+*/ -+__SVBool_t test3() { -+ int y[0x40]; -+ return *h(y); -+} -diff --git a/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c -new file mode 100644 -index 000000000000..58f322aa480a ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c -@@ -0,0 +1,33 @@ -+/* { dg-options "-O2 -mcpu=neoverse-v1 -fstack-protector-all" } */ -+/* { dg-final { check-function-bodies "**" "" } } */ -+ -+/* -+** main: -+** ... -+** stp x29, x30, \[sp, #?-[0-9]+\]! -+** ... -+** sub sp, sp, #[0-9]+ -+** ... -+** str x[0-9]+, \[x29, #?-8\] -+** ... -+*/ -+int f(const char *); -+void g(void *); -+int main(int argc, char* argv[]) -+{ -+ int a; -+ int b; -+ char c[2+f(argv[1])]; -+ int d[0x100]; -+ char y; -+ -+ y=42; a=4; b=10; -+ c[0] = 'h'; c[1] = '\0'; -+ -+ c[f(argv[2])] = '\0'; -+ -+ __builtin_printf("%d %d\n%s\n", a, b, c); -+ g(d); -+ -+ return 0; -+} --- -2.42.0 - diff --git a/packages/gcc/13.2.0/chksum b/packages/gcc/13.2.0/chksum deleted file mode 100644 index e64334b9..00000000 --- a/packages/gcc/13.2.0/chksum +++ /dev/null @@ -1,8 +0,0 @@ -md5 gcc-13.2.0.tar.xz e0e48554cc6e4f261d55ddee9ab69075 -sha1 gcc-13.2.0.tar.xz 5f95b6d042fb37d45c6cbebfc91decfbc4fb493c -sha256 gcc-13.2.0.tar.xz e275e76442a6067341a27f04c5c6b83d8613144004c0413528863dc6b5c743da -sha512 gcc-13.2.0.tar.xz d99e4826a70db04504467e349e9fbaedaa5870766cda7c5cab50cdebedc4be755ebca5b789e1232a34a20be1a0b60097de9280efe47bdb71c73251e30b0862a2 -md5 gcc-13.2.0.tar.gz aeb5ac806c34d47e725bdd025f34bac4 -sha1 gcc-13.2.0.tar.gz ba0872d7c618549c83bf167743a813c6b34b9530 -sha256 gcc-13.2.0.tar.gz 8cb4be3796651976f94b9356fa08d833524f62420d6292c5033a9a26af315078 -sha512 gcc-13.2.0.tar.gz 41c8c77ac5c3f77de639c2913a8e4ff424d48858c9575fc318861209467828ccb7e6e5fe3618b42bf3d745be8c7ab4b4e50e424155e691816fa99951a2b870b9 diff --git a/packages/gcc/13.2.0/0000-libtool-leave-framework-alone.patch b/packages/gcc/13.4.0/0000-libtool-leave-framework-alone.patch index 1a86e415..1a86e415 100644 --- a/packages/gcc/13.2.0/0000-libtool-leave-framework-alone.patch +++ b/packages/gcc/13.4.0/0000-libtool-leave-framework-alone.patch diff --git a/packages/gcc/13.2.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch b/packages/gcc/13.4.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch index 5f9a07a2..5f9a07a2 100644 --- a/packages/gcc/13.2.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch +++ b/packages/gcc/13.4.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch diff --git a/packages/gcc/13.2.0/0002-arm-softfloat-libgcc.patch b/packages/gcc/13.4.0/0002-arm-softfloat-libgcc.patch index d9800365..d9800365 100644 --- a/packages/gcc/13.2.0/0002-arm-softfloat-libgcc.patch +++ b/packages/gcc/13.4.0/0002-arm-softfloat-libgcc.patch diff --git a/packages/gcc/13.2.0/0003-libgcc-disable-split-stack-nothreads.patch b/packages/gcc/13.4.0/0003-libgcc-disable-split-stack-nothreads.patch index df91a9ff..df91a9ff 100644 --- a/packages/gcc/13.2.0/0003-libgcc-disable-split-stack-nothreads.patch +++ b/packages/gcc/13.4.0/0003-libgcc-disable-split-stack-nothreads.patch diff --git a/packages/gcc/13.4.0/0004-Remove-use-of-include_next-from-c-headers.patch b/packages/gcc/13.4.0/0004-Remove-use-of-include_next-from-c-headers.patch new file mode 100644 index 00000000..e079849a --- /dev/null +++ b/packages/gcc/13.4.0/0004-Remove-use-of-include_next-from-c-headers.patch @@ -0,0 +1,304 @@ +From 6c7efd415ef2fa5d9f2d8bcd5b30e9faf696d5ca Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Sun, 24 Jan 2021 14:20:33 -0800 +Subject: [PATCH] Remove use of include_next from c++ headers + +Using include_next bypasses the default header search path and lets +files later in the include path take priority over earlier files. + +This makes replacing libc impossible as the default libc headers will +occur after the libstdc++ headers, and so be picked up in place of +headers inserted at the begining of the search path or appended to the +end of the search path. + +Using include_next is a hack to work-around broken combinations of +libraries, and is not necessary in a well constructed toolchain. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + libstdc++-v3/include/bits/std_abs.h | 4 ++-- + libstdc++-v3/include/c/cassert | 2 +- + libstdc++-v3/include/c/cctype | 2 +- + libstdc++-v3/include/c/cerrno | 2 +- + libstdc++-v3/include/c/cfloat | 2 +- + libstdc++-v3/include/c/climits | 2 +- + libstdc++-v3/include/c/clocale | 2 +- + libstdc++-v3/include/c/cmath | 2 +- + libstdc++-v3/include/c/csetjmp | 2 +- + libstdc++-v3/include/c/csignal | 2 +- + libstdc++-v3/include/c/cstdarg | 2 +- + libstdc++-v3/include/c/cstddef | 2 +- + libstdc++-v3/include/c/cstdio | 2 +- + libstdc++-v3/include/c/cstdlib | 2 +- + libstdc++-v3/include/c/cstring | 2 +- + libstdc++-v3/include/c/ctime | 2 +- + libstdc++-v3/include/c/cuchar | 2 +- + libstdc++-v3/include/c/cwchar | 2 +- + libstdc++-v3/include/c/cwctype | 2 +- + libstdc++-v3/include/c_global/cmath | 2 +- + libstdc++-v3/include/c_global/cstdlib | 2 +- + 21 files changed, 22 insertions(+), 22 deletions(-) + +diff --git a/libstdc++-v3/include/bits/std_abs.h b/libstdc++-v3/include/bits/std_abs.h +index c70c8e4edcfc..6a0d5307408a 100644 +--- a/libstdc++-v3/include/bits/std_abs.h ++++ b/libstdc++-v3/include/bits/std_abs.h +@@ -35,9 +35,9 @@ + #include <bits/c++config.h> + + #define _GLIBCXX_INCLUDE_NEXT_C_HEADERS +-#include_next <stdlib.h> ++#include <stdlib.h> + #ifdef __CORRECT_ISO_CPP_MATH_H_PROTO +-# include_next <math.h> ++# include <math.h> + #endif + #undef _GLIBCXX_INCLUDE_NEXT_C_HEADERS + +diff --git a/libstdc++-v3/include/c/cassert b/libstdc++-v3/include/c/cassert +index abe013725b24..1df12c0af820 100644 +--- a/libstdc++-v3/include/c/cassert ++++ b/libstdc++-v3/include/c/cassert +@@ -31,4 +31,4 @@ + #pragma GCC system_header + + #include <bits/c++config.h> +-#include_next <assert.h> ++#include <assert.h> +diff --git a/libstdc++-v3/include/c/cctype b/libstdc++-v3/include/c/cctype +index 234008e328d3..3e259fbc75e9 100644 +--- a/libstdc++-v3/include/c/cctype ++++ b/libstdc++-v3/include/c/cctype +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <ctype.h> ++#include <ctype.h> + + #endif +diff --git a/libstdc++-v3/include/c/cerrno b/libstdc++-v3/include/c/cerrno +index 39eb9bbe5d50..e2c2e67356f3 100644 +--- a/libstdc++-v3/include/c/cerrno ++++ b/libstdc++-v3/include/c/cerrno +@@ -41,7 +41,7 @@ + #pragma GCC system_header + + #include <bits/c++config.h> +-#include_next <errno.h> ++#include <errno.h> + + // Adhere to section 17.4.1.2 clause 5 of ISO 14882:1998 + #ifndef errno +diff --git a/libstdc++-v3/include/c/cfloat b/libstdc++-v3/include/c/cfloat +index 6d431e8b73ac..176b66b143c3 100644 +--- a/libstdc++-v3/include/c/cfloat ++++ b/libstdc++-v3/include/c/cfloat +@@ -32,6 +32,6 @@ + #pragma GCC system_header + + #include <bits/c++config.h> +-#include_next <float.h> ++#include <float.h> + + #endif +diff --git a/libstdc++-v3/include/c/climits b/libstdc++-v3/include/c/climits +index f58d3305dbdc..bd18e7a3b046 100644 +--- a/libstdc++-v3/include/c/climits ++++ b/libstdc++-v3/include/c/climits +@@ -32,6 +32,6 @@ + #pragma GCC system_header + + #include <bits/c++config.h> +-#include_next <limits.h> ++#include <limits.h> + + #endif +diff --git a/libstdc++-v3/include/c/clocale b/libstdc++-v3/include/c/clocale +index e498a711b8df..05ce7cec0e72 100644 +--- a/libstdc++-v3/include/c/clocale ++++ b/libstdc++-v3/include/c/clocale +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <locale.h> ++#include <locale.h> + + #endif +diff --git a/libstdc++-v3/include/c/cmath b/libstdc++-v3/include/c/cmath +index 261c5cbafdba..3c536f5a0d56 100644 +--- a/libstdc++-v3/include/c/cmath ++++ b/libstdc++-v3/include/c/cmath +@@ -33,7 +33,7 @@ + + #include <bits/c++config.h> + +-#include_next <math.h> ++#include <math.h> + + // Get rid of those macros defined in <math.h> in lieu of real functions. + #undef abs +diff --git a/libstdc++-v3/include/c/csetjmp b/libstdc++-v3/include/c/csetjmp +index 1fd0c71eb722..2df49096ea23 100644 +--- a/libstdc++-v3/include/c/csetjmp ++++ b/libstdc++-v3/include/c/csetjmp +@@ -31,7 +31,7 @@ + + #pragma GCC system_header + +-#include_next <setjmp.h> ++#include <setjmp.h> + + // Get rid of those macros defined in <setjmp.h> in lieu of real functions. + #undef longjmp +diff --git a/libstdc++-v3/include/c/csignal b/libstdc++-v3/include/c/csignal +index ec8b4b5eef34..f5f04720d2a0 100644 +--- a/libstdc++-v3/include/c/csignal ++++ b/libstdc++-v3/include/c/csignal +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <signal.h> ++#include <signal.h> + + #endif +diff --git a/libstdc++-v3/include/c/cstdarg b/libstdc++-v3/include/c/cstdarg +index 41752d96e552..f69f27e51fdc 100644 +--- a/libstdc++-v3/include/c/cstdarg ++++ b/libstdc++-v3/include/c/cstdarg +@@ -32,6 +32,6 @@ + #pragma GCC system_header + + #undef __need___va_list +-#include_next <stdarg.h> ++#include <stdarg.h> + + #endif +diff --git a/libstdc++-v3/include/c/cstddef b/libstdc++-v3/include/c/cstddef +index c30a34d57d7b..2209bd6b7354 100644 +--- a/libstdc++-v3/include/c/cstddef ++++ b/libstdc++-v3/include/c/cstddef +@@ -35,6 +35,6 @@ + #define __need_ptrdiff_t + #define __need_NULL + #define __need_offsetof +-#include_next <stddef.h> ++#include <stddef.h> + + #endif +diff --git a/libstdc++-v3/include/c/cstdio b/libstdc++-v3/include/c/cstdio +index 28032a2ec9fb..e94a5678bc71 100644 +--- a/libstdc++-v3/include/c/cstdio ++++ b/libstdc++-v3/include/c/cstdio +@@ -31,7 +31,7 @@ + + #pragma GCC system_header + +-#include_next <stdio.h> ++#include <stdio.h> + + // Get rid of those macros defined in <stdio.h> in lieu of real functions. + #undef clearerr +diff --git a/libstdc++-v3/include/c/cstdlib b/libstdc++-v3/include/c/cstdlib +index 473ae22f8840..c8bee71de315 100644 +--- a/libstdc++-v3/include/c/cstdlib ++++ b/libstdc++-v3/include/c/cstdlib +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <stdlib.h> ++#include <stdlib.h> + + #endif +diff --git a/libstdc++-v3/include/c/cstring b/libstdc++-v3/include/c/cstring +index 4edc7d9bfdc7..5e8d79fcf189 100644 +--- a/libstdc++-v3/include/c/cstring ++++ b/libstdc++-v3/include/c/cstring +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <string.h> ++#include <string.h> + + #endif +diff --git a/libstdc++-v3/include/c/ctime b/libstdc++-v3/include/c/ctime +index 2d478fe9beba..58a55bc18adc 100644 +--- a/libstdc++-v3/include/c/ctime ++++ b/libstdc++-v3/include/c/ctime +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <time.h> ++#include <time.h> + + #endif +diff --git a/libstdc++-v3/include/c/cuchar b/libstdc++-v3/include/c/cuchar +index 0ef94430b6f1..a91c7a68ca8a 100644 +--- a/libstdc++-v3/include/c/cuchar ++++ b/libstdc++-v3/include/c/cuchar +@@ -39,7 +39,7 @@ + #include <cwchar> + + #if _GLIBCXX_USE_C11_UCHAR_CXX11 +-# include_next <uchar.h> ++# include <uchar.h> + #endif + + #endif // C++11 +diff --git a/libstdc++-v3/include/c/cwchar b/libstdc++-v3/include/c/cwchar +index 8ccc117792bb..6111ad108a79 100644 +--- a/libstdc++-v3/include/c/cwchar ++++ b/libstdc++-v3/include/c/cwchar +@@ -36,7 +36,7 @@ + #include <ctime> + + #if _GLIBCXX_HAVE_WCHAR_H +-#include_next <wchar.h> ++#include <wchar.h> + #endif + + // Need to do a bit of trickery here with mbstate_t as char_traits +diff --git a/libstdc++-v3/include/c/cwctype b/libstdc++-v3/include/c/cwctype +index 07c02e562b02..63b76873532e 100644 +--- a/libstdc++-v3/include/c/cwctype ++++ b/libstdc++-v3/include/c/cwctype +@@ -34,7 +34,7 @@ + #include <bits/c++config.h> + + #if _GLIBCXX_HAVE_WCTYPE_H +-#include_next <wctype.h> ++#include <wctype.h> + #endif + + #endif +diff --git a/libstdc++-v3/include/c_global/cmath b/libstdc++-v3/include/c_global/cmath +index 992713b70da6..165d87f65f7f 100644 +--- a/libstdc++-v3/include/c_global/cmath ++++ b/libstdc++-v3/include/c_global/cmath +@@ -44,7 +44,7 @@ + #include <bits/cpp_type_traits.h> + #include <ext/type_traits.h> + #define _GLIBCXX_INCLUDE_NEXT_C_HEADERS +-#include_next <math.h> ++#include <math.h> + #undef _GLIBCXX_INCLUDE_NEXT_C_HEADERS + #include <bits/std_abs.h> + +diff --git a/libstdc++-v3/include/c_global/cstdlib b/libstdc++-v3/include/c_global/cstdlib +index aeb961ad69df..a2c661acd243 100644 +--- a/libstdc++-v3/include/c_global/cstdlib ++++ b/libstdc++-v3/include/c_global/cstdlib +@@ -76,7 +76,7 @@ namespace std + // Need to ensure this finds the C library's <stdlib.h> not a libstdc++ + // wrapper that might already be installed later in the include search path. + #define _GLIBCXX_INCLUDE_NEXT_C_HEADERS +-#include_next <stdlib.h> ++#include <stdlib.h> + #undef _GLIBCXX_INCLUDE_NEXT_C_HEADERS + #include <bits/std_abs.h> + diff --git a/packages/gcc/13.4.0/0005-Allow-default-libc-to-be-specified-to-configure.patch b/packages/gcc/13.4.0/0005-Allow-default-libc-to-be-specified-to-configure.patch new file mode 100644 index 00000000..a56f02ad --- /dev/null +++ b/packages/gcc/13.4.0/0005-Allow-default-libc-to-be-specified-to-configure.patch @@ -0,0 +1,138 @@ +From bba1f4101084e296e5bfcc9a2f9e91242928ad10 Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Fri, 2 Sep 2022 23:07:05 -0700 +Subject: [PATCH] Allow default libc to be specified to configure + +The default C library is normally computed based on the target +triplet. However, for embedded systems, it can be useful to leave the +triplet alone while changing which C library is used by default. Other +C libraries may still be available on the system so the compiler and +can be used by specifying suitable include and library paths at build +time. + +If an unknown --with-default-libc= value is provided, emit an error +and stop. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/config.gcc | 48 ++++++++++++++++++++++++++++++++++++++++-------- + gcc/configure.ac | 4 ++++ + 2 files changed, 44 insertions(+), 8 deletions(-) + +diff --git a/gcc/config.gcc b/gcc/config.gcc +index c3b73d05eb72..0672d94535b9 100644 +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -664,6 +664,8 @@ esac + # Common C libraries. + tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4" + ++default_libc="" ++ + # 32-bit x86 processors supported by --with-arch=. Each processor + # MUST be separated by exactly one space. + x86_archs="athlon athlon-4 athlon-fx athlon-mp athlon-tbird \ +@@ -870,16 +872,16 @@ case ${target} in + esac + case $target in + *-*-*android*) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_BIONIC" ++ default_libc=LIBC_BIONIC + ;; + *-*-*uclibc* | *-*-uclinuxfdpiceabi) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC" ++ default_libc=LIBC_UCLIBC + ;; + *-*-*musl*) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_MUSL" ++ default_libc=LIBC_MUSL + ;; + *) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_GLIBC" ++ default_libc=LIBC_GLIBC + ;; + esac + # Assume that glibc or uClibc or Bionic are being used and so __cxa_atexit +@@ -988,7 +990,8 @@ case ${target} in + case ${enable_threads} in + "" | yes | posix) thread_file='posix' ;; + esac +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC SINGLE_LIBC" ++ tm_defines="$tm_defines SINGLE_LIBC" ++ default_libc=LIBC_UCLIBC + ;; + *-*-rdos*) + use_gcc_stdint=wrap +@@ -1653,13 +1656,13 @@ csky-*-*) + + case ${target} in + csky-*-linux-gnu*) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_GLIBC" ++ default_libc=LIBC_GLIBC + # Force .init_array support. The configure script cannot always + # automatically detect that GAS supports it, yet we require it. + gcc_cv_initfini_array=yes + ;; + csky-*-linux-uclibc*) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC" ++ default_libc=LIBC_UCLIBC + default_use_cxa_atexit=no + ;; + *) +@@ -3039,7 +3042,7 @@ powerpc*-wrs-vxworks7r*) + tmake_file="${tmake_file} t-linux rs6000/t-linux64 rs6000/t-fprules rs6000/t-ppccomm" + tmake_file="${tmake_file} rs6000/t-vxworks" + +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_GLIBC" ++ default_libc=LIBC_GLIBC + extra_objs="$extra_objs linux.o rs6000-linux.o" + ;; + powerpc-wrs-vxworks*) +@@ -5880,3 +5883,32 @@ i[34567]86-*-* | x86_64-*-*) + fi + ;; + esac ++ ++case "${with_default_libc}" in ++glibc) ++ default_libc=LIBC_GLIBC ++ ;; ++uclibc) ++ default_libc=LIBC_UCLIBC ++ ;; ++bionic) ++ default_libc=LIBC_BIONIC ++ ;; ++musl) ++ default_libc=LIBC_MUSL ++ ;; ++"") ++ ;; ++*) ++ echo "Unknown libc in --with-default-libc=$with_default_libc" 1>&2 ++ exit 1 ++ ;; ++esac ++ ++case "$default_libc" in ++"") ++ ;; ++*) ++ tm_defines="$tm_defines DEFAULT_LIBC=$default_libc" ++ ;; ++esac +diff --git a/gcc/configure.ac b/gcc/configure.ac +index bf8ff4d63906..b1c2944775d1 100644 +--- a/gcc/configure.ac ++++ b/gcc/configure.ac +@@ -2541,6 +2541,10 @@ if { { test x$host != x$target && test "x$with_sysroot" = x ; } || + fi + AC_SUBST(inhibit_libc) + ++AC_ARG_WITH(default-libc, ++ [AS_HELP_STRING([--with-default-libc], ++ [Use specified default C library])]) ++ + # When building gcc with a cross-compiler, we need to adjust things so + # that the generator programs are still built with the native compiler. + # Also, we cannot run fixincludes. diff --git a/packages/gcc/13.4.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch b/packages/gcc/13.4.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch new file mode 100644 index 00000000..e7813e7b --- /dev/null +++ b/packages/gcc/13.4.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch @@ -0,0 +1,99 @@ +From ba5bf3a67e74c05231d85ee44c757b3a7391f292 Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Fri, 26 Aug 2022 14:30:03 -0700 +Subject: [PATCH] driver: Extend 'getenv' function to allow default value + +Right now, a missing environment variable provided to the 'getenv' +function in a .specs file causes a fatal error. That makes writing a +spec file that uses the GCC_EXEC_PREFIX value difficult as that +variable is only set when the driver has been relocated, but not when +run from the defined location. This makes building a relocatable +toolchain difficult to extend to other ancilary pieces which use specs +files to locate header and library files adjacent to the toolchain. + +This patch adds an optional third argument to the getenv function that +can be used to fall back to the standard installation path when the +driver hasn't set GCC_EXEC_PREFIX in the environment. + +For example, if an alternate C library is installed in +${prefix}/extra, then this change allows the specs file to locate that +relative to the gcc directory, if gcc is located in the original +installation directory (which would leave GCC_EXEC_PREFIX unset), or +if the gcc tree has been moved to a different location (where gcc +would set GCC_EXEC_PREFIX itself): + +*cpp: +-isystem %:getenv(GCC_EXEC_PREFIX ../../extra/include ${prefix}/extra/include) + +I considered changing the behavior of either the %R sequence so that +it had a defined behavior when there was no sysroot defined, or making +the driver always set the GCC_EXEC_PREFIX environment variable and +decided that the approach of adding functionality to getenv where it +was previously invalid would cause the least potential for affecting +existing usage. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/doc/invoke.texi | 18 +++++++++++------- + gcc/gcc.cc | 10 +++++++++- + 2 files changed, 20 insertions(+), 8 deletions(-) + +diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi +index 792ce283bb98..21b89c86acf9 100644 +--- a/gcc/doc/invoke.texi ++++ b/gcc/doc/invoke.texi +@@ -34866,17 +34866,21 @@ The following built-in spec functions are provided: + + @table @code + @item @code{getenv} +-The @code{getenv} spec function takes two arguments: an environment +-variable name and a string. If the environment variable is not +-defined, a fatal error is issued. Otherwise, the return value is the +-value of the environment variable concatenated with the string. For +-example, if @env{TOPDIR} is defined as @file{/path/to/top}, then: ++ ++The @code{getenv} spec function takes two or three arguments: an ++environment variable name, a string and an optional default value. If ++the environment variable is not defined and a default value is ++provided, that is used as the return value; otherwise a fatal error is ++issued. Otherwise, the return value is the value of the environment ++variable concatenated with the string. For example, if @env{TOPDIR} ++is defined as @file{/path/to/top}, then: + + @smallexample +-%:getenv(TOPDIR /include) ++%:getenv(TOPDIR /include /path/to/default/include) + @end smallexample + +-expands to @file{/path/to/top/include}. ++expands to @file{/path/to/top/include}. If @env{TOPDIR} is not ++defined, then this expands to @file{/path/to/default/include}. + + @item @code{if-exists} + The @code{if-exists} spec function takes one argument, an absolute +diff --git a/gcc/gcc.cc b/gcc/gcc.cc +index 16bb07f2cdc5..a94da302b85b 100644 +--- a/gcc/gcc.cc ++++ b/gcc/gcc.cc +@@ -10155,12 +10155,20 @@ getenv_spec_function (int argc, const char **argv) + char *ptr; + size_t len; + +- if (argc != 2) ++ if (argc != 2 && argc != 3) + return NULL; + + varname = argv[0]; + value = env.get (varname); + ++ if (!value && argc == 3) ++ { ++ value = argv[2]; ++ result = XNEWVAR(char, strlen(value) + 1); ++ strcpy(result, value); ++ return result; ++ } ++ + /* If the variable isn't defined and this is allowed, craft our expected + return value. Assume variable names used in specs strings don't contain + any active spec character so don't need escaping. */ diff --git a/packages/gcc/13.4.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch b/packages/gcc/13.4.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch new file mode 100644 index 00000000..fadbdac2 --- /dev/null +++ b/packages/gcc/13.4.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch @@ -0,0 +1,39 @@ +From f4b206863407055fc58956be171e2066e941328f Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Tue, 23 Aug 2022 22:12:06 -0700 +Subject: [PATCH] Add newlib and picolibc as default C library choices + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/config.gcc | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/gcc/config.gcc b/gcc/config.gcc +index 0672d94535b9..b02bd46c231e 100644 +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -662,7 +662,7 @@ case ${target} in + esac + + # Common C libraries. +-tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4" ++tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4 LIBC_NEWLIB=5 LIBC_PICOLIBC=6" + + default_libc="" + +@@ -5897,6 +5897,15 @@ bionic) + musl) + default_libc=LIBC_MUSL + ;; ++newlib) ++ # Newlib configurations don't set the DEFAULT_LIBC variable, so ++ # avoid changing those by allowing --with-default-libc=newlib but ++ # not actually setting the DEFAULT_LIBC variable. ++ default_libc= ++ ;; ++picolibc) ++ default_libc=LIBC_PICOLIBC ++ ;; + "") + ;; + *) diff --git a/packages/gcc/13.4.0/0008-Support-picolibc-targets.patch b/packages/gcc/13.4.0/0008-Support-picolibc-targets.patch new file mode 100644 index 00000000..754bd576 --- /dev/null +++ b/packages/gcc/13.4.0/0008-Support-picolibc-targets.patch @@ -0,0 +1,35 @@ +From 1d1d77a6b0272cc3ee0ec18f0e7adc909d4572db Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Sun, 12 Feb 2023 14:23:32 -0800 +Subject: [PATCH] Support picolibc targets + +Match *-picolibc-* and select picolibc as the default C library, plus continuing to use +the newlib-based logic for other configuration items. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/config.gcc | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/gcc/config.gcc b/gcc/config.gcc +index b02bd46c231e..4f3bcd24edfa 100644 +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -1116,6 +1116,17 @@ case ${target} in + ;; + esac + ;; ++*-picolibc-*) ++ # __cxa_atexit is provided. ++ default_use_cxa_atexit=yes ++ use_gcc_stdint=wrap ++ default_libc=LIBC_PICOLIBC ++ case "${with_newlib}-${with_headers}" in ++ no-no) use_gcc_stdint=provide ;; ++ *) ;; ++ esac ++ ;; ++ + *-*-elf|arc*-*-elf*) + # Assume that newlib is being used and so __cxa_atexit is provided. + default_use_cxa_atexit=yes diff --git a/packages/gcc/13.4.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch b/packages/gcc/13.4.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch new file mode 100644 index 00000000..9cded7c2 --- /dev/null +++ b/packages/gcc/13.4.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch @@ -0,0 +1,65 @@ +From a89f0a31d778fb8c82fd75f6e0578b2702e6f473 Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Sat, 11 Feb 2023 23:07:08 -0800 +Subject: [PATCH] gcc: Allow g++ to work differently from gcc + +Compile gcc.cc with -DIN_GPP defined when building g++ so that the +code can respond appropriately for the default target language. This +allows the driver to customize the specs used, selecting different +linker scripts, adjusting the use of crtbegin.o/crtend.o etc. + +By default, this change has no effect; targets need to explicitly +check for IN_GPP to have alternate behavior. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/cp/Make-lang.in | 7 ++++++- + gcc/gpp.cc | 21 +++++++++++++++++++++ + 2 files changed, 27 insertions(+), 1 deletion(-) + create mode 100644 gcc/gpp.cc + +diff --git a/gcc/cp/Make-lang.in b/gcc/cp/Make-lang.in +index 4ee26fad93d6..e707fe512013 100644 +--- a/gcc/cp/Make-lang.in ++++ b/gcc/cp/Make-lang.in +@@ -77,7 +77,12 @@ CFLAGS-cp/module.o += -DMODULE_VERSION='$(shell cat s-cp-module-version)' + endif + + # Create the compiler driver for g++. +-GXX_OBJS = $(GCC_OBJS) cp/g++spec.o ++GXX_OBJS = $(GCC_OBJS:gcc.o=gpp.o) cp/g++spec.o ++ ++CFLAGS-gpp.o = $(CFLAGS-gcc.o) ++gpp.o: $(BASEVER) ++gpp.o: gcc.o ++ + xg++$(exeext): $(GXX_OBJS) $(EXTRA_GCC_OBJS) libcommon-target.a $(LIBDEPS) + +$(LINKER) $(ALL_LINKERFLAGS) $(LDFLAGS) -o $@ \ + $(GXX_OBJS) $(EXTRA_GCC_OBJS) libcommon-target.a \ +diff --git a/gcc/gpp.cc b/gcc/gpp.cc +new file mode 100644 +index 000000000000..3cd7b45e8086 +--- /dev/null ++++ b/gcc/gpp.cc +@@ -0,0 +1,21 @@ ++/* Compiler driver program that can handle many languages. ++ Copyright (C) 1987-2022 Free Software Foundation, Inc. ++ ++This file is part of GCC. ++ ++GCC is free software; you can redistribute it and/or modify it under ++the terms of the GNU General Public License as published by the Free ++Software Foundation; either version 3, or (at your option) any later ++version. ++ ++GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++WARRANTY; without even the implied warranty of MERCHANTABILITY or ++FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++for more details. ++ ++You should have received a copy of the GNU General Public License ++along with GCC; see the file COPYING3. If not see ++<http://www.gnu.org/licenses/>. */ ++ ++#define IN_GPP ++#include "gcc.cc" diff --git a/packages/gcc/13.2.0/0010-RISC-V-fix-build-issue-with-gcc-4.9.x.patch b/packages/gcc/13.4.0/0010-RISC-V-fix-build-issue-with-gcc-4.9.x.patch index f6d9e0bc..86d86b14 100644 --- a/packages/gcc/13.2.0/0010-RISC-V-fix-build-issue-with-gcc-4.9.x.patch +++ b/packages/gcc/13.4.0/0010-RISC-V-fix-build-issue-with-gcc-4.9.x.patch @@ -1,4 +1,4 @@ -From 87c347c2897537a6aa391efbfc5ed00c625434fe Mon Sep 17 00:00:00 2001 +From 9d6bdc5cc6f02eebc02bfd5d5da0669b42e1087c Mon Sep 17 00:00:00 2001 From: Romain Naour <romain.naour@gmail.com> Date: Tue, 2 May 2023 14:21:55 +0200 Subject: [PATCH] RISC-V: fix build issue with gcc 4.9.x @@ -22,12 +22,14 @@ gcc/ChangeLog: Signed-off-by: Romain Naour <romain.naour@gmail.com> --- - gcc/config/riscv/genrvv-type-indexer.cc | 4 ++-- + gcc/config/riscv/genrvv-type-indexer.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) +diff --git a/gcc/config/riscv/genrvv-type-indexer.cc b/gcc/config/riscv/genrvv-type-indexer.cc +index e677b55290c6..eebe382d1c34 100644 --- a/gcc/config/riscv/genrvv-type-indexer.cc +++ b/gcc/config/riscv/genrvv-type-indexer.cc -@@ -115,9 +115,9 @@ +@@ -115,9 +115,9 @@ same_ratio_eew_type (unsigned sew, int lmul_log2, unsigned eew, bool unsigned_p, if (sew == eew) elmul_log2 = lmul_log2; else if (sew > eew) diff --git a/packages/gcc/13.2.0/0011-libsanitizer-Remove-crypt-and-crypt_r-interceptors.patch b/packages/gcc/13.4.0/0011-Remove-crypt-and-crypt_r-interceptors.patch index cf5d0f35..4cc71959 100644 --- a/packages/gcc/13.2.0/0011-libsanitizer-Remove-crypt-and-crypt_r-interceptors.patch +++ b/packages/gcc/13.4.0/0011-Remove-crypt-and-crypt_r-interceptors.patch @@ -1,4 +1,4 @@ -From 9b116160a1482c5c0c199f9c21d78a527d11d9ea Mon Sep 17 00:00:00 2001 +From 4fa14369544f73508d97eacfda458f47ab59c595 Mon Sep 17 00:00:00 2001 From: Fangrui Song <i@maskray.me> Date: Fri, 28 Apr 2023 09:59:17 -0700 Subject: [PATCH] Remove crypt and crypt_r interceptors @@ -136,6 +136,3 @@ index 44dd3d9e22d1..29ebb304a9ba 100644 #endif // SANITIZER_LINUX && !SANITIZER_ANDROID struct __sanitizer_iovec { --- -2.41.0 - diff --git a/packages/gcc/13.2.0/0012-libgcc-m68k-Fixes-for-soft-float.patch b/packages/gcc/13.4.0/0012-libgcc-m68k-Fixes-for-soft-float.patch index 005b519d..caa6664a 100644 --- a/packages/gcc/13.2.0/0012-libgcc-m68k-Fixes-for-soft-float.patch +++ b/packages/gcc/13.4.0/0012-libgcc-m68k-Fixes-for-soft-float.patch @@ -1,4 +1,4 @@ -From 3393fcce1e6b18e580b712c0855bba13fb622531 Mon Sep 17 00:00:00 2001 +From 51345476fc2f83c77736fab8e29ff4ac358d0f2e Mon Sep 17 00:00:00 2001 From: Keith Packard <keithp@keithp.com> Date: Tue, 22 Aug 2023 12:28:53 -0700 Subject: [PATCH] libgcc/m68k: Fixes for soft float @@ -23,12 +23,12 @@ Return positive qNaN instead of negative. Signed-off-by: Keith Packard <keithp@keithp.com> --- - libgcc/config/m68k/fpgnulib.c | 162 +++++++++++++++++++++++++++------- - libgcc/config/m68k/lb1sf68.S | 20 +++-- - 2 files changed, 143 insertions(+), 39 deletions(-) + libgcc/config/m68k/fpgnulib.c | 170 +++++++++++++++++++++++++++------- + libgcc/config/m68k/lb1sf68.S | 20 ++-- + 2 files changed, 147 insertions(+), 43 deletions(-) diff --git a/libgcc/config/m68k/fpgnulib.c b/libgcc/config/m68k/fpgnulib.c -index fe41edf26aa..eaa7858493c 100644 +index fe41edf26aa0..eaa7858493c9 100644 --- a/libgcc/config/m68k/fpgnulib.c +++ b/libgcc/config/m68k/fpgnulib.c @@ -54,6 +54,7 @@ @@ -57,18 +57,17 @@ index fe41edf26aa..eaa7858493c 100644 - /* Check for underflow and denormals. */ - if (exp <= 0) + if (exp == EXPDMASK - EXCESSD + EXCESS) -+ { + { +- if (exp < -24) + exp = EXPMASK; + mant = mant >> 1 | (mant & 1) | !!sticky; + } + else - { -- if (exp < -24) ++ { + /* Check for underflow and denormals. */ + if (exp <= 0) { - sticky |= mant; -- mant = 0; + if (exp < -24) + { + sticky |= mant; @@ -80,31 +79,16 @@ index fe41edf26aa..eaa7858493c 100644 + mant >>= 1 - exp; + } + exp = 0; - } -- else ++ } + + /* now round */ + shift = 1; + if ((mant & 1) && (sticky || (mant & 2))) - { -- sticky |= mant & ((1 << (1 - exp)) - 1); -- mant >>= 1 - exp; -- } -- exp = 0; -- } -- -- /* now round */ -- shift = 1; -- if ((mant & 1) && (sticky || (mant & 2))) -- { -- int rounding = exp ? 2 : 1; ++ { + int rounding = exp ? 2 : 1; - -- mant += 1; ++ + mant += 1; - -- /* did the round overflow? */ -- if (mant >= (HIDDEN << rounding)) ++ + /* did the round overflow? */ + if (mant >= (HIDDEN << rounding)) + { @@ -115,13 +99,33 @@ index fe41edf26aa..eaa7858493c 100644 + /* shift down */ + mant >>= shift; + if (exp >= EXPMASK) - { -- exp++; -- shift = rounding; ++ { + exp = EXPMASK; -+ mant = 0; + mant = 0; } +- else +- { +- sticky |= mant & ((1 << (1 - exp)) - 1); +- mant >>= 1 - exp; +- } +- exp = 0; } +- +- /* now round */ +- shift = 1; +- if ((mant & 1) && (sticky || (mant & 2))) +- { +- int rounding = exp ? 2 : 1; +- +- mant += 1; +- +- /* did the round overflow? */ +- if (mant >= (HIDDEN << rounding)) +- { +- exp++; +- shift = rounding; +- } +- } - /* shift down */ - mant >>= shift; @@ -247,7 +251,7 @@ index fe41edf26aa..eaa7858493c 100644 /* The remaining provide crude math support by working in double precision. */ diff --git a/libgcc/config/m68k/lb1sf68.S b/libgcc/config/m68k/lb1sf68.S -index 8ba85c53656..e12888bd7f8 100644 +index 8ba85c53656d..e12888bd7f89 100644 --- a/libgcc/config/m68k/lb1sf68.S +++ b/libgcc/config/m68k/lb1sf68.S @@ -635,7 +635,7 @@ SYM (__modsi3): @@ -343,6 +347,3 @@ index 8ba85c53656..e12888bd7f8 100644 bclr IMM (FLT_MANT_DIG-1),d0 #ifndef __mcoldfire__ lslw IMM (7),d2 --- -2.40.1 - diff --git a/packages/gcc/13.2.0/0013-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch b/packages/gcc/13.4.0/0013-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch index 349f280a..b600262f 100644 --- a/packages/gcc/13.2.0/0013-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch +++ b/packages/gcc/13.4.0/0013-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch @@ -1,4 +1,4 @@ -From d901175d36221fbf79a0eb8305823b88243b829c Mon Sep 17 00:00:00 2001 +From 4931e2e89fd5edb3fb222132519e0ed731d644ef Mon Sep 17 00:00:00 2001 From: Chris Packham <chris.packham@alliedtelesis.co.nz> Date: Thu, 7 Sep 2023 19:26:49 +1200 Subject: [PATCH] libgcc: Exclude UCLIBC from GLIBC thread check @@ -30,6 +30,3 @@ index aebcfdd9f4ca..087a631d308d 100644 __gthrw2(__gthrw_(__pthread_key_create), __pthread_key_create, pthread_key_create) --- -2.42.0 - diff --git a/packages/gcc/13.4.0/0014-LoongArch-Use-lib-instead-of-lib64-as-the-library-se.patch b/packages/gcc/13.4.0/0014-LoongArch-Use-lib-instead-of-lib64-as-the-library-se.patch new file mode 100644 index 00000000..74c785df --- /dev/null +++ b/packages/gcc/13.4.0/0014-LoongArch-Use-lib-instead-of-lib64-as-the-library-se.patch @@ -0,0 +1,77 @@ +From af5628a1c34dfd6e065ee0bad581564744c8c812 Mon Sep 17 00:00:00 2001 +From: Yang Yujie <yangyujie@loongson.cn> +Date: Wed, 6 Mar 2024 09:19:59 +0800 +Subject: [PATCH] LoongArch: Use /lib instead of /lib64 as the library search + path for MUSL. + +gcc/ChangeLog: + + * config.gcc: Add a case for loongarch*-*-linux-musl*. + * config/loongarch/linux.h: Disable the multilib-compatible + treatment for *musl* targets. + * config/loongarch/musl.h: New file. +--- + gcc/config.gcc | 3 +++ + gcc/config/loongarch/linux.h | 4 +++- + gcc/config/loongarch/musl.h | 23 +++++++++++++++++++++++ + 3 files changed, 29 insertions(+), 1 deletion(-) + create mode 100644 gcc/config/loongarch/musl.h + +diff --git a/gcc/config.gcc b/gcc/config.gcc +index 4f3bcd24edfa..ebf9aca7b09f 100644 +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -2493,6 +2493,9 @@ riscv*-*-freebsd*) + + loongarch*-*-linux*) + tm_file="elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h ${tm_file}" ++ case ${target} in ++ *-linux-musl*) tm_file="${tm_file} loongarch/musl.h" ++ esac + tm_file="${tm_file} loongarch/gnu-user.h loongarch/linux.h" + extra_options="${extra_options} linux-android.opt" + tmake_file="${tmake_file} loongarch/t-linux" +diff --git a/gcc/config/loongarch/linux.h b/gcc/config/loongarch/linux.h +index 9059d244190a..f01d6f750616 100644 +--- a/gcc/config/loongarch/linux.h ++++ b/gcc/config/loongarch/linux.h +@@ -21,7 +21,9 @@ along with GCC; see the file COPYING3. If not see + * This ensures that a compiler configured with --disable-multilib + * can work in a multilib environment. */ + +-#if defined(LA_DISABLE_MULTILIB) && defined(LA_DISABLE_MULTIARCH) ++#if !defined(LA_DEFAULT_TARGET_MUSL) \ ++ && defined(LA_DISABLE_MULTILIB) \ ++ && defined(LA_DISABLE_MULTIARCH) + + #if DEFAULT_ABI_BASE == ABI_BASE_LP64D + #define ABI_LIBDIR "lib64" +diff --git a/gcc/config/loongarch/musl.h b/gcc/config/loongarch/musl.h +new file mode 100644 +index 000000000000..fa43bc866064 +--- /dev/null ++++ b/gcc/config/loongarch/musl.h +@@ -0,0 +1,23 @@ ++/* Definitions for MUSL C library support. ++ Copyright (C) 2024 Free Software Foundation, Inc. ++ ++This file is part of GCC. ++ ++GCC is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 3, or (at your option) ++any later version. ++ ++GCC is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU General Public License for more details. ++ ++You should have received a copy of the GNU General Public License ++along with GCC; see the file COPYING3. If not see ++<http://www.gnu.org/licenses/>. */ ++ ++ ++#ifndef LA_DEFAULT_TARGET_MUSL ++#define LA_DEFAULT_TARGET_MUSL ++#endif diff --git a/packages/gcc/13.4.0/chksum b/packages/gcc/13.4.0/chksum new file mode 100644 index 00000000..32b23f25 --- /dev/null +++ b/packages/gcc/13.4.0/chksum @@ -0,0 +1,8 @@ +md5 gcc-13.4.0.tar.xz 260096adee8b1cf3dde6e61c11cccca6 +sha1 gcc-13.4.0.tar.xz 419c4f1a4b58134a34c00afa7327c6848a58050a +sha256 gcc-13.4.0.tar.xz 9c4ce6dbb040568fdc545588ac03c5cbc95a8dbf0c7aa490170843afb59ca8f5 +sha512 gcc-13.4.0.tar.xz 9b4b83ecf51ef355b868608b8d257b2fa435c06d2719cb86657a7c2c2a0828ff4ce04e9bac1055bbcad8ed5b4da524cafaef654785e23a50233d95d89201e35f +md5 gcc-13.4.0.tar.gz b5109687acfc3fc61c891b9a0dfe71b2 +sha1 gcc-13.4.0.tar.gz 36712b3b575715b8dc555113403e2082138ce9d1 +sha256 gcc-13.4.0.tar.gz bf0baf3e570c9c74c17c8201f0196c6924b4bd98c90e69d6b2ac0cd823f33bbc +sha512 gcc-13.4.0.tar.gz c4c1ab3c65690c4d872988113db0c402206fd250110ed3cd6c4df47a5030ce95865869bb3638873f123f75d5983bcb8c8c99a6e7f8978efd9f3cbb66faa9a8fb diff --git a/packages/gcc/13.2.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch b/packages/gcc/13.4.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch index 487a28c3..487a28c3 100644 --- a/packages/gcc/13.2.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch +++ b/packages/gcc/13.4.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch diff --git a/packages/gcc/13.2.0/version.desc b/packages/gcc/13.4.0/version.desc index e69de29b..e69de29b 100644 --- a/packages/gcc/13.2.0/version.desc +++ b/packages/gcc/13.4.0/version.desc diff --git a/packages/gcc/14.3.0/0000-libtool-leave-framework-alone.patch b/packages/gcc/14.3.0/0000-libtool-leave-framework-alone.patch new file mode 100644 index 00000000..a5f6f66b --- /dev/null +++ b/packages/gcc/14.3.0/0000-libtool-leave-framework-alone.patch @@ -0,0 +1,21 @@ +--- + libtool-ldflags | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/libtool-ldflags b/libtool-ldflags +index 5de9e2978d40..0dde24bedfc5 100755 +--- a/libtool-ldflags ++++ b/libtool-ldflags +@@ -36,6 +36,11 @@ prev_arg= + for arg + do + case $arg in ++ -framework) ++ # libtool handles this option. It should not be prefixed with ++ # -Xcompiler, as that would split it from the argument that ++ # follows. ++ ;; + -f*|--*|-static-lib*|-shared-lib*|-B*) + # Libtool does not ascribe any special meaning options + # that begin with -f or with a double-dash. So, it will + diff --git a/packages/gcc/14.3.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch b/packages/gcc/14.3.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch new file mode 100644 index 00000000..181d6332 --- /dev/null +++ b/packages/gcc/14.3.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch @@ -0,0 +1,17 @@ +--- + libcc1/connection.cc | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/libcc1/connection.cc b/libcc1/connection.cc +index 175e7a176b9e..60e37c2ce0c5 100644 +--- a/libcc1/connection.cc ++++ b/libcc1/connection.cc +@@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. If not see + #include <string> + #include <unistd.h> + #include <sys/types.h> ++#include <sys/select.h> + #include <string.h> + #include <errno.h> + #include "marshall.hh" + diff --git a/packages/gcc/14.3.0/0002-0002-arm-softfloat-libgcc.patch.patch b/packages/gcc/14.3.0/0002-0002-arm-softfloat-libgcc.patch.patch new file mode 100644 index 00000000..d2a7dfce --- /dev/null +++ b/packages/gcc/14.3.0/0002-0002-arm-softfloat-libgcc.patch.patch @@ -0,0 +1,43 @@ +From c18ad43db5808bf40b9ceb877df7bcd438b59cdd Mon Sep 17 00:00:00 2001 +From: Chris Packham <chris.packham@alliedtelesis.co.nz> +Date: Sun, 25 May 2025 10:34:00 +1200 +Subject: [PATCH] 0002-arm-softfloat-libgcc.patch + +--- + gcc/config/arm/linux-elf.h | 2 +- + libgcc/config/arm/t-linux | 7 ++++++- + 2 files changed, 7 insertions(+), 2 deletions(-) + +diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h +index ccae8abf6f6c..fcd180dff243 100644 +--- a/gcc/config/arm/linux-elf.h ++++ b/gcc/config/arm/linux-elf.h +@@ -58,7 +58,7 @@ + %{shared:-lc} \ + %{!shared:%{profile:-lc_p}%{!profile:-lc}}" + +-#define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc" ++#define LIBGCC_SPEC "-lgcc" + + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" + +diff --git a/libgcc/config/arm/t-linux b/libgcc/config/arm/t-linux +index 3d520decafbc..e7bc042d4e40 100644 +--- a/libgcc/config/arm/t-linux ++++ b/libgcc/config/arm/t-linux +@@ -1,6 +1,11 @@ + LIB1ASMSRC = arm/lib1funcs.S + LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2 \ +- _ctzsi2 _arm_addsubdf3 _arm_addsubsf3 ++ _ctzsi2 _arm_addsubdf3 _arm_addsubsf3 \ ++ _arm_addsubdf3 _arm_addsubsf3 \ ++ _arm_negdf2 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \ ++ _arm_fixdfsi _arm_fixunsdfsi _arm_truncdfsf2 \ ++ _arm_negsf2 _arm_muldivsf3 _arm_cmpsf2 _arm_unordsf2 \ ++ _arm_fixsfsi _arm_fixunssfsi + + # Just for these, we omit the frame pointer since it makes such a big + # difference. +-- +2.49.0 + diff --git a/packages/gcc/14.3.0/0003-0003-libgcc-disable-split-stack-nothreads.patch.patch b/packages/gcc/14.3.0/0003-0003-libgcc-disable-split-stack-nothreads.patch.patch new file mode 100644 index 00000000..2fea1b63 --- /dev/null +++ b/packages/gcc/14.3.0/0003-0003-libgcc-disable-split-stack-nothreads.patch.patch @@ -0,0 +1,23 @@ +From 9b74f600cb69cf86c9a8e29e8cea775effd780c2 Mon Sep 17 00:00:00 2001 +From: Chris Packham <chris.packham@alliedtelesis.co.nz> +Date: Sun, 25 May 2025 10:34:01 +1200 +Subject: [PATCH] 0003-libgcc-disable-split-stack-nothreads.patch + +--- + libgcc/config/t-stack | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/libgcc/config/t-stack b/libgcc/config/t-stack +index cc0366b4cd81..f3f97e86d60e 100644 +--- a/libgcc/config/t-stack ++++ b/libgcc/config/t-stack +@@ -1,4 +1,6 @@ + # Makefile fragment to provide generic support for -fsplit-stack. + # This should be used in config.host for any host which supports + # -fsplit-stack. ++ifeq ($(enable_threads),yes) + LIB2ADD_ST += $(srcdir)/generic-morestack.c $(srcdir)/generic-morestack-thread.c ++endif +-- +2.49.0 + diff --git a/packages/gcc/14.3.0/0004-Remove-use-of-include_next-from-c-headers.patch b/packages/gcc/14.3.0/0004-Remove-use-of-include_next-from-c-headers.patch new file mode 100644 index 00000000..2dbe28a5 --- /dev/null +++ b/packages/gcc/14.3.0/0004-Remove-use-of-include_next-from-c-headers.patch @@ -0,0 +1,307 @@ +From a9766b7fd69768ec614f838edcb6a38fd7b3cb0d Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Sun, 24 Jan 2021 14:20:33 -0800 +Subject: [PATCH] Remove use of include_next from c++ headers + +Using include_next bypasses the default header search path and lets +files later in the include path take priority over earlier files. + +This makes replacing libc impossible as the default libc headers will +occur after the libstdc++ headers, and so be picked up in place of +headers inserted at the begining of the search path or appended to the +end of the search path. + +Using include_next is a hack to work-around broken combinations of +libraries, and is not necessary in a well constructed toolchain. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + libstdc++-v3/include/bits/std_abs.h | 4 ++-- + libstdc++-v3/include/c/cassert | 2 +- + libstdc++-v3/include/c/cctype | 2 +- + libstdc++-v3/include/c/cerrno | 2 +- + libstdc++-v3/include/c/cfloat | 2 +- + libstdc++-v3/include/c/climits | 2 +- + libstdc++-v3/include/c/clocale | 2 +- + libstdc++-v3/include/c/cmath | 2 +- + libstdc++-v3/include/c/csetjmp | 2 +- + libstdc++-v3/include/c/csignal | 2 +- + libstdc++-v3/include/c/cstdarg | 2 +- + libstdc++-v3/include/c/cstddef | 2 +- + libstdc++-v3/include/c/cstdio | 2 +- + libstdc++-v3/include/c/cstdlib | 2 +- + libstdc++-v3/include/c/cstring | 2 +- + libstdc++-v3/include/c/ctime | 2 +- + libstdc++-v3/include/c/cuchar | 2 +- + libstdc++-v3/include/c/cwchar | 2 +- + libstdc++-v3/include/c/cwctype | 2 +- + libstdc++-v3/include/c_global/cmath | 2 +- + libstdc++-v3/include/c_global/cstdlib | 2 +- + 21 files changed, 22 insertions(+), 22 deletions(-) + +diff --git a/libstdc++-v3/include/bits/std_abs.h b/libstdc++-v3/include/bits/std_abs.h +index 48d44160baba..d30c44e51896 100644 +--- a/libstdc++-v3/include/bits/std_abs.h ++++ b/libstdc++-v3/include/bits/std_abs.h +@@ -35,9 +35,9 @@ + #include <bits/c++config.h> + + #define _GLIBCXX_INCLUDE_NEXT_C_HEADERS +-#include_next <stdlib.h> ++#include <stdlib.h> + #ifdef __CORRECT_ISO_CPP_MATH_H_PROTO +-# include_next <math.h> ++# include <math.h> + #endif + #undef _GLIBCXX_INCLUDE_NEXT_C_HEADERS + +diff --git a/libstdc++-v3/include/c/cassert b/libstdc++-v3/include/c/cassert +index 5cd11fff9ece..01d8c7fa5fcd 100644 +--- a/libstdc++-v3/include/c/cassert ++++ b/libstdc++-v3/include/c/cassert +@@ -31,4 +31,4 @@ + #pragma GCC system_header + + #include <bits/c++config.h> +-#include_next <assert.h> ++#include <assert.h> +diff --git a/libstdc++-v3/include/c/cctype b/libstdc++-v3/include/c/cctype +index c6f650394357..1540a3259454 100644 +--- a/libstdc++-v3/include/c/cctype ++++ b/libstdc++-v3/include/c/cctype +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <ctype.h> ++#include <ctype.h> + + #endif +diff --git a/libstdc++-v3/include/c/cerrno b/libstdc++-v3/include/c/cerrno +index 9e47b182d25c..250ea5d7744a 100644 +--- a/libstdc++-v3/include/c/cerrno ++++ b/libstdc++-v3/include/c/cerrno +@@ -41,7 +41,7 @@ + #pragma GCC system_header + + #include <bits/c++config.h> +-#include_next <errno.h> ++#include <errno.h> + + // Adhere to section 17.4.1.2 clause 5 of ISO 14882:1998 + #ifndef errno +diff --git a/libstdc++-v3/include/c/cfloat b/libstdc++-v3/include/c/cfloat +index 81d9772ed9f6..660440fc810b 100644 +--- a/libstdc++-v3/include/c/cfloat ++++ b/libstdc++-v3/include/c/cfloat +@@ -32,6 +32,6 @@ + #pragma GCC system_header + + #include <bits/c++config.h> +-#include_next <float.h> ++#include <float.h> + + #endif +diff --git a/libstdc++-v3/include/c/climits b/libstdc++-v3/include/c/climits +index 255bed411259..919e1ec4855d 100644 +--- a/libstdc++-v3/include/c/climits ++++ b/libstdc++-v3/include/c/climits +@@ -32,6 +32,6 @@ + #pragma GCC system_header + + #include <bits/c++config.h> +-#include_next <limits.h> ++#include <limits.h> + + #endif +diff --git a/libstdc++-v3/include/c/clocale b/libstdc++-v3/include/c/clocale +index 4258df1958b6..95357d40ca1b 100644 +--- a/libstdc++-v3/include/c/clocale ++++ b/libstdc++-v3/include/c/clocale +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <locale.h> ++#include <locale.h> + + #endif +diff --git a/libstdc++-v3/include/c/cmath b/libstdc++-v3/include/c/cmath +index 43020eee9d29..619031ba8e4a 100644 +--- a/libstdc++-v3/include/c/cmath ++++ b/libstdc++-v3/include/c/cmath +@@ -33,7 +33,7 @@ + + #include <bits/c++config.h> + +-#include_next <math.h> ++#include <math.h> + + // Get rid of those macros defined in <math.h> in lieu of real functions. + #undef abs +diff --git a/libstdc++-v3/include/c/csetjmp b/libstdc++-v3/include/c/csetjmp +index 4a5b0334590f..4a7744ba1c7e 100644 +--- a/libstdc++-v3/include/c/csetjmp ++++ b/libstdc++-v3/include/c/csetjmp +@@ -31,7 +31,7 @@ + + #pragma GCC system_header + +-#include_next <setjmp.h> ++#include <setjmp.h> + + // Get rid of those macros defined in <setjmp.h> in lieu of real functions. + #undef longjmp +diff --git a/libstdc++-v3/include/c/csignal b/libstdc++-v3/include/c/csignal +index 040b48368f94..afe91f7c7866 100644 +--- a/libstdc++-v3/include/c/csignal ++++ b/libstdc++-v3/include/c/csignal +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <signal.h> ++#include <signal.h> + + #endif +diff --git a/libstdc++-v3/include/c/cstdarg b/libstdc++-v3/include/c/cstdarg +index 5d97e043da84..568dc07994f6 100644 +--- a/libstdc++-v3/include/c/cstdarg ++++ b/libstdc++-v3/include/c/cstdarg +@@ -32,6 +32,6 @@ + #pragma GCC system_header + + #undef __need___va_list +-#include_next <stdarg.h> ++#include <stdarg.h> + + #endif +diff --git a/libstdc++-v3/include/c/cstddef b/libstdc++-v3/include/c/cstddef +index 4fd889a1dffc..28997b73a647 100644 +--- a/libstdc++-v3/include/c/cstddef ++++ b/libstdc++-v3/include/c/cstddef +@@ -35,6 +35,6 @@ + #define __need_ptrdiff_t + #define __need_NULL + #define __need_offsetof +-#include_next <stddef.h> ++#include <stddef.h> + + #endif +diff --git a/libstdc++-v3/include/c/cstdio b/libstdc++-v3/include/c/cstdio +index 01293054d501..6632e5b09586 100644 +--- a/libstdc++-v3/include/c/cstdio ++++ b/libstdc++-v3/include/c/cstdio +@@ -31,7 +31,7 @@ + + #pragma GCC system_header + +-#include_next <stdio.h> ++#include <stdio.h> + + // Get rid of those macros defined in <stdio.h> in lieu of real functions. + #undef clearerr +diff --git a/libstdc++-v3/include/c/cstdlib b/libstdc++-v3/include/c/cstdlib +index f5707f8a8ce4..4156882e09aa 100644 +--- a/libstdc++-v3/include/c/cstdlib ++++ b/libstdc++-v3/include/c/cstdlib +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <stdlib.h> ++#include <stdlib.h> + + #endif +diff --git a/libstdc++-v3/include/c/cstring b/libstdc++-v3/include/c/cstring +index 0082080fcab0..209ccd112faa 100644 +--- a/libstdc++-v3/include/c/cstring ++++ b/libstdc++-v3/include/c/cstring +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <string.h> ++#include <string.h> + + #endif +diff --git a/libstdc++-v3/include/c/ctime b/libstdc++-v3/include/c/ctime +index 5476ff7da399..33c61aa08d73 100644 +--- a/libstdc++-v3/include/c/ctime ++++ b/libstdc++-v3/include/c/ctime +@@ -31,6 +31,6 @@ + + #pragma GCC system_header + +-#include_next <time.h> ++#include <time.h> + + #endif +diff --git a/libstdc++-v3/include/c/cuchar b/libstdc++-v3/include/c/cuchar +index 430d1ff50ba1..7b2c9d738269 100644 +--- a/libstdc++-v3/include/c/cuchar ++++ b/libstdc++-v3/include/c/cuchar +@@ -39,7 +39,7 @@ + #include <cwchar> + + #if _GLIBCXX_USE_C11_UCHAR_CXX11 +-# include_next <uchar.h> ++# include <uchar.h> + #endif + + #endif // C++11 +diff --git a/libstdc++-v3/include/c/cwchar b/libstdc++-v3/include/c/cwchar +index 7a62eb74abbf..c1857099ef12 100644 +--- a/libstdc++-v3/include/c/cwchar ++++ b/libstdc++-v3/include/c/cwchar +@@ -36,7 +36,7 @@ + #include <ctime> + + #if _GLIBCXX_HAVE_WCHAR_H +-#include_next <wchar.h> ++#include <wchar.h> + #endif + + // Need to do a bit of trickery here with mbstate_t as char_traits +diff --git a/libstdc++-v3/include/c/cwctype b/libstdc++-v3/include/c/cwctype +index 011ceadbb1b4..6a67549ea4bd 100644 +--- a/libstdc++-v3/include/c/cwctype ++++ b/libstdc++-v3/include/c/cwctype +@@ -34,7 +34,7 @@ + #include <bits/c++config.h> + + #if _GLIBCXX_HAVE_WCTYPE_H +-#include_next <wctype.h> ++#include <wctype.h> + #endif + + #endif +diff --git a/libstdc++-v3/include/c_global/cmath b/libstdc++-v3/include/c_global/cmath +index 114b0693151e..bea5665a293d 100644 +--- a/libstdc++-v3/include/c_global/cmath ++++ b/libstdc++-v3/include/c_global/cmath +@@ -44,7 +44,7 @@ + #include <bits/cpp_type_traits.h> + #include <ext/type_traits.h> + #define _GLIBCXX_INCLUDE_NEXT_C_HEADERS +-#include_next <math.h> ++#include <math.h> + #undef _GLIBCXX_INCLUDE_NEXT_C_HEADERS + #include <bits/std_abs.h> + +diff --git a/libstdc++-v3/include/c_global/cstdlib b/libstdc++-v3/include/c_global/cstdlib +index 7bb11f5b788a..5a6a28898221 100644 +--- a/libstdc++-v3/include/c_global/cstdlib ++++ b/libstdc++-v3/include/c_global/cstdlib +@@ -76,7 +76,7 @@ namespace std + // Need to ensure this finds the C library's <stdlib.h> not a libstdc++ + // wrapper that might already be installed later in the include search path. + #define _GLIBCXX_INCLUDE_NEXT_C_HEADERS +-#include_next <stdlib.h> ++#include <stdlib.h> + #undef _GLIBCXX_INCLUDE_NEXT_C_HEADERS + #include <bits/std_abs.h> + +-- +2.49.0 + diff --git a/packages/gcc/14.3.0/0005-Allow-default-libc-to-be-specified-to-configure.patch b/packages/gcc/14.3.0/0005-Allow-default-libc-to-be-specified-to-configure.patch new file mode 100644 index 00000000..b55b8a1b --- /dev/null +++ b/packages/gcc/14.3.0/0005-Allow-default-libc-to-be-specified-to-configure.patch @@ -0,0 +1,141 @@ +From d87c4fb35576c61b75c0a003f9bbccea8321b3a3 Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Fri, 2 Sep 2022 23:07:05 -0700 +Subject: [PATCH] Allow default libc to be specified to configure + +The default C library is normally computed based on the target +triplet. However, for embedded systems, it can be useful to leave the +triplet alone while changing which C library is used by default. Other +C libraries may still be available on the system so the compiler and +can be used by specifying suitable include and library paths at build +time. + +If an unknown --with-default-libc= value is provided, emit an error +and stop. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/config.gcc | 48 ++++++++++++++++++++++++++++++++++++++++-------- + gcc/configure.ac | 4 ++++ + 2 files changed, 44 insertions(+), 8 deletions(-) + +diff --git a/gcc/config.gcc b/gcc/config.gcc +index a3566f5c77da..f993b4b26c4c 100644 +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -695,6 +695,8 @@ esac + # Common C libraries. + tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4" + ++default_libc="" ++ + # 32-bit x86 processors supported by --with-arch=. Each processor + # MUST be separated by exactly one space. + x86_archs="athlon athlon-4 athlon-fx athlon-mp athlon-tbird \ +@@ -911,16 +913,16 @@ case ${target} in + esac + case $target in + *-*-*android*) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_BIONIC" ++ default_libc=LIBC_BIONIC + ;; + *-*-*uclibc* | *-*-uclinuxfdpiceabi) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC" ++ default_libc=LIBC_UCLIBC + ;; + *-*-*musl*) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_MUSL" ++ default_libc=LIBC_MUSL + ;; + *) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_GLIBC" ++ default_libc=LIBC_GLIBC + ;; + esac + # Assume that glibc or uClibc or Bionic are being used and so __cxa_atexit +@@ -1035,7 +1037,8 @@ case ${target} in + case ${enable_threads} in + "" | yes | posix) thread_file='posix' ;; + esac +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC SINGLE_LIBC" ++ tm_defines="$tm_defines SINGLE_LIBC" ++ default_libc=LIBC_UCLIBC + ;; + *-*-rdos*) + use_gcc_stdint=wrap +@@ -1721,13 +1724,13 @@ csky-*-*) + + case ${target} in + csky-*-linux-gnu*) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_GLIBC" ++ default_libc=LIBC_GLIBC + # Force .init_array support. The configure script cannot always + # automatically detect that GAS supports it, yet we require it. + gcc_cv_initfini_array=yes + ;; + csky-*-linux-uclibc*) +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC" ++ default_libc=LIBC_UCLIBC + default_use_cxa_atexit=no + ;; + *) +@@ -3125,7 +3128,7 @@ powerpc*-wrs-vxworks7r*) + tmake_file="${tmake_file} t-linux rs6000/t-linux64 rs6000/t-fprules rs6000/t-ppccomm" + tmake_file="${tmake_file} rs6000/t-vxworks" + +- tm_defines="$tm_defines DEFAULT_LIBC=LIBC_GLIBC" ++ default_libc=LIBC_GLIBC + extra_objs="$extra_objs linux.o rs6000-linux.o" + ;; + powerpc-wrs-vxworks*) +@@ -6079,3 +6082,32 @@ i[34567]86-*-* | x86_64-*-*) + fi + ;; + esac ++ ++case "${with_default_libc}" in ++glibc) ++ default_libc=LIBC_GLIBC ++ ;; ++uclibc) ++ default_libc=LIBC_UCLIBC ++ ;; ++bionic) ++ default_libc=LIBC_BIONIC ++ ;; ++musl) ++ default_libc=LIBC_MUSL ++ ;; ++"") ++ ;; ++*) ++ echo "Unknown libc in --with-default-libc=$with_default_libc" 1>&2 ++ exit 1 ++ ;; ++esac ++ ++case "$default_libc" in ++"") ++ ;; ++*) ++ tm_defines="$tm_defines DEFAULT_LIBC=$default_libc" ++ ;; ++esac +diff --git a/gcc/configure.ac b/gcc/configure.ac +index cb743b5a875a..5213bf64a6d4 100644 +--- a/gcc/configure.ac ++++ b/gcc/configure.ac +@@ -2561,6 +2561,10 @@ if { { test x$host != x$target && test "x$with_sysroot" = x ; } || + fi + AC_SUBST(inhibit_libc) + ++AC_ARG_WITH(default-libc, ++ [AS_HELP_STRING([--with-default-libc], ++ [Use specified default C library])]) ++ + # When building gcc with a cross-compiler, we need to adjust things so + # that the generator programs are still built with the native compiler. + # Also, we cannot run fixincludes. +-- +2.49.0 + diff --git a/packages/gcc/14.3.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch b/packages/gcc/14.3.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch new file mode 100644 index 00000000..e262eb58 --- /dev/null +++ b/packages/gcc/14.3.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch @@ -0,0 +1,102 @@ +From 2663eed443ff0cb465f28c0598713dc6ca83feeb Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Fri, 26 Aug 2022 14:30:03 -0700 +Subject: [PATCH] driver: Extend 'getenv' function to allow default value + +Right now, a missing environment variable provided to the 'getenv' +function in a .specs file causes a fatal error. That makes writing a +spec file that uses the GCC_EXEC_PREFIX value difficult as that +variable is only set when the driver has been relocated, but not when +run from the defined location. This makes building a relocatable +toolchain difficult to extend to other ancilary pieces which use specs +files to locate header and library files adjacent to the toolchain. + +This patch adds an optional third argument to the getenv function that +can be used to fall back to the standard installation path when the +driver hasn't set GCC_EXEC_PREFIX in the environment. + +For example, if an alternate C library is installed in +${prefix}/extra, then this change allows the specs file to locate that +relative to the gcc directory, if gcc is located in the original +installation directory (which would leave GCC_EXEC_PREFIX unset), or +if the gcc tree has been moved to a different location (where gcc +would set GCC_EXEC_PREFIX itself): + +*cpp: +-isystem %:getenv(GCC_EXEC_PREFIX ../../extra/include ${prefix}/extra/include) + +I considered changing the behavior of either the %R sequence so that +it had a defined behavior when there was no sysroot defined, or making +the driver always set the GCC_EXEC_PREFIX environment variable and +decided that the approach of adding functionality to getenv where it +was previously invalid would cause the least potential for affecting +existing usage. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/doc/invoke.texi | 18 +++++++++++------- + gcc/gcc.cc | 10 +++++++++- + 2 files changed, 20 insertions(+), 8 deletions(-) + +diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi +index 64728fead512..3f487db6cad7 100644 +--- a/gcc/doc/invoke.texi ++++ b/gcc/doc/invoke.texi +@@ -37065,17 +37065,21 @@ The following built-in spec functions are provided: + + @table @code + @item @code{getenv} +-The @code{getenv} spec function takes two arguments: an environment +-variable name and a string. If the environment variable is not +-defined, a fatal error is issued. Otherwise, the return value is the +-value of the environment variable concatenated with the string. For +-example, if @env{TOPDIR} is defined as @file{/path/to/top}, then: ++ ++The @code{getenv} spec function takes two or three arguments: an ++environment variable name, a string and an optional default value. If ++the environment variable is not defined and a default value is ++provided, that is used as the return value; otherwise a fatal error is ++issued. Otherwise, the return value is the value of the environment ++variable concatenated with the string. For example, if @env{TOPDIR} ++is defined as @file{/path/to/top}, then: + + @smallexample +-%:getenv(TOPDIR /include) ++%:getenv(TOPDIR /include /path/to/default/include) + @end smallexample + +-expands to @file{/path/to/top/include}. ++expands to @file{/path/to/top/include}. If @env{TOPDIR} is not ++defined, then this expands to @file{/path/to/default/include}. + + @item @code{if-exists} + The @code{if-exists} spec function takes one argument, an absolute +diff --git a/gcc/gcc.cc b/gcc/gcc.cc +index fc9f1f545dc8..8e6e25d935be 100644 +--- a/gcc/gcc.cc ++++ b/gcc/gcc.cc +@@ -10318,12 +10318,20 @@ getenv_spec_function (int argc, const char **argv) + char *ptr; + size_t len; + +- if (argc != 2) ++ if (argc != 2 && argc != 3) + return NULL; + + varname = argv[0]; + value = env.get (varname); + ++ if (!value && argc == 3) ++ { ++ value = argv[2]; ++ result = XNEWVAR(char, strlen(value) + 1); ++ strcpy(result, value); ++ return result; ++ } ++ + /* If the variable isn't defined and this is allowed, craft our expected + return value. Assume variable names used in specs strings don't contain + any active spec character so don't need escaping. */ +-- +2.49.0 + diff --git a/packages/gcc/14.3.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch b/packages/gcc/14.3.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch new file mode 100644 index 00000000..cfc81557 --- /dev/null +++ b/packages/gcc/14.3.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch @@ -0,0 +1,42 @@ +From d4b4b5159d270bb4bfec71847d041b4b2d71759d Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Tue, 23 Aug 2022 22:12:06 -0700 +Subject: [PATCH] Add newlib and picolibc as default C library choices + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/config.gcc | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/gcc/config.gcc b/gcc/config.gcc +index f993b4b26c4c..bcf23f9d0a42 100644 +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -693,7 +693,7 @@ case ${target} in + esac + + # Common C libraries. +-tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4" ++tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4 LIBC_NEWLIB=5 LIBC_PICOLIBC=6" + + default_libc="" + +@@ -6096,6 +6096,15 @@ bionic) + musl) + default_libc=LIBC_MUSL + ;; ++newlib) ++ # Newlib configurations don't set the DEFAULT_LIBC variable, so ++ # avoid changing those by allowing --with-default-libc=newlib but ++ # not actually setting the DEFAULT_LIBC variable. ++ default_libc= ++ ;; ++picolibc) ++ default_libc=LIBC_PICOLIBC ++ ;; + "") + ;; + *) +-- +2.49.0 + diff --git a/packages/gcc/14.3.0/0008-Support-picolibc-targets.patch b/packages/gcc/14.3.0/0008-Support-picolibc-targets.patch new file mode 100644 index 00000000..20914c37 --- /dev/null +++ b/packages/gcc/14.3.0/0008-Support-picolibc-targets.patch @@ -0,0 +1,38 @@ +From a3fb1dcf2b7146c1ae6014c655957a775e1ea6b0 Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Sun, 12 Feb 2023 14:23:32 -0800 +Subject: [PATCH] Support picolibc targets + +Match *-picolibc-* and select picolibc as the default C library, plus continuing to use +the newlib-based logic for other configuration items. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/config.gcc | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/gcc/config.gcc b/gcc/config.gcc +index bcf23f9d0a42..f770d21e5d4c 100644 +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -1168,6 +1168,17 @@ case ${target} in + ;; + esac + ;; ++*-picolibc-*) ++ # __cxa_atexit is provided. ++ default_use_cxa_atexit=yes ++ use_gcc_stdint=wrap ++ default_libc=LIBC_PICOLIBC ++ case "${with_newlib}-${with_headers}" in ++ no-no) use_gcc_stdint=provide ;; ++ *) ;; ++ esac ++ ;; ++ + *-*-elf|arc*-*-elf*) + # Assume that newlib is being used and so __cxa_atexit is provided. + default_use_cxa_atexit=yes +-- +2.49.0 + diff --git a/packages/gcc/14.3.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch b/packages/gcc/14.3.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch new file mode 100644 index 00000000..9e94f94e --- /dev/null +++ b/packages/gcc/14.3.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch @@ -0,0 +1,68 @@ +From 905b18c94f5792a2e08caa41576f9cb5d1dad526 Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Sat, 11 Feb 2023 23:07:08 -0800 +Subject: [PATCH] gcc: Allow g++ to work differently from gcc + +Compile gcc.cc with -DIN_GPP defined when building g++ so that the +code can respond appropriately for the default target language. This +allows the driver to customize the specs used, selecting different +linker scripts, adjusting the use of crtbegin.o/crtend.o etc. + +By default, this change has no effect; targets need to explicitly +check for IN_GPP to have alternate behavior. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/cp/Make-lang.in | 7 ++++++- + gcc/gpp.cc | 21 +++++++++++++++++++++ + 2 files changed, 27 insertions(+), 1 deletion(-) + create mode 100644 gcc/gpp.cc + +diff --git a/gcc/cp/Make-lang.in b/gcc/cp/Make-lang.in +index f153891a1ef6..ec980d95e3b4 100644 +--- a/gcc/cp/Make-lang.in ++++ b/gcc/cp/Make-lang.in +@@ -77,7 +77,12 @@ CFLAGS-cp/module.o += -DMODULE_VERSION='$(shell cat s-cp-module-version)' + endif + + # Create the compiler driver for g++. +-GXX_OBJS = $(GCC_OBJS) cp/g++spec.o ++GXX_OBJS = $(GCC_OBJS:gcc.o=gpp.o) cp/g++spec.o ++ ++CFLAGS-gpp.o = $(CFLAGS-gcc.o) ++gpp.o: $(BASEVER) ++gpp.o: gcc.o ++ + xg++$(exeext): $(GXX_OBJS) $(EXTRA_GCC_OBJS) libcommon-target.a $(LIBDEPS) + +$(LINKER) $(ALL_LINKERFLAGS) $(LDFLAGS) -o $@ \ + $(GXX_OBJS) $(EXTRA_GCC_OBJS) libcommon-target.a \ +diff --git a/gcc/gpp.cc b/gcc/gpp.cc +new file mode 100644 +index 000000000000..3cd7b45e8086 +--- /dev/null ++++ b/gcc/gpp.cc +@@ -0,0 +1,21 @@ ++/* Compiler driver program that can handle many languages. ++ Copyright (C) 1987-2022 Free Software Foundation, Inc. ++ ++This file is part of GCC. ++ ++GCC is free software; you can redistribute it and/or modify it under ++the terms of the GNU General Public License as published by the Free ++Software Foundation; either version 3, or (at your option) any later ++version. ++ ++GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++WARRANTY; without even the implied warranty of MERCHANTABILITY or ++FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++for more details. ++ ++You should have received a copy of the GNU General Public License ++along with GCC; see the file COPYING3. If not see ++<http://www.gnu.org/licenses/>. */ ++ ++#define IN_GPP ++#include "gcc.cc" +-- +2.49.0 + diff --git a/packages/gcc/14.3.0/0010-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch b/packages/gcc/14.3.0/0010-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch new file mode 100644 index 00000000..46c6788e --- /dev/null +++ b/packages/gcc/14.3.0/0010-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch @@ -0,0 +1,35 @@ +From e1c06be963b4048902ee5c19d589b7619d3c5fa2 Mon Sep 17 00:00:00 2001 +From: Chris Packham <chris.packham@alliedtelesis.co.nz> +Date: Thu, 7 Sep 2023 19:26:49 +1200 +Subject: [PATCH] libgcc: Exclude UCLIBC from GLIBC thread check + +UBLIBC defines __GLIBC__ but also marks __pthread_key_create() as +protected. Leading to link errors with newer binutils such as: + + ld.bfd: isl_test_cpp17.o: non-canonical reference to canonical protected function `__pthread_key_create' in x86_64-multilib-linux-uclibc/sysroot/lib64/libc.so.1 + ld.bfd: failed to set dynamic section sizes: bad value + +Add a condition on !__UCLIBC__ when selecting a symbol to detect pthread +usage so it picks the intended pthread_cancel(). + +Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> +--- + libgcc/gthr-posix.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/libgcc/gthr-posix.h b/libgcc/gthr-posix.h +index 82e8f9ffcf66..e63d02fb8dcc 100644 +--- a/libgcc/gthr-posix.h ++++ b/libgcc/gthr-posix.h +@@ -246,7 +246,7 @@ __gthread_active_p (void) + library does not provide pthread_cancel, so we do use pthread_create + there (and interceptor libraries lose). */ + +-#ifdef __GLIBC__ ++#if defined(__GLIBC__) && !defined(__UCLIBC__) + __gthrw2(__gthrw_(__pthread_key_create), + __pthread_key_create, + pthread_key_create) +-- +2.49.0 + diff --git a/packages/gcc/14.3.0/chksum b/packages/gcc/14.3.0/chksum new file mode 100644 index 00000000..2db0b8d1 --- /dev/null +++ b/packages/gcc/14.3.0/chksum @@ -0,0 +1,8 @@ +md5 gcc-14.3.0.tar.xz 2e2f25966bbb5321bf6a3beafcd241b5 +sha1 gcc-14.3.0.tar.xz e33b9ffb8baf1528d72a8a26a1ee678928ca9121 +sha256 gcc-14.3.0.tar.xz e0dc77297625631ac8e50fa92fffefe899a4eb702592da5c32ef04e2293aca3a +sha512 gcc-14.3.0.tar.xz cb4e3259640721bbd275c723fe4df53d12f9b1673afb3db274c22c6aa457865dccf2d6ea20b4fd4c591f6152e6d4b87516c402015900f06ce9d43af66d3b7a93 +md5 gcc-14.3.0.tar.gz 1ba56546c0274ea75457bf5c00c61506 +sha1 gcc-14.3.0.tar.gz 1866e57122db9f31ba3117175bf50d46d1146eb8 +sha256 gcc-14.3.0.tar.gz ace8b8b0dbfe6abfc22f821cb093e195aa5498b7ccf7cd23e4424b9f14afed22 +sha512 gcc-14.3.0.tar.gz b2c3ab244f809217eb9d71c2b4e7f7e1d9d8b0c8ab3d4c737939075c1fef528cb4629d1cbec717a4839612f3123ca0ebf81af8398fa42a5bf88f99e12bf223b4 diff --git a/packages/gcc/14.3.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch b/packages/gcc/14.3.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch new file mode 100644 index 00000000..487a28c3 --- /dev/null +++ b/packages/gcc/14.3.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch @@ -0,0 +1,127 @@ +From b0f9ac365f91952f6f920c8e6aa4ddb819f47cc8 Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Tue, 23 Aug 2022 22:13:08 -0700 +Subject: [PATCH] picolibc: Add custom spec file fragments for using + picolibc + +The '--oslib=' option allows targets to insert an OS library after the +C library in the LIB_PATH spec file fragment. This library maps a few +POSIX APIs used by picolibc to underlying system capabilities. + +The '--crt0=' option allows targets to use an alternate crt0 in place +of the usual one as provided by Picolibc. + +For example, picolibc provides 'libsemihost' and 'crt0-semihost.o' on +various targets which maps some POSIX APIs to semihosting capabilities +and signals the semihosting environment when 'main' returns. These +would be used by specifying --oslib=semihost --crt0=semihost. + +This patch also takes advantage of the IN_GPP conditional when +building g++ to elide exception handling contents from the executable +when not linking with the g++ driver. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/config.gcc | 7 +++++++ + gcc/config/picolibc.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ + gcc/config/picolibc.opt | 33 +++++++++++++++++++++++++++++++++ + 3 files changed, 84 insertions(+) + create mode 100644 gcc/config/picolibc.h + create mode 100644 gcc/config/picolibc.opt + +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -5931,3 +5931,10 @@ + tm_defines="$tm_defines DEFAULT_LIBC=$default_libc" + ;; + esac ++ ++case "$default_libc" in ++ LIBC_PICOLIBC) ++ extra_options="${extra_options} picolibc.opt" ++ tm_file="${tm_file} picolibc.h" ++ ;; ++esac +--- /dev/null ++++ b/gcc/config/picolibc.h +@@ -0,0 +1,44 @@ ++/* Configuration common to all targets running Picolibc. ++ Copyright (C) 2023 Free Software Foundation, Inc. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ Under Section 7 of GPL version 3, you are granted additional ++ permissions described in the GCC Runtime Library Exception, version ++ 3.1, as published by the Free Software Foundation. ++ ++ You should have received a copy of the GNU General Public License and ++ a copy of the GCC Runtime Library Exception along with this program; ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ <http://www.gnu.org/licenses/>. */ ++ ++#ifdef IN_GPP ++#define PICOLIBC_LD "picolibcpp.ld" ++#define PICOLIBC_BEGIN " crtbegin%O%s" ++#define PICOLIBC_END "crtend%O%s" ++#else ++#define PICOLIBC_LD "picolibc.ld" ++#define PICOLIBC_BEGIN "" ++#define PICOLIBC_END "" ++#endif ++ ++#undef LIB_SPEC ++#define LIB_SPEC "%{!T:-T" PICOLIBC_LD "} --start-group -lc %{-oslib=*:-l%*} %(libgcc) --end-group" ++ ++#undef STARTFILE_SPEC ++#define STARTFILE_SPEC "%{-crt0=*:crt0-%*%O%s; :crt0%O%s}" PICOLIBC_BEGIN ++ ++#undef ENDFILE_SPEC ++#define ENDFILE_SPEC PICOLIBC_END ++ ++#define EH_TABLES_CAN_BE_READ_ONLY 1 +--- /dev/null ++++ b/gcc/config/picolibc.opt +@@ -0,0 +1,33 @@ ++; Processor-independent options for picolibc. ++; ++; Copyright (C) 2022 Free Software Foundation, Inc. ++; ++; This file is part of GCC. ++; ++; GCC is free software; you can redistribute it and/or modify it under ++; the terms of the GNU General Public License as published by the Free ++; Software Foundation; either version 3, or (at your option) any later ++; version. ++; ++; GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++; WARRANTY; without even the implied warranty of MERCHANTABILITY or ++; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++; for more details. ++; ++; You should have received a copy of the GNU General Public License ++; along with GCC; see the file COPYING3. If not see ++; <http://www.gnu.org/licenses/>. ++ ++-oslib ++Driver Separate Alias(-oslib=) ++ ++-oslib= ++Driver Joined ++Specify an OS support library to load after libc. ++ ++-crt0 ++Driver Separate Alias(-crt0=) ++ ++-crt0= ++Driver Joined ++Specify an alternate startup file. diff --git a/packages/gcc/14.3.0/version.desc b/packages/gcc/14.3.0/version.desc new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/packages/gcc/14.3.0/version.desc diff --git a/packages/gcc/15.1.0/0000-libtool-leave-framework-alone.patch b/packages/gcc/15.1.0/0000-libtool-leave-framework-alone.patch new file mode 100644 index 00000000..b5804ea1 --- /dev/null +++ b/packages/gcc/15.1.0/0000-libtool-leave-framework-alone.patch @@ -0,0 +1,18 @@ +--- + libtool-ldflags | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/libtool-ldflags ++++ b/libtool-ldflags +@@ -36,6 +36,11 @@ prev_arg= + for arg + do + case $arg in ++ -framework) ++ # libtool handles this option. It should not be prefixed with ++ # -Xcompiler, as that would split it from the argument that ++ # follows. ++ ;; + -f*|--*|-static-lib*|-shared-lib*|-B*) + # Libtool does not ascribe any special meaning options + # that begin with -f or with a double-dash. So, it will diff --git a/packages/gcc/15.1.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch b/packages/gcc/15.1.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch new file mode 100644 index 00000000..3040e23c --- /dev/null +++ b/packages/gcc/15.1.0/0001-gcc-plugin-POSIX-include-sys-select-h.patch @@ -0,0 +1,14 @@ +--- + libcc1/connection.cc | 1 + + 1 file changed, 1 insertion(+) + +--- a/libcc1/connection.cc ++++ b/libcc1/connection.cc +@@ -21,6 +21,7 @@ along with GCC; see the file COPYING3. + #include <string> + #include <unistd.h> + #include <sys/types.h> ++#include <sys/select.h> + #include <string.h> + #include <errno.h> + #include "marshall.hh" diff --git a/packages/gcc/15.1.0/0002-arm-softfloat-libgcc.patch b/packages/gcc/15.1.0/0002-arm-softfloat-libgcc.patch new file mode 100644 index 00000000..d9800365 --- /dev/null +++ b/packages/gcc/15.1.0/0002-arm-softfloat-libgcc.patch @@ -0,0 +1,31 @@ +--- + gcc/config/arm/linux-elf.h | 2 +- + libgcc/config/arm/t-linux | 7 ++++++- + 2 files changed, 7 insertions(+), 2 deletions(-) + +--- a/gcc/config/arm/linux-elf.h ++++ b/gcc/config/arm/linux-elf.h +@@ -58,7 +58,7 @@ + %{shared:-lc} \ + %{!shared:%{profile:-lc_p}%{!profile:-lc}}" + +-#define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc" ++#define LIBGCC_SPEC "-lgcc" + + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" + +--- a/libgcc/config/arm/t-linux ++++ b/libgcc/config/arm/t-linux +@@ -1,6 +1,11 @@ + LIB1ASMSRC = arm/lib1funcs.S + LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2 \ +- _ctzsi2 _arm_addsubdf3 _arm_addsubsf3 ++ _ctzsi2 _arm_addsubdf3 _arm_addsubsf3 \ ++ _arm_addsubdf3 _arm_addsubsf3 \ ++ _arm_negdf2 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \ ++ _arm_fixdfsi _arm_fixunsdfsi _arm_truncdfsf2 \ ++ _arm_negsf2 _arm_muldivsf3 _arm_cmpsf2 _arm_unordsf2 \ ++ _arm_fixsfsi _arm_fixunssfsi + + # Just for these, we omit the frame pointer since it makes such a big + # difference. diff --git a/packages/gcc/15.1.0/0003-libgcc-disable-split-stack-nothreads.patch b/packages/gcc/15.1.0/0003-libgcc-disable-split-stack-nothreads.patch new file mode 100644 index 00000000..df91a9ff --- /dev/null +++ b/packages/gcc/15.1.0/0003-libgcc-disable-split-stack-nothreads.patch @@ -0,0 +1,17 @@ +disable split-stack for non-thread builds + +Signed-off-by: Waldemar Brodkorb <wbx@openadk.org> + +--- + libgcc/config/t-stack | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/libgcc/config/t-stack ++++ b/libgcc/config/t-stack +@@ -1,4 +1,6 @@ + # Makefile fragment to provide generic support for -fsplit-stack. + # This should be used in config.host for any host which supports + # -fsplit-stack. ++ifeq ($(enable_threads),yes) + LIB2ADD_ST += $(srcdir)/generic-morestack.c $(srcdir)/generic-morestack-thread.c ++endif diff --git a/packages/gcc/13.2.0/0004-Remove-use-of-include_next-from-c-headers.patch b/packages/gcc/15.1.0/0004-Remove-use-of-include_next-from-c-headers.patch index 429d3bd3..2612262a 100644 --- a/packages/gcc/13.2.0/0004-Remove-use-of-include_next-from-c-headers.patch +++ b/packages/gcc/15.1.0/0004-Remove-use-of-include_next-from-c-headers.patch @@ -41,8 +41,8 @@ Signed-off-by: Keith Packard <keithp@keithp.com> --- a/libstdc++-v3/include/bits/std_abs.h +++ b/libstdc++-v3/include/bits/std_abs.h -@@ -35,9 +35,9 @@ - #include <bits/c++config.h> +@@ -41,9 +41,9 @@ + #pragma GCC diagnostic ignored "-Wlong-long" #define _GLIBCXX_INCLUDE_NEXT_C_HEADERS -#include_next <stdlib.h> @@ -55,159 +55,171 @@ Signed-off-by: Keith Packard <keithp@keithp.com> --- a/libstdc++-v3/include/c/cassert +++ b/libstdc++-v3/include/c/cassert -@@ -31,4 +31,4 @@ - #pragma GCC system_header +@@ -36,6 +36,6 @@ + #pragma GCC diagnostic ignored "-Wpedantic" // include_next #include <bits/c++config.h> -#include_next <assert.h> +#include <assert.h> + + #pragma GCC diagnostic pop --- a/libstdc++-v3/include/c/cctype +++ b/libstdc++-v3/include/c/cctype -@@ -31,6 +31,6 @@ - - #pragma GCC system_header +@@ -36,7 +36,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next -#include_next <ctype.h> +#include <ctype.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/cerrno +++ b/libstdc++-v3/include/c/cerrno -@@ -41,7 +41,7 @@ - #pragma GCC system_header +@@ -46,7 +46,7 @@ + #pragma GCC diagnostic ignored "-Wpedantic" // include_next #include <bits/c++config.h> -#include_next <errno.h> +#include <errno.h> - // Adhere to section 17.4.1.2 clause 5 of ISO 14882:1998 - #ifndef errno + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/cfloat +++ b/libstdc++-v3/include/c/cfloat -@@ -32,6 +32,6 @@ - #pragma GCC system_header +@@ -37,7 +37,7 @@ + #pragma GCC diagnostic ignored "-Wpedantic" // include_next #include <bits/c++config.h> -#include_next <float.h> +#include <float.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/climits +++ b/libstdc++-v3/include/c/climits -@@ -32,6 +32,6 @@ - #pragma GCC system_header +@@ -37,7 +37,7 @@ + #pragma GCC diagnostic ignored "-Wpedantic" // include_next #include <bits/c++config.h> -#include_next <limits.h> +#include <limits.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/clocale +++ b/libstdc++-v3/include/c/clocale -@@ -31,6 +31,6 @@ - - #pragma GCC system_header +@@ -36,7 +36,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next -#include_next <locale.h> +#include <locale.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/cmath +++ b/libstdc++-v3/include/c/cmath -@@ -33,7 +33,7 @@ - - #include <bits/c++config.h> +@@ -38,7 +38,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next -#include_next <math.h> +#include <math.h> - // Get rid of those macros defined in <math.h> in lieu of real functions. - #undef abs + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/csetjmp +++ b/libstdc++-v3/include/c/csetjmp -@@ -31,7 +31,7 @@ - - #pragma GCC system_header +@@ -36,7 +36,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next -#include_next <setjmp.h> +#include <setjmp.h> - // Get rid of those macros defined in <setjmp.h> in lieu of real functions. - #undef longjmp + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/csignal +++ b/libstdc++-v3/include/c/csignal -@@ -31,6 +31,6 @@ - - #pragma GCC system_header +@@ -36,7 +36,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next -#include_next <signal.h> +#include <signal.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/cstdarg +++ b/libstdc++-v3/include/c/cstdarg -@@ -32,6 +32,6 @@ - #pragma GCC system_header +@@ -37,7 +37,7 @@ + #pragma GCC diagnostic ignored "-Wpedantic" // include_next #undef __need___va_list -#include_next <stdarg.h> +#include <stdarg.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/cstddef +++ b/libstdc++-v3/include/c/cstddef -@@ -35,6 +35,6 @@ +@@ -40,7 +40,7 @@ #define __need_ptrdiff_t #define __need_NULL #define __need_offsetof -#include_next <stddef.h> +#include <stddef.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/cstdio +++ b/libstdc++-v3/include/c/cstdio -@@ -31,7 +31,7 @@ - - #pragma GCC system_header +@@ -36,7 +36,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next -#include_next <stdio.h> +#include <stdio.h> - // Get rid of those macros defined in <stdio.h> in lieu of real functions. - #undef clearerr + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/cstdlib +++ b/libstdc++-v3/include/c/cstdlib -@@ -31,6 +31,6 @@ - - #pragma GCC system_header +@@ -36,7 +36,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next -#include_next <stdlib.h> +#include <stdlib.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/cstring +++ b/libstdc++-v3/include/c/cstring -@@ -31,6 +31,6 @@ - - #pragma GCC system_header +@@ -36,7 +36,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next -#include_next <string.h> +#include <string.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/ctime +++ b/libstdc++-v3/include/c/ctime -@@ -31,6 +31,6 @@ - - #pragma GCC system_header +@@ -36,7 +36,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next -#include_next <time.h> +#include <time.h> - #endif + #pragma GCC diagnostic pop + --- a/libstdc++-v3/include/c/cuchar +++ b/libstdc++-v3/include/c/cuchar -@@ -39,7 +39,7 @@ +@@ -41,7 +41,7 @@ #include <cwchar> #if _GLIBCXX_USE_C11_UCHAR_CXX11 @@ -218,18 +230,18 @@ Signed-off-by: Keith Packard <keithp@keithp.com> #endif // C++11 --- a/libstdc++-v3/include/c/cwchar +++ b/libstdc++-v3/include/c/cwchar -@@ -36,7 +36,7 @@ - #include <ctime> +@@ -41,7 +41,7 @@ + #pragma GCC diagnostic ignored "-Wpedantic" // include_next #if _GLIBCXX_HAVE_WCHAR_H -#include_next <wchar.h> +#include <wchar.h> #endif - // Need to do a bit of trickery here with mbstate_t as char_traits + #pragma GCC diagnostic pop --- a/libstdc++-v3/include/c/cwctype +++ b/libstdc++-v3/include/c/cwctype -@@ -34,7 +34,7 @@ +@@ -39,7 +39,7 @@ #include <bits/c++config.h> #if _GLIBCXX_HAVE_WCTYPE_H @@ -237,26 +249,26 @@ Signed-off-by: Keith Packard <keithp@keithp.com> +#include <wctype.h> #endif - #endif + #pragma GCC diagnostic pop --- a/libstdc++-v3/include/c_global/cmath +++ b/libstdc++-v3/include/c_global/cmath -@@ -44,7 +44,7 @@ - #include <bits/cpp_type_traits.h> - #include <ext/type_traits.h> +@@ -52,7 +52,7 @@ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next #define _GLIBCXX_INCLUDE_NEXT_C_HEADERS -#include_next <math.h> +#include <math.h> #undef _GLIBCXX_INCLUDE_NEXT_C_HEADERS - #include <bits/std_abs.h> + #pragma GCC diagnostic pop --- a/libstdc++-v3/include/c_global/cstdlib +++ b/libstdc++-v3/include/c_global/cstdlib -@@ -76,7 +76,7 @@ - // Need to ensure this finds the C library's <stdlib.h> not a libstdc++ - // wrapper that might already be installed later in the include search path. +@@ -80,7 +80,7 @@ namespace std + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpedantic" // include_next #define _GLIBCXX_INCLUDE_NEXT_C_HEADERS -#include_next <stdlib.h> +#include <stdlib.h> #undef _GLIBCXX_INCLUDE_NEXT_C_HEADERS - #include <bits/std_abs.h> + #pragma GCC diagnostic pop diff --git a/packages/gcc/13.2.0/0005-Allow-default-libc-to-be-specified-to-configure.patch b/packages/gcc/15.1.0/0005-Allow-default-libc-to-be-specified-to-configure.patch index 47f56953..4dee0f38 100644 --- a/packages/gcc/13.2.0/0005-Allow-default-libc-to-be-specified-to-configure.patch +++ b/packages/gcc/15.1.0/0005-Allow-default-libc-to-be-specified-to-configure.patch @@ -21,7 +21,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> --- a/gcc/config.gcc +++ b/gcc/config.gcc -@@ -664,6 +664,8 @@ +@@ -696,6 +696,8 @@ esac # Common C libraries. tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4" @@ -30,7 +30,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> # 32-bit x86 processors supported by --with-arch=. Each processor # MUST be separated by exactly one space. x86_archs="athlon athlon-4 athlon-fx athlon-mp athlon-tbird \ -@@ -870,16 +872,16 @@ +@@ -912,16 +914,16 @@ case ${target} in esac case $target in *-*-*android*) @@ -51,7 +51,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> ;; esac # Assume that glibc or uClibc or Bionic are being used and so __cxa_atexit -@@ -988,7 +990,8 @@ +@@ -1036,7 +1038,8 @@ case ${target} in case ${enable_threads} in "" | yes | posix) thread_file='posix' ;; esac @@ -61,7 +61,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> ;; *-*-rdos*) use_gcc_stdint=wrap -@@ -1652,13 +1655,13 @@ +@@ -1747,13 +1750,13 @@ csky-*-*) case ${target} in csky-*-linux-gnu*) @@ -77,7 +77,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> default_use_cxa_atexit=no ;; *) -@@ -3038,7 +3041,7 @@ +@@ -3144,7 +3147,7 @@ powerpc*-wrs-vxworks7r*) tmake_file="${tmake_file} t-linux rs6000/t-linux64 rs6000/t-fprules rs6000/t-ppccomm" tmake_file="${tmake_file} rs6000/t-vxworks" @@ -86,7 +86,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> extra_objs="$extra_objs linux.o rs6000-linux.o" ;; powerpc-wrs-vxworks*) -@@ -5879,3 +5882,32 @@ +@@ -6161,3 +6164,32 @@ i[34567]86-*-* | x86_64-*-*) fi ;; esac @@ -121,7 +121,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> +esac --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -2502,6 +2502,10 @@ +@@ -2582,6 +2582,10 @@ if { { test x$host != x$target && test " fi AC_SUBST(inhibit_libc) diff --git a/packages/gcc/12.3.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch b/packages/gcc/15.1.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch index 727206b4..cd29b91c 100644 --- a/packages/gcc/12.3.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch +++ b/packages/gcc/15.1.0/0006-driver-Extend-getenv-function-to-allow-default-value.patch @@ -1,7 +1,7 @@ -From fff469f89d865ef3c15efe8e6b0511ea4d48603d Mon Sep 17 00:00:00 2001 +From fd6aa8e67aec185b0d84ba9551fd38c90c9d6d8a Mon Sep 17 00:00:00 2001 From: Keith Packard <keithp@keithp.com> Date: Fri, 26 Aug 2022 14:30:03 -0700 -Subject: [PATCH 6/6] driver: Extend 'getenv' function to allow default value +Subject: [PATCH] driver: Extend 'getenv' function to allow default value Right now, a missing environment variable provided to the 'getenv' function in a .specs file causes a fatal error. That makes writing a @@ -40,7 +40,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -33793,17 +33793,21 @@ +@@ -37564,17 +37564,21 @@ The following built-in spec functions ar @table @code @item @code{getenv} @@ -71,7 +71,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> The @code{if-exists} spec function takes one argument, an absolute --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -10167,12 +10167,20 @@ +@@ -10338,12 +10338,20 @@ getenv_spec_function (int argc, const ch char *ptr; size_t len; diff --git a/packages/gcc/13.2.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch b/packages/gcc/15.1.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch index 3a36594d..2f839fad 100644 --- a/packages/gcc/13.2.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch +++ b/packages/gcc/15.1.0/0007-Add-newlib-and-picolibc-as-default-C-library-choices.patch @@ -10,7 +10,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> --- a/gcc/config.gcc +++ b/gcc/config.gcc -@@ -662,7 +662,7 @@ +@@ -694,7 +694,7 @@ case ${target} in esac # Common C libraries. @@ -19,7 +19,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> default_libc="" -@@ -5896,6 +5896,15 @@ +@@ -6178,6 +6178,15 @@ bionic) musl) default_libc=LIBC_MUSL ;; diff --git a/packages/gcc/13.2.0/0008-Support-picolibc-targets.patch b/packages/gcc/15.1.0/0008-Support-picolibc-targets.patch index 0f8cc2f9..c52c68d5 100644 --- a/packages/gcc/13.2.0/0008-Support-picolibc-targets.patch +++ b/packages/gcc/15.1.0/0008-Support-picolibc-targets.patch @@ -13,7 +13,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> --- a/gcc/config.gcc +++ b/gcc/config.gcc -@@ -1116,6 +1116,17 @@ +@@ -1165,6 +1165,17 @@ case ${target} in ;; esac ;; diff --git a/packages/gcc/13.2.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch b/packages/gcc/15.1.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch index 57a22f98..483a2280 100644 --- a/packages/gcc/13.2.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch +++ b/packages/gcc/15.1.0/0009-gcc-Allow-g-to-work-differently-from-gcc.patch @@ -20,7 +20,7 @@ Signed-off-by: Keith Packard <keithp@keithp.com> --- a/gcc/cp/Make-lang.in +++ b/gcc/cp/Make-lang.in -@@ -77,7 +77,12 @@ +@@ -77,7 +77,12 @@ CFLAGS-cp/module.o += -DMODULE_VERSION=' endif # Create the compiler driver for g++. diff --git a/packages/gcc/15.1.0/0010-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch b/packages/gcc/15.1.0/0010-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch new file mode 100644 index 00000000..f5c3e1fd --- /dev/null +++ b/packages/gcc/15.1.0/0010-libgcc-Exclude-UCLIBC-from-GLIBC-thread-check.patch @@ -0,0 +1,30 @@ +From d901175d36221fbf79a0eb8305823b88243b829c Mon Sep 17 00:00:00 2001 +From: Chris Packham <chris.packham@alliedtelesis.co.nz> +Date: Thu, 7 Sep 2023 19:26:49 +1200 +Subject: [PATCH] libgcc: Exclude UCLIBC from GLIBC thread check + +UBLIBC defines __GLIBC__ but also marks __pthread_key_create() as +protected. Leading to link errors with newer binutils such as: + + ld.bfd: isl_test_cpp17.o: non-canonical reference to canonical protected function `__pthread_key_create' in x86_64-multilib-linux-uclibc/sysroot/lib64/libc.so.1 + ld.bfd: failed to set dynamic section sizes: bad value + +Add a condition on !__UCLIBC__ when selecting a symbol to detect pthread +usage so it picks the intended pthread_cancel(). + +Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> +--- + libgcc/gthr-posix.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/libgcc/gthr-posix.h ++++ b/libgcc/gthr-posix.h +@@ -270,7 +270,7 @@ __gthread_active_p (void) + library does not provide pthread_cancel, so we do use pthread_create + there (and interceptor libraries lose). */ + +-#ifdef __GLIBC__ ++#if defined(__GLIBC__) && !defined(__UCLIBC__) + __gthrw2(__gthrw_(__pthread_key_create), + __pthread_key_create, + pthread_key_create) diff --git a/packages/gcc/15.1.0/chksum b/packages/gcc/15.1.0/chksum new file mode 100644 index 00000000..b82ef46d --- /dev/null +++ b/packages/gcc/15.1.0/chksum @@ -0,0 +1,8 @@ +md5 gcc-15.1.0.tar.gz 78e5ad8598b1b246962ceab014345bfd +sha1 gcc-15.1.0.tar.gz 1ce26a0f2ca9bdf7d4302d26d05626e14a4464d7 +sha256 gcc-15.1.0.tar.gz 51b9919ea69c980d7a381db95d4be27edf73b21254eb13d752a08003b4d013b1 +sha512 gcc-15.1.0.tar.gz e8fd551e2c6209a4e5fa25ae66cfaef7ce4823bd22481a573626413dc24026680bebf4d960dbab307b3d5045f8568b2d2dec2fe14084c91e48316c36e0edefd8 +md5 gcc-15.1.0.tar.xz e55d13c55428bca27b4d2ea02f883135 +sha1 gcc-15.1.0.tar.xz 42017f9c1b53a345ea1214c32012609b29dba5a2 +sha256 gcc-15.1.0.tar.xz e2b09ec21660f01fecffb715e0120265216943f038d0e48a9868713e54f06cea +sha512 gcc-15.1.0.tar.xz ddd35ca6c653dffa88f7c7ef9ee4cd806e156e0f3b30f4d63e75a8363361285cd566ee73127734cde6a934611de815bee3e32e24bfd2e0ab9f7ff35c929821c1 diff --git a/packages/gcc/15.1.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch b/packages/gcc/15.1.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch new file mode 100644 index 00000000..4bbd0c68 --- /dev/null +++ b/packages/gcc/15.1.0/experimental/0001-picolibc-Add-custom-spec-file-fragments-for-using-pi.patch @@ -0,0 +1,127 @@ +From b0f9ac365f91952f6f920c8e6aa4ddb819f47cc8 Mon Sep 17 00:00:00 2001 +From: Keith Packard <keithp@keithp.com> +Date: Tue, 23 Aug 2022 22:13:08 -0700 +Subject: [PATCH] picolibc: Add custom spec file fragments for using + picolibc + +The '--oslib=' option allows targets to insert an OS library after the +C library in the LIB_PATH spec file fragment. This library maps a few +POSIX APIs used by picolibc to underlying system capabilities. + +The '--crt0=' option allows targets to use an alternate crt0 in place +of the usual one as provided by Picolibc. + +For example, picolibc provides 'libsemihost' and 'crt0-semihost.o' on +various targets which maps some POSIX APIs to semihosting capabilities +and signals the semihosting environment when 'main' returns. These +would be used by specifying --oslib=semihost --crt0=semihost. + +This patch also takes advantage of the IN_GPP conditional when +building g++ to elide exception handling contents from the executable +when not linking with the g++ driver. + +Signed-off-by: Keith Packard <keithp@keithp.com> +--- + gcc/config.gcc | 7 +++++++ + gcc/config/picolibc.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ + gcc/config/picolibc.opt | 33 +++++++++++++++++++++++++++++++++ + 3 files changed, 84 insertions(+) + create mode 100644 gcc/config/picolibc.h + create mode 100644 gcc/config/picolibc.opt + +--- a/gcc/config.gcc ++++ b/gcc/config.gcc +@@ -6213,3 +6213,10 @@ + tm_defines="$tm_defines DEFAULT_LIBC=$default_libc" + ;; + esac ++ ++case "$default_libc" in ++ LIBC_PICOLIBC) ++ extra_options="${extra_options} picolibc.opt" ++ tm_file="${tm_file} picolibc.h" ++ ;; ++esac +--- /dev/null ++++ b/gcc/config/picolibc.h +@@ -0,0 +1,44 @@ ++/* Configuration common to all targets running Picolibc. ++ Copyright (C) 2023 Free Software Foundation, Inc. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ Under Section 7 of GPL version 3, you are granted additional ++ permissions described in the GCC Runtime Library Exception, version ++ 3.1, as published by the Free Software Foundation. ++ ++ You should have received a copy of the GNU General Public License and ++ a copy of the GCC Runtime Library Exception along with this program; ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ <http://www.gnu.org/licenses/>. */ ++ ++#ifdef IN_GPP ++#define PICOLIBC_LD "picolibcpp.ld" ++#define PICOLIBC_BEGIN " crtbegin%O%s" ++#define PICOLIBC_END "crtend%O%s" ++#else ++#define PICOLIBC_LD "picolibc.ld" ++#define PICOLIBC_BEGIN "" ++#define PICOLIBC_END "" ++#endif ++ ++#undef LIB_SPEC ++#define LIB_SPEC "%{!T:-T" PICOLIBC_LD "} --start-group -lc %{-oslib=*:-l%*} %(libgcc) --end-group" ++ ++#undef STARTFILE_SPEC ++#define STARTFILE_SPEC "%{-crt0=*:crt0-%*%O%s; :crt0%O%s}" PICOLIBC_BEGIN ++ ++#undef ENDFILE_SPEC ++#define ENDFILE_SPEC PICOLIBC_END ++ ++#define EH_TABLES_CAN_BE_READ_ONLY 1 +--- /dev/null ++++ b/gcc/config/picolibc.opt +@@ -0,0 +1,33 @@ ++; Processor-independent options for picolibc. ++; ++; Copyright (C) 2022 Free Software Foundation, Inc. ++; ++; This file is part of GCC. ++; ++; GCC is free software; you can redistribute it and/or modify it under ++; the terms of the GNU General Public License as published by the Free ++; Software Foundation; either version 3, or (at your option) any later ++; version. ++; ++; GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++; WARRANTY; without even the implied warranty of MERCHANTABILITY or ++; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++; for more details. ++; ++; You should have received a copy of the GNU General Public License ++; along with GCC; see the file COPYING3. If not see ++; <http://www.gnu.org/licenses/>. ++ ++-oslib ++Driver Separate Alias(-oslib=) ++ ++-oslib= ++Driver Joined ++Specify an OS support library to load after libc. ++ ++-crt0 ++Driver Separate Alias(-crt0=) ++ ++-crt0= ++Driver Joined ++Specify an alternate startup file. diff --git a/packages/gcc/15.1.0/version.desc b/packages/gcc/15.1.0/version.desc new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/packages/gcc/15.1.0/version.desc diff --git a/packages/gcc/7.5.0/0031-riscv-Add-.type-and-.size-directives-to-riscv-libgcc-funct.patch b/packages/gcc/7.5.0/0031-riscv-Add-.type-and-.size-directives-to-riscv-libgcc-funct.patch new file mode 100644 index 00000000..e613c628 --- /dev/null +++ b/packages/gcc/7.5.0/0031-riscv-Add-.type-and-.size-directives-to-riscv-libgcc-funct.patch @@ -0,0 +1,602 @@ +From 3a4c600f389e8c5aa6dcbd6cd14bd0c546af0bb2 Mon Sep 17 00:00:00 2001 +From: Jim Wilson <jimw@sifive.com> +Date: Sat, 9 Dec 2017 03:00:57 +0000 +Subject: [PATCH] Add .type and .size directives to riscv libgcc functions. + + libgcc/ + * config/riscv/div.S: Use FUNC_* macros. + * config/riscv/muldi3.S, config/riscv/multi3.S: Likewise + * config/riscv/save-restore.S: Likewise. + * config/riscv/riscv-asm.h: New. + +From-SVN: r255521 +--- + libgcc/ChangeLog | 7 ++ + libgcc/config/riscv/div.S | 33 ++--- + libgcc/config/riscv/muldi3.S | 6 +- + libgcc/config/riscv/multi3.S | 13 +- + libgcc/config/riscv/riscv-asm.h | 35 ++++++ + libgcc/config/riscv/save-restore.S | 190 ++++++++++++++++------------- + 6 files changed, 182 insertions(+), 102 deletions(-) + create mode 100644 libgcc/config/riscv/riscv-asm.h + +diff --git a/libgcc/config/riscv/div.S b/libgcc/config/riscv/div.S +index 63d542e846..4366c5ce1d 100644 +--- a/libgcc/config/riscv/div.S ++++ b/libgcc/config/riscv/div.S +@@ -23,6 +23,8 @@ a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + ++#include "riscv-asm.h" ++ + .text + .align 2 + +@@ -33,8 +35,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + # define __divdi3 __divsi3 + # define __moddi3 __modsi3 + #else +- .globl __udivsi3 +-__udivsi3: ++FUNC_BEGIN (__udivsi3) + /* Compute __udivdi3(a0 << 32, a1 << 32); cast result to uint32_t. */ + sll a0, a0, 32 + sll a1, a1, 32 +@@ -42,9 +43,9 @@ __udivsi3: + jal __udivdi3 + sext.w a0, a0 + jr t0 ++FUNC_END (__udivsi3) + +- .globl __umodsi3 +-__umodsi3: ++FUNC_BEGIN (__umodsi3) + /* Compute __udivdi3((uint32_t)a0, (uint32_t)a1); cast a1 to uint32_t. */ + sll a0, a0, 32 + sll a1, a1, 32 +@@ -54,25 +55,22 @@ __umodsi3: + jal __udivdi3 + sext.w a0, a1 + jr t0 ++FUNC_END (__umodsi3) + +- .globl __modsi3 +- __modsi3 = __moddi3 ++FUNC_ALIAS (__modsi3, __moddi3) + +- .globl __divsi3 +-__divsi3: ++FUNC_BEGIN( __divsi3) + /* Check for special case of INT_MIN/-1. Otherwise, fall into __divdi3. */ + li t0, -1 + beq a1, t0, .L20 + #endif + +- .globl __divdi3 +-__divdi3: ++FUNC_BEGIN (__divdi3) + bltz a0, .L10 + bltz a1, .L11 + /* Since the quotient is positive, fall into __udivdi3. */ + +- .globl __udivdi3 +-__udivdi3: ++FUNC_BEGIN (__udivdi3) + mv a2, a1 + mv a1, a0 + li a0, -1 +@@ -96,14 +94,15 @@ __udivdi3: + bnez a3, .L3 + .L5: + ret ++FUNC_END (__udivdi3) + +- .globl __umoddi3 +-__umoddi3: ++FUNC_BEGIN (__umoddi3) + /* Call __udivdi3(a0, a1), then return the remainder, which is in a1. */ + move t0, ra + jal __udivdi3 + move a0, a1 + jr t0 ++FUNC_END (__umoddi3) + + /* Handle negative arguments to __divdi3. */ + .L10: +@@ -118,9 +117,9 @@ __umoddi3: + jal __udivdi3 + neg a0, a0 + jr t0 ++FUNC_END (__divdi3) + +- .globl __moddi3 +-__moddi3: ++FUNC_BEGIN (__moddi3) + move t0, ra + bltz a1, .L31 + bltz a0, .L32 +@@ -136,6 +135,7 @@ __moddi3: + jal __udivdi3 /* The dividend is hella negative. */ + neg a0, a1 + jr t0 ++FUNC_END (__moddi3) + + #if __riscv_xlen == 64 + /* continuation of __divsi3 */ +@@ -143,4 +143,5 @@ __moddi3: + sll t0, t0, 31 + bne a0, t0, __divdi3 + ret ++FUNC_END (__divsi3) + #endif +diff --git a/libgcc/config/riscv/muldi3.S b/libgcc/config/riscv/muldi3.S +index eb3d9b0df3..7c07878eea 100644 +--- a/libgcc/config/riscv/muldi3.S ++++ b/libgcc/config/riscv/muldi3.S +@@ -23,6 +23,8 @@ a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + ++#include "riscv-asm.h" ++ + .text + .align 2 + +@@ -31,8 +33,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + # define __muldi3 __mulsi3 + #endif + +- .globl __muldi3 +-__muldi3: ++FUNC_BEGIN (__muldi3) + mv a2, a0 + li a0, 0 + .L1: +@@ -44,3 +45,4 @@ __muldi3: + slli a2, a2, 1 + bnez a1, .L1 + ret ++FUNC_END (__muldi3) +diff --git a/libgcc/config/riscv/multi3.S b/libgcc/config/riscv/multi3.S +index 4d454e6501..a3b89c6520 100644 +--- a/libgcc/config/riscv/multi3.S ++++ b/libgcc/config/riscv/multi3.S +@@ -23,6 +23,8 @@ a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + ++#include "riscv-asm.h" ++ + .text + .align 2 + +@@ -31,8 +33,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + # define __multi3 __muldi3 + #endif + +- .globl __multi3 +-__multi3: ++FUNC_BEGIN (__multi3) + + #if __riscv_xlen == 32 + /* Our RV64 64-bit routines are equivalent to our RV32 32-bit routines. */ +@@ -79,3 +80,11 @@ __multi3: + mv a0, t2 + mv a1, t4 + jr t0 ++ ++#if __riscv_xlen == 32 ++/* Our RV64 64-bit routines are equivalent to our RV32 32-bit routines. */ ++# undef __muldi3 ++#endif ++ ++FUNC_END (__multi3) ++ +diff --git a/libgcc/config/riscv/riscv-asm.h b/libgcc/config/riscv/riscv-asm.h +new file mode 100644 +index 0000000000..fbfe5f0dbf +--- /dev/null ++++ b/libgcc/config/riscv/riscv-asm.h +@@ -0,0 +1,35 @@ ++/* Copyright (C) 2017 Free Software Foundation, Inc. ++ ++This file is free software; you can redistribute it and/or modify it ++under the terms of the GNU General Public License as published by the ++Free Software Foundation; either version 3, or (at your option) any ++later version. ++ ++This file is distributed in the hope that it will be useful, but ++WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++General Public License for more details. ++ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++You should have received a copy of the GNU General Public License and ++a copy of the GCC Runtime Library Exception along with this program; ++see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++<http://www.gnu.org/licenses/>. */ ++ ++#define FUNC_TYPE(X) .type X,@function ++#define FUNC_SIZE(X) .size X,.-X ++ ++#define FUNC_BEGIN(X) \ ++ .globl X; \ ++ FUNC_TYPE (X); \ ++X: ++ ++#define FUNC_END(X) \ ++ FUNC_SIZE(X) ++ ++#define FUNC_ALIAS(X,Y) \ ++ .globl X; \ ++ X = Y +diff --git a/libgcc/config/riscv/save-restore.S b/libgcc/config/riscv/save-restore.S +index 2073a73089..c2f1740f42 100644 +--- a/libgcc/config/riscv/save-restore.S ++++ b/libgcc/config/riscv/save-restore.S +@@ -23,39 +23,13 @@ a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +- .text ++#include "riscv-asm.h" + +- .globl __riscv_save_12 +- .globl __riscv_save_11 +- .globl __riscv_save_10 +- .globl __riscv_save_9 +- .globl __riscv_save_8 +- .globl __riscv_save_7 +- .globl __riscv_save_6 +- .globl __riscv_save_5 +- .globl __riscv_save_4 +- .globl __riscv_save_3 +- .globl __riscv_save_2 +- .globl __riscv_save_1 +- .globl __riscv_save_0 +- +- .globl __riscv_restore_12 +- .globl __riscv_restore_11 +- .globl __riscv_restore_10 +- .globl __riscv_restore_9 +- .globl __riscv_restore_8 +- .globl __riscv_restore_7 +- .globl __riscv_restore_6 +- .globl __riscv_restore_5 +- .globl __riscv_restore_4 +- .globl __riscv_restore_3 +- .globl __riscv_restore_2 +- .globl __riscv_restore_1 +- .globl __riscv_restore_0 ++ .text + + #if __riscv_xlen == 64 + +-__riscv_save_12: ++FUNC_BEGIN (__riscv_save_12) + .cfi_startproc + # __riscv_save_* routine use t0/x5 as return address + .cfi_return_column 5 +@@ -66,8 +40,8 @@ __riscv_save_12: + .cfi_offset 27, -104 + j .Ls10 + +-__riscv_save_11: +-__riscv_save_10: ++FUNC_BEGIN (__riscv_save_11) ++FUNC_BEGIN (__riscv_save_10) + .cfi_restore 27 + addi sp, sp, -112 + .cfi_def_cfa_offset 112 +@@ -79,8 +53,8 @@ __riscv_save_10: + .cfi_offset 25, -88 + j .Ls8 + +-__riscv_save_9: +-__riscv_save_8: ++FUNC_BEGIN (__riscv_save_9) ++FUNC_BEGIN (__riscv_save_8) + .cfi_restore 25 + .cfi_restore 26 + .cfi_restore 27 +@@ -94,8 +68,8 @@ __riscv_save_8: + .cfi_offset 23, -72 + j .Ls6 + +-__riscv_save_7: +-__riscv_save_6: ++FUNC_BEGIN (__riscv_save_7) ++FUNC_BEGIN (__riscv_save_6) + .cfi_restore 23 + .cfi_restore 24 + .cfi_restore 25 +@@ -111,8 +85,8 @@ __riscv_save_6: + .cfi_offset 21, -56 + j .Ls4 + +-__riscv_save_5: +-__riscv_save_4: ++FUNC_BEGIN (__riscv_save_5) ++FUNC_BEGIN (__riscv_save_4) + .cfi_restore 21 + .cfi_restore 22 + .cfi_restore 24 +@@ -133,8 +107,8 @@ __riscv_save_4: + .cfi_offset 19, -40 + j .Ls2 + +-__riscv_save_3: +-__riscv_save_2: ++FUNC_BEGIN (__riscv_save_3) ++FUNC_BEGIN (__riscv_save_2) + .cfi_restore 19 + .cfi_restore 20 + .cfi_restore 21 +@@ -164,9 +138,20 @@ __riscv_save_2: + sub sp, sp, t1 + jr t0 + .cfi_endproc +- +-__riscv_save_1: +-__riscv_save_0: ++FUNC_END (__riscv_save_12) ++FUNC_END (__riscv_save_11) ++FUNC_END (__riscv_save_10) ++FUNC_END (__riscv_save_9) ++FUNC_END (__riscv_save_8) ++FUNC_END (__riscv_save_7) ++FUNC_END (__riscv_save_6) ++FUNC_END (__riscv_save_5) ++FUNC_END (__riscv_save_4) ++FUNC_END (__riscv_save_3) ++FUNC_END (__riscv_save_2) ++ ++FUNC_BEGIN (__riscv_save_1) ++FUNC_BEGIN (__riscv_save_0) + .cfi_startproc + # __riscv_save_* routine use t0/x5 as return address + .cfi_return_column 5 +@@ -178,8 +163,10 @@ __riscv_save_0: + .cfi_offset 1, -8 + jr t0 + .cfi_endproc ++FUNC_END (__riscv_save_1) ++FUNC_END (__riscv_save_0) + +-__riscv_restore_12: ++FUNC_BEGIN (__riscv_restore_12) + .cfi_startproc + .cfi_def_cfa_offset 112 + .cfi_offset 27, -104 +@@ -199,8 +186,8 @@ __riscv_restore_12: + .cfi_restore 27 + addi sp, sp, 16 + +-__riscv_restore_11: +-__riscv_restore_10: ++FUNC_BEGIN (__riscv_restore_11) ++FUNC_BEGIN (__riscv_restore_10) + .cfi_restore 27 + .cfi_def_cfa_offset 96 + ld s10, 0(sp) +@@ -209,8 +196,8 @@ __riscv_restore_10: + .cfi_restore 25 + addi sp, sp, 16 + +-__riscv_restore_9: +-__riscv_restore_8: ++FUNC_BEGIN (__riscv_restore_9) ++FUNC_BEGIN (__riscv_restore_8) + .cfi_restore 25 + .cfi_restore 26 + .cfi_restore 27 +@@ -221,8 +208,8 @@ __riscv_restore_8: + .cfi_restore 23 + addi sp, sp, 16 + +-__riscv_restore_7: +-__riscv_restore_6: ++FUNC_BEGIN (__riscv_restore_7) ++FUNC_BEGIN (__riscv_restore_6) + .cfi_restore 23 + .cfi_restore 24 + .cfi_restore 25 +@@ -235,8 +222,8 @@ __riscv_restore_6: + .cfi_restore 21 + addi sp, sp, 16 + +-__riscv_restore_5: +-__riscv_restore_4: ++FUNC_BEGIN (__riscv_restore_5) ++FUNC_BEGIN (__riscv_restore_4) + .cfi_restore 21 + .cfi_restore 22 + .cfi_restore 23 +@@ -251,8 +238,8 @@ __riscv_restore_4: + .cfi_restore 19 + addi sp, sp, 16 + +-__riscv_restore_3: +-__riscv_restore_2: ++FUNC_BEGIN (__riscv_restore_3) ++FUNC_BEGIN (__riscv_restore_2) + .cfi_restore 19 + .cfi_restore 20 + .cfi_restore 21 +@@ -269,8 +256,8 @@ __riscv_restore_2: + .cfi_restore 9 + addi sp, sp, 16 + +-__riscv_restore_1: +-__riscv_restore_0: ++FUNC_BEGIN (__riscv_restore_1) ++FUNC_BEGIN (__riscv_restore_0) + .cfi_restore 9 + .cfi_restore 18 + .cfi_restore 19 +@@ -291,10 +278,23 @@ __riscv_restore_0: + .cfi_def_cfa_offset 0 + ret + .cfi_endproc ++FUNC_END (__riscv_restore_12) ++FUNC_END (__riscv_restore_11) ++FUNC_END (__riscv_restore_10) ++FUNC_END (__riscv_restore_9) ++FUNC_END (__riscv_restore_8) ++FUNC_END (__riscv_restore_7) ++FUNC_END (__riscv_restore_6) ++FUNC_END (__riscv_restore_5) ++FUNC_END (__riscv_restore_4) ++FUNC_END (__riscv_restore_3) ++FUNC_END (__riscv_restore_2) ++FUNC_END (__riscv_restore_1) ++FUNC_END (__riscv_restore_0) + + #else + +-__riscv_save_12: ++FUNC_BEGIN (__riscv_save_12) + .cfi_startproc + # __riscv_save_* routine use t0/x5 as return address + .cfi_return_column 5 +@@ -305,10 +305,10 @@ __riscv_save_12: + .cfi_offset 27, -52 + j .Ls10 + +-__riscv_save_11: +-__riscv_save_10: +-__riscv_save_9: +-__riscv_save_8: ++FUNC_BEGIN (__riscv_save_11) ++FUNC_BEGIN (__riscv_save_10) ++FUNC_BEGIN (__riscv_save_9) ++FUNC_BEGIN (__riscv_save_8) + .cfi_restore 27 + addi sp, sp, -64 + .cfi_def_cfa_offset 64 +@@ -324,10 +324,10 @@ __riscv_save_8: + .cfi_offset 23, -36 + j .Ls6 + +-__riscv_save_7: +-__riscv_save_6: +-__riscv_save_5: +-__riscv_save_4: ++FUNC_BEGIN (__riscv_save_7) ++FUNC_BEGIN (__riscv_save_6) ++FUNC_BEGIN (__riscv_save_5) ++FUNC_BEGIN (__riscv_save_4) + .cfi_restore 23 + .cfi_restore 24 + .cfi_restore 25 +@@ -358,11 +358,20 @@ __riscv_save_4: + sub sp, sp, t1 + jr t0 + .cfi_endproc +- +-__riscv_save_3: +-__riscv_save_2: +-__riscv_save_1: +-__riscv_save_0: ++FUNC_END (__riscv_save_12) ++FUNC_END (__riscv_save_11) ++FUNC_END (__riscv_save_10) ++FUNC_END (__riscv_save_9) ++FUNC_END (__riscv_save_8) ++FUNC_END (__riscv_save_7) ++FUNC_END (__riscv_save_6) ++FUNC_END (__riscv_save_5) ++FUNC_END (__riscv_save_4) ++ ++FUNC_BEGIN (__riscv_save_3) ++FUNC_BEGIN (__riscv_save_2) ++FUNC_BEGIN (__riscv_save_1) ++FUNC_BEGIN (__riscv_save_0) + .cfi_startproc + # __riscv_save_* routine use t0/x5 as return address + .cfi_return_column 5 +@@ -377,8 +386,12 @@ __riscv_save_0: + .cfi_offset 1, -4 + jr t0 + .cfi_endproc ++FUNC_END (__riscv_save_3) ++FUNC_END (__riscv_save_2) ++FUNC_END (__riscv_save_1) ++FUNC_END (__riscv_save_0) + +-__riscv_restore_12: ++FUNC_BEGIN (__riscv_restore_12) + .cfi_startproc + .cfi_def_cfa_offset 64 + .cfi_offset 27, -52 +@@ -398,10 +411,10 @@ __riscv_restore_12: + .cfi_restore 27 + addi sp, sp, 16 + +-__riscv_restore_11: +-__riscv_restore_10: +-__riscv_restore_9: +-__riscv_restore_8: ++FUNC_BEGIN (__riscv_restore_11) ++FUNC_BEGIN (__riscv_restore_10) ++FUNC_BEGIN (__riscv_restore_9) ++FUNC_BEGIN (__riscv_restore_8) + .cfi_restore 27 + .cfi_def_cfa_offset 48 + lw s10, 0(sp) +@@ -414,10 +427,10 @@ __riscv_restore_8: + .cfi_restore 23 + addi sp, sp, 16 + +-__riscv_restore_7: +-__riscv_restore_6: +-__riscv_restore_5: +-__riscv_restore_4: ++FUNC_BEGIN (__riscv_restore_7) ++FUNC_BEGIN (__riscv_restore_6) ++FUNC_BEGIN (__riscv_restore_5) ++FUNC_BEGIN (__riscv_restore_4) + .cfi_restore 23 + .cfi_restore 24 + .cfi_restore 25 +@@ -434,10 +447,10 @@ __riscv_restore_4: + .cfi_restore 19 + addi sp, sp, 16 + +-__riscv_restore_3: +-__riscv_restore_2: +-__riscv_restore_1: +-__riscv_restore_0: ++FUNC_BEGIN (__riscv_restore_3) ++FUNC_BEGIN (__riscv_restore_2) ++FUNC_BEGIN (__riscv_restore_1) ++FUNC_BEGIN (__riscv_restore_0) + .cfi_restore 19 + .cfi_restore 20 + .cfi_restore 21 +@@ -459,5 +472,18 @@ __riscv_restore_0: + .cfi_def_cfa_offset 0 + ret + .cfi_endproc ++FUNC_END (__riscv_restore_12) ++FUNC_END (__riscv_restore_11) ++FUNC_END (__riscv_restore_10) ++FUNC_END (__riscv_restore_9) ++FUNC_END (__riscv_restore_8) ++FUNC_END (__riscv_restore_7) ++FUNC_END (__riscv_restore_6) ++FUNC_END (__riscv_restore_5) ++FUNC_END (__riscv_restore_4) ++FUNC_END (__riscv_restore_3) ++FUNC_END (__riscv_restore_2) ++FUNC_END (__riscv_restore_1) ++FUNC_END (__riscv_restore_0) + + #endif +-- +2.49.0 + diff --git a/packages/gcc/7.5.0/0032-riscv-Make-__divdi3-handle-div-by-zero-same-as-hard.patch b/packages/gcc/7.5.0/0032-riscv-Make-__divdi3-handle-div-by-zero-same-as-hard.patch new file mode 100644 index 00000000..47c25104 --- /dev/null +++ b/packages/gcc/7.5.0/0032-riscv-Make-__divdi3-handle-div-by-zero-same-as-hard.patch @@ -0,0 +1,40 @@ +From 4013baf99c38f7bca06a51f8301e8fb195ccfa33 Mon Sep 17 00:00:00 2001 +From: Jim Wilson <jimw@sifive.com> +Date: Tue, 2 Jun 2020 11:19:39 -0700 +Subject: [PATCH] RISC-V: Make __divdi3 handle div by zero same as hardware. + +The ISA manual specifies that divide by zero always returns -1 as the result. +We were failing to do that when the dividend was negative. + +Original patch from Virginie Moser. + + libgcc/ + * config/riscv/div.S (__divdi3): For negative arguments, change bgez + to bgtz. +--- + libgcc/config/riscv/div.S | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/libgcc/config/riscv/div.S b/libgcc/config/riscv/div.S +index 151f8e273a..17234324c1 100644 +--- a/libgcc/config/riscv/div.S ++++ b/libgcc/config/riscv/div.S +@@ -107,10 +107,12 @@ FUNC_END (__umoddi3) + /* Handle negative arguments to __divdi3. */ + .L10: + neg a0, a0 +- bgez a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */ ++ /* Zero is handled as a negative so that the result will not be inverted. */ ++ bgtz a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */ ++ + neg a1, a1 +- j __udivdi3 /* Compute __udivdi3(-a0, -a1). */ +-.L11: /* Compute __udivdi3(a0, -a1), then negate the result. */ ++ j __udivdi3 /* Compute __udivdi3(-a0, -a1). */ ++.L11: /* Compute __udivdi3(a0, -a1), then negate the result. */ + neg a1, a1 + .L12: + move t0, ra +-- +2.49.0 + diff --git a/packages/gcc/7.5.0/0033-riscv-jal-cannot-refer-to-a-default-visibility-symb.patch b/packages/gcc/7.5.0/0033-riscv-jal-cannot-refer-to-a-default-visibility-symb.patch new file mode 100644 index 00000000..1422c69d --- /dev/null +++ b/packages/gcc/7.5.0/0033-riscv-jal-cannot-refer-to-a-default-visibility-symb.patch @@ -0,0 +1,120 @@ +From 45116f342057b7facecd3d05c2091ce3a77eda59 Mon Sep 17 00:00:00 2001 +From: Nelson Chu <nelson.chu@sifive.com> +Date: Mon, 29 Nov 2021 04:48:20 -0800 +Subject: [PATCH] RISC-V: jal cannot refer to a default visibility symbol for + shared object. + +This is the original binutils bugzilla report, +https://sourceware.org/bugzilla/show_bug.cgi?id=28509 + +And this is the first version of the proposed binutils patch, +https://sourceware.org/pipermail/binutils/2021-November/118398.html + +After applying the binutils patch, I get the the unexpected error when +building libgcc, + +/scratch/nelsonc/riscv-gnu-toolchain/riscv-gcc/libgcc/config/riscv/div.S:42: +/scratch/nelsonc/build-upstream/rv64gc-linux/build-install/riscv64-unknown-linux-gnu/bin/ld: relocation R_RISCV_JAL against `__udivdi3' which may bind externally can not be used when making a shared object; recompile with -fPIC + +Therefore, this patch add an extra hidden alias symbol for __udivdi3, and +then use HIDDEN_JUMPTARGET to target a non-preemptible symbol instead. +The solution is similar to glibc as follows, +https://sourceware.org/git/?p=glibc.git;a=commit;h=68389203832ab39dd0dbaabbc4059e7fff51c29b + +libgcc/ChangeLog: + + * config/riscv/div.S: Add the hidden alias symbol for __udivdi3, and + then use HIDDEN_JUMPTARGET to target it since it is non-preemptible. + * config/riscv/riscv-asm.h: Added new macros HIDDEN_JUMPTARGET and + HIDDEN_DEF. +--- + libgcc/config/riscv/div.S | 15 ++++++++------- + libgcc/config/riscv/riscv-asm.h | 6 ++++++ + 2 files changed, 14 insertions(+), 7 deletions(-) + +diff --git a/libgcc/config/riscv/div.S b/libgcc/config/riscv/div.S +index c9bd7879c1..723c3b82e4 100644 +--- a/libgcc/config/riscv/div.S ++++ b/libgcc/config/riscv/div.S +@@ -40,7 +40,7 @@ FUNC_BEGIN (__udivsi3) + sll a0, a0, 32 + sll a1, a1, 32 + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + sext.w a0, a0 + jr t0 + FUNC_END (__udivsi3) +@@ -52,7 +52,7 @@ FUNC_BEGIN (__umodsi3) + srl a0, a0, 32 + srl a1, a1, 32 + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + sext.w a0, a1 + jr t0 + FUNC_END (__umodsi3) +@@ -95,11 +95,12 @@ FUNC_BEGIN (__udivdi3) + .L5: + ret + FUNC_END (__udivdi3) ++HIDDEN_DEF (__udivdi3) + + FUNC_BEGIN (__umoddi3) + /* Call __udivdi3(a0, a1), then return the remainder, which is in a1. */ + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + move a0, a1 + jr t0 + FUNC_END (__umoddi3) +@@ -111,12 +112,12 @@ FUNC_END (__umoddi3) + bgtz a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */ + + neg a1, a1 +- j __udivdi3 /* Compute __udivdi3(-a0, -a1). */ ++ j HIDDEN_JUMPTARGET(__udivdi3) /* Compute __udivdi3(-a0, -a1). */ + .L11: /* Compute __udivdi3(a0, -a1), then negate the result. */ + neg a1, a1 + .L12: + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + neg a0, a0 + jr t0 + FUNC_END (__divdi3) +@@ -126,7 +127,7 @@ FUNC_BEGIN (__moddi3) + bltz a1, .L31 + bltz a0, .L32 + .L30: +- jal __udivdi3 /* The dividend is not negative. */ ++ jal HIDDEN_JUMPTARGET(__udivdi3) /* The dividend is not negative. */ + move a0, a1 + jr t0 + .L31: +@@ -134,7 +135,7 @@ FUNC_BEGIN (__moddi3) + bgez a0, .L30 + .L32: + neg a0, a0 +- jal __udivdi3 /* The dividend is hella negative. */ ++ jal HIDDEN_JUMPTARGET(__udivdi3) /* The dividend is hella negative. */ + neg a0, a1 + jr t0 + FUNC_END (__moddi3) +diff --git a/libgcc/config/riscv/riscv-asm.h b/libgcc/config/riscv/riscv-asm.h +index 8550707a4a..96dd85b0df 100644 +--- a/libgcc/config/riscv/riscv-asm.h ++++ b/libgcc/config/riscv/riscv-asm.h +@@ -33,3 +33,9 @@ X: + #define FUNC_ALIAS(X,Y) \ + .globl X; \ + X = Y ++ ++#define CONCAT1(a, b) CONCAT2(a, b) ++#define CONCAT2(a, b) a ## b ++#define HIDDEN_JUMPTARGET(X) CONCAT1(__hidden_, X) ++#define HIDDEN_DEF(X) FUNC_ALIAS(HIDDEN_JUMPTARGET(X), X); \ ++ .hidden HIDDEN_JUMPTARGET(X) +-- +2.49.0 + diff --git a/packages/gcc/8.5.0/0033-riscv-Make-__divdi3-handle-div-by-zero-same-as-hard.patch b/packages/gcc/8.5.0/0033-riscv-Make-__divdi3-handle-div-by-zero-same-as-hard.patch new file mode 100644 index 00000000..47c25104 --- /dev/null +++ b/packages/gcc/8.5.0/0033-riscv-Make-__divdi3-handle-div-by-zero-same-as-hard.patch @@ -0,0 +1,40 @@ +From 4013baf99c38f7bca06a51f8301e8fb195ccfa33 Mon Sep 17 00:00:00 2001 +From: Jim Wilson <jimw@sifive.com> +Date: Tue, 2 Jun 2020 11:19:39 -0700 +Subject: [PATCH] RISC-V: Make __divdi3 handle div by zero same as hardware. + +The ISA manual specifies that divide by zero always returns -1 as the result. +We were failing to do that when the dividend was negative. + +Original patch from Virginie Moser. + + libgcc/ + * config/riscv/div.S (__divdi3): For negative arguments, change bgez + to bgtz. +--- + libgcc/config/riscv/div.S | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/libgcc/config/riscv/div.S b/libgcc/config/riscv/div.S +index 151f8e273a..17234324c1 100644 +--- a/libgcc/config/riscv/div.S ++++ b/libgcc/config/riscv/div.S +@@ -107,10 +107,12 @@ FUNC_END (__umoddi3) + /* Handle negative arguments to __divdi3. */ + .L10: + neg a0, a0 +- bgez a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */ ++ /* Zero is handled as a negative so that the result will not be inverted. */ ++ bgtz a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */ ++ + neg a1, a1 +- j __udivdi3 /* Compute __udivdi3(-a0, -a1). */ +-.L11: /* Compute __udivdi3(a0, -a1), then negate the result. */ ++ j __udivdi3 /* Compute __udivdi3(-a0, -a1). */ ++.L11: /* Compute __udivdi3(a0, -a1), then negate the result. */ + neg a1, a1 + .L12: + move t0, ra +-- +2.49.0 + diff --git a/packages/gcc/8.5.0/0034-riscv-jal-cannot-refer-to-a-default-visibility-symb.patch b/packages/gcc/8.5.0/0034-riscv-jal-cannot-refer-to-a-default-visibility-symb.patch new file mode 100644 index 00000000..1422c69d --- /dev/null +++ b/packages/gcc/8.5.0/0034-riscv-jal-cannot-refer-to-a-default-visibility-symb.patch @@ -0,0 +1,120 @@ +From 45116f342057b7facecd3d05c2091ce3a77eda59 Mon Sep 17 00:00:00 2001 +From: Nelson Chu <nelson.chu@sifive.com> +Date: Mon, 29 Nov 2021 04:48:20 -0800 +Subject: [PATCH] RISC-V: jal cannot refer to a default visibility symbol for + shared object. + +This is the original binutils bugzilla report, +https://sourceware.org/bugzilla/show_bug.cgi?id=28509 + +And this is the first version of the proposed binutils patch, +https://sourceware.org/pipermail/binutils/2021-November/118398.html + +After applying the binutils patch, I get the the unexpected error when +building libgcc, + +/scratch/nelsonc/riscv-gnu-toolchain/riscv-gcc/libgcc/config/riscv/div.S:42: +/scratch/nelsonc/build-upstream/rv64gc-linux/build-install/riscv64-unknown-linux-gnu/bin/ld: relocation R_RISCV_JAL against `__udivdi3' which may bind externally can not be used when making a shared object; recompile with -fPIC + +Therefore, this patch add an extra hidden alias symbol for __udivdi3, and +then use HIDDEN_JUMPTARGET to target a non-preemptible symbol instead. +The solution is similar to glibc as follows, +https://sourceware.org/git/?p=glibc.git;a=commit;h=68389203832ab39dd0dbaabbc4059e7fff51c29b + +libgcc/ChangeLog: + + * config/riscv/div.S: Add the hidden alias symbol for __udivdi3, and + then use HIDDEN_JUMPTARGET to target it since it is non-preemptible. + * config/riscv/riscv-asm.h: Added new macros HIDDEN_JUMPTARGET and + HIDDEN_DEF. +--- + libgcc/config/riscv/div.S | 15 ++++++++------- + libgcc/config/riscv/riscv-asm.h | 6 ++++++ + 2 files changed, 14 insertions(+), 7 deletions(-) + +diff --git a/libgcc/config/riscv/div.S b/libgcc/config/riscv/div.S +index c9bd7879c1..723c3b82e4 100644 +--- a/libgcc/config/riscv/div.S ++++ b/libgcc/config/riscv/div.S +@@ -40,7 +40,7 @@ FUNC_BEGIN (__udivsi3) + sll a0, a0, 32 + sll a1, a1, 32 + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + sext.w a0, a0 + jr t0 + FUNC_END (__udivsi3) +@@ -52,7 +52,7 @@ FUNC_BEGIN (__umodsi3) + srl a0, a0, 32 + srl a1, a1, 32 + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + sext.w a0, a1 + jr t0 + FUNC_END (__umodsi3) +@@ -95,11 +95,12 @@ FUNC_BEGIN (__udivdi3) + .L5: + ret + FUNC_END (__udivdi3) ++HIDDEN_DEF (__udivdi3) + + FUNC_BEGIN (__umoddi3) + /* Call __udivdi3(a0, a1), then return the remainder, which is in a1. */ + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + move a0, a1 + jr t0 + FUNC_END (__umoddi3) +@@ -111,12 +112,12 @@ FUNC_END (__umoddi3) + bgtz a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */ + + neg a1, a1 +- j __udivdi3 /* Compute __udivdi3(-a0, -a1). */ ++ j HIDDEN_JUMPTARGET(__udivdi3) /* Compute __udivdi3(-a0, -a1). */ + .L11: /* Compute __udivdi3(a0, -a1), then negate the result. */ + neg a1, a1 + .L12: + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + neg a0, a0 + jr t0 + FUNC_END (__divdi3) +@@ -126,7 +127,7 @@ FUNC_BEGIN (__moddi3) + bltz a1, .L31 + bltz a0, .L32 + .L30: +- jal __udivdi3 /* The dividend is not negative. */ ++ jal HIDDEN_JUMPTARGET(__udivdi3) /* The dividend is not negative. */ + move a0, a1 + jr t0 + .L31: +@@ -134,7 +135,7 @@ FUNC_BEGIN (__moddi3) + bgez a0, .L30 + .L32: + neg a0, a0 +- jal __udivdi3 /* The dividend is hella negative. */ ++ jal HIDDEN_JUMPTARGET(__udivdi3) /* The dividend is hella negative. */ + neg a0, a1 + jr t0 + FUNC_END (__moddi3) +diff --git a/libgcc/config/riscv/riscv-asm.h b/libgcc/config/riscv/riscv-asm.h +index 8550707a4a..96dd85b0df 100644 +--- a/libgcc/config/riscv/riscv-asm.h ++++ b/libgcc/config/riscv/riscv-asm.h +@@ -33,3 +33,9 @@ X: + #define FUNC_ALIAS(X,Y) \ + .globl X; \ + X = Y ++ ++#define CONCAT1(a, b) CONCAT2(a, b) ++#define CONCAT2(a, b) a ## b ++#define HIDDEN_JUMPTARGET(X) CONCAT1(__hidden_, X) ++#define HIDDEN_DEF(X) FUNC_ALIAS(HIDDEN_JUMPTARGET(X), X); \ ++ .hidden HIDDEN_JUMPTARGET(X) +-- +2.49.0 + diff --git a/packages/gcc/9.5.0/0031-riscv-Make-__divdi3-handle-div-by-zero-same-as-hard.patch b/packages/gcc/9.5.0/0031-riscv-Make-__divdi3-handle-div-by-zero-same-as-hard.patch new file mode 100644 index 00000000..47c25104 --- /dev/null +++ b/packages/gcc/9.5.0/0031-riscv-Make-__divdi3-handle-div-by-zero-same-as-hard.patch @@ -0,0 +1,40 @@ +From 4013baf99c38f7bca06a51f8301e8fb195ccfa33 Mon Sep 17 00:00:00 2001 +From: Jim Wilson <jimw@sifive.com> +Date: Tue, 2 Jun 2020 11:19:39 -0700 +Subject: [PATCH] RISC-V: Make __divdi3 handle div by zero same as hardware. + +The ISA manual specifies that divide by zero always returns -1 as the result. +We were failing to do that when the dividend was negative. + +Original patch from Virginie Moser. + + libgcc/ + * config/riscv/div.S (__divdi3): For negative arguments, change bgez + to bgtz. +--- + libgcc/config/riscv/div.S | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/libgcc/config/riscv/div.S b/libgcc/config/riscv/div.S +index 151f8e273a..17234324c1 100644 +--- a/libgcc/config/riscv/div.S ++++ b/libgcc/config/riscv/div.S +@@ -107,10 +107,12 @@ FUNC_END (__umoddi3) + /* Handle negative arguments to __divdi3. */ + .L10: + neg a0, a0 +- bgez a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */ ++ /* Zero is handled as a negative so that the result will not be inverted. */ ++ bgtz a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */ ++ + neg a1, a1 +- j __udivdi3 /* Compute __udivdi3(-a0, -a1). */ +-.L11: /* Compute __udivdi3(a0, -a1), then negate the result. */ ++ j __udivdi3 /* Compute __udivdi3(-a0, -a1). */ ++.L11: /* Compute __udivdi3(a0, -a1), then negate the result. */ + neg a1, a1 + .L12: + move t0, ra +-- +2.49.0 + diff --git a/packages/gcc/9.5.0/0032-riscv-jal-cannot-refer-to-a-default-visibility-symb.patch b/packages/gcc/9.5.0/0032-riscv-jal-cannot-refer-to-a-default-visibility-symb.patch new file mode 100644 index 00000000..1422c69d --- /dev/null +++ b/packages/gcc/9.5.0/0032-riscv-jal-cannot-refer-to-a-default-visibility-symb.patch @@ -0,0 +1,120 @@ +From 45116f342057b7facecd3d05c2091ce3a77eda59 Mon Sep 17 00:00:00 2001 +From: Nelson Chu <nelson.chu@sifive.com> +Date: Mon, 29 Nov 2021 04:48:20 -0800 +Subject: [PATCH] RISC-V: jal cannot refer to a default visibility symbol for + shared object. + +This is the original binutils bugzilla report, +https://sourceware.org/bugzilla/show_bug.cgi?id=28509 + +And this is the first version of the proposed binutils patch, +https://sourceware.org/pipermail/binutils/2021-November/118398.html + +After applying the binutils patch, I get the the unexpected error when +building libgcc, + +/scratch/nelsonc/riscv-gnu-toolchain/riscv-gcc/libgcc/config/riscv/div.S:42: +/scratch/nelsonc/build-upstream/rv64gc-linux/build-install/riscv64-unknown-linux-gnu/bin/ld: relocation R_RISCV_JAL against `__udivdi3' which may bind externally can not be used when making a shared object; recompile with -fPIC + +Therefore, this patch add an extra hidden alias symbol for __udivdi3, and +then use HIDDEN_JUMPTARGET to target a non-preemptible symbol instead. +The solution is similar to glibc as follows, +https://sourceware.org/git/?p=glibc.git;a=commit;h=68389203832ab39dd0dbaabbc4059e7fff51c29b + +libgcc/ChangeLog: + + * config/riscv/div.S: Add the hidden alias symbol for __udivdi3, and + then use HIDDEN_JUMPTARGET to target it since it is non-preemptible. + * config/riscv/riscv-asm.h: Added new macros HIDDEN_JUMPTARGET and + HIDDEN_DEF. +--- + libgcc/config/riscv/div.S | 15 ++++++++------- + libgcc/config/riscv/riscv-asm.h | 6 ++++++ + 2 files changed, 14 insertions(+), 7 deletions(-) + +diff --git a/libgcc/config/riscv/div.S b/libgcc/config/riscv/div.S +index c9bd7879c1..723c3b82e4 100644 +--- a/libgcc/config/riscv/div.S ++++ b/libgcc/config/riscv/div.S +@@ -40,7 +40,7 @@ FUNC_BEGIN (__udivsi3) + sll a0, a0, 32 + sll a1, a1, 32 + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + sext.w a0, a0 + jr t0 + FUNC_END (__udivsi3) +@@ -52,7 +52,7 @@ FUNC_BEGIN (__umodsi3) + srl a0, a0, 32 + srl a1, a1, 32 + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + sext.w a0, a1 + jr t0 + FUNC_END (__umodsi3) +@@ -95,11 +95,12 @@ FUNC_BEGIN (__udivdi3) + .L5: + ret + FUNC_END (__udivdi3) ++HIDDEN_DEF (__udivdi3) + + FUNC_BEGIN (__umoddi3) + /* Call __udivdi3(a0, a1), then return the remainder, which is in a1. */ + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + move a0, a1 + jr t0 + FUNC_END (__umoddi3) +@@ -111,12 +112,12 @@ FUNC_END (__umoddi3) + bgtz a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */ + + neg a1, a1 +- j __udivdi3 /* Compute __udivdi3(-a0, -a1). */ ++ j HIDDEN_JUMPTARGET(__udivdi3) /* Compute __udivdi3(-a0, -a1). */ + .L11: /* Compute __udivdi3(a0, -a1), then negate the result. */ + neg a1, a1 + .L12: + move t0, ra +- jal __udivdi3 ++ jal HIDDEN_JUMPTARGET(__udivdi3) + neg a0, a0 + jr t0 + FUNC_END (__divdi3) +@@ -126,7 +127,7 @@ FUNC_BEGIN (__moddi3) + bltz a1, .L31 + bltz a0, .L32 + .L30: +- jal __udivdi3 /* The dividend is not negative. */ ++ jal HIDDEN_JUMPTARGET(__udivdi3) /* The dividend is not negative. */ + move a0, a1 + jr t0 + .L31: +@@ -134,7 +135,7 @@ FUNC_BEGIN (__moddi3) + bgez a0, .L30 + .L32: + neg a0, a0 +- jal __udivdi3 /* The dividend is hella negative. */ ++ jal HIDDEN_JUMPTARGET(__udivdi3) /* The dividend is hella negative. */ + neg a0, a1 + jr t0 + FUNC_END (__moddi3) +diff --git a/libgcc/config/riscv/riscv-asm.h b/libgcc/config/riscv/riscv-asm.h +index 8550707a4a..96dd85b0df 100644 +--- a/libgcc/config/riscv/riscv-asm.h ++++ b/libgcc/config/riscv/riscv-asm.h +@@ -33,3 +33,9 @@ X: + #define FUNC_ALIAS(X,Y) \ + .globl X; \ + X = Y ++ ++#define CONCAT1(a, b) CONCAT2(a, b) ++#define CONCAT2(a, b) a ## b ++#define HIDDEN_JUMPTARGET(X) CONCAT1(__hidden_, X) ++#define HIDDEN_DEF(X) FUNC_ALIAS(HIDDEN_JUMPTARGET(X), X); \ ++ .hidden HIDDEN_JUMPTARGET(X) +-- +2.49.0 + diff --git a/packages/gcc/package.desc b/packages/gcc/package.desc index 924067b7..35ff82d8 100644 --- a/packages/gcc/package.desc +++ b/packages/gcc/package.desc @@ -2,5 +2,5 @@ repository='git git://gcc.gnu.org/git/gcc.git' mirrors='$(CT_Mirrors GNU gcc/gcc-${CT_GCC_VERSION}) $(CT_Mirrors sourceware gcc/releases/gcc-${CT_GCC_VERSION})' relevantpattern='4.*|. *|.' origin='GNU' -milestones='4.9 5 6 7 8 9 10 11 12 13' +milestones='4.9 5 6 7 8 9 10 11 12 13 14 15' archive_formats='.tar.xz .tar.gz' |