From 99283866cc84102f22324a751a2ba3afb9221cb6 Mon Sep 17 00:00:00 2001 From: Alexey Neyman Date: Tue, 28 Feb 2017 00:57:53 -0800 Subject: Add patches to Linaro GCC Same as the base release as long as they applied. MUSL patches didn't, removed. Also, unobsolete Linaro GCC5 now that they rolled out a new release. Signed-off-by: Alexey Neyman --- patches/gcc/linaro-4.8-2015.06/002_gcc_bug_62231.patch | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 patches/gcc/linaro-4.8-2015.06/002_gcc_bug_62231.patch (limited to 'patches/gcc/linaro-4.8-2015.06/002_gcc_bug_62231.patch') diff --git a/patches/gcc/linaro-4.8-2015.06/002_gcc_bug_62231.patch b/patches/gcc/linaro-4.8-2015.06/002_gcc_bug_62231.patch new file mode 100644 index 00000000..b970ebc8 --- /dev/null +++ b/patches/gcc/linaro-4.8-2015.06/002_gcc_bug_62231.patch @@ -0,0 +1,18 @@ +As-applied. From: + +https://gcc.gnu.org/ml/gcc-patches/2014-10/msg02605.html + +Linked from bug62231 comment 4 there + +diff -durN a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c +--- a/gcc/config/rs6000/rs6000.c 2014-12-08 17:29:04.000000000 -0800 ++++ b/gcc/config/rs6000/rs6000.c 2014-12-15 14:44:46.568801843 -0800 +@@ -1673,7 +1673,7 @@ + SCmode so as to pass the value correctly in a pair of + registers. */ + else if (TARGET_E500_DOUBLE && FLOAT_MODE_P (mode) && mode != SCmode +- && !DECIMAL_FLOAT_MODE_P (mode)) ++ && !DECIMAL_FLOAT_MODE_P (mode) && SPE_SIMD_REGNO_P (regno)) + reg_size = UNITS_PER_FP_WORD; + + else -- cgit v1.2.3