From 918c2a82c8c3f280571eb897a78c1027252860dd Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 3 Apr 2023 15:52:38 -0700 Subject: risc-v: Provide sample for picolibc-only toolchain This builds a multilib toolchain using picolibc. The default target is rv32imac Signed-off-by: Keith Packard --- samples/riscv32-picolibc-elf/crosstool.config | 16 ++++++++++++++++ samples/riscv32-picolibc-elf/reported.by | 3 +++ 2 files changed, 19 insertions(+) create mode 100644 samples/riscv32-picolibc-elf/crosstool.config create mode 100644 samples/riscv32-picolibc-elf/reported.by (limited to 'samples/riscv32-picolibc-elf') diff --git a/samples/riscv32-picolibc-elf/crosstool.config b/samples/riscv32-picolibc-elf/crosstool.config new file mode 100644 index 00000000..a546d87b --- /dev/null +++ b/samples/riscv32-picolibc-elf/crosstool.config @@ -0,0 +1,16 @@ +CT_CONFIG_VERSION="4" +CT_EXPERIMENTAL=y +CT_ARCH_RISCV=y +CT_MULTILIB=y +CT_ARCH_ARCH="rv32imac_zicsr_zifencei" +CT_ARCH_ABI="ilp32" +CT_TARGET_CFLAGS="-ftls-model=local-exec" +CT_TARGET_VENDOR="picolibc" +CC_CC_GCC_ENABLE_DEFAULT_PIE=n +CT_LIBC_PICOLIBC=y +CT_CC_GCC_CONFIG_TLS=y +CT_CC_LANG_CXX=y +CT_LIBC_PICOLIBC_DEFAULT_FLASH_ADDR="0x80000000" +CT_LIBC_PICOLIBC_DEFAULT_FLASH_SIZE="0x00200000" +CT_LIBC_PICOLIBC_DEFAULT_RAM_ADDR="0x80200000" +CT_LIBC_PICOLIBC_DEFAULT_RAM_SIZE="0x00200000" diff --git a/samples/riscv32-picolibc-elf/reported.by b/samples/riscv32-picolibc-elf/reported.by new file mode 100644 index 00000000..9cf9fb6f --- /dev/null +++ b/samples/riscv32-picolibc-elf/reported.by @@ -0,0 +1,3 @@ +reporter_name="Keith Packard" +reporter_url="http://keithp.com/" +reporter_comment="Based on arm-picolibc-eabi" -- cgit v1.2.3