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* gsync: Use copyin()/copyout() to access user memorySergey Bugaev2024-03-271-7/+31
| | | | | | | | | Depending on the architecture and setup, it may not be possible to access user memory directly, for example, due to user mode mappings not being accessible from kernel mode (x86 SMAP, AArch64 PAN). There are dedicated machine-specific copyin()/copyout() routines that know how to access user memory from the kernel; use them. Message-ID: <20240327161841.95685-6-bugaevc@gmail.com>
* Load 64-bit ELFs on all 64-bit portsSergey Bugaev2024-03-272-3/+3
| | | | | Not only on x86_64. Message-ID: <20240327161841.95685-5-bugaevc@gmail.com>
* Use the x86_64 message ABI on all 64-bit portsSergey Bugaev2024-03-272-7/+7
| | | | Message-ID: <20240327161841.95685-4-bugaevc@gmail.com>
* Disable host_kernel_version() everywhere but on i386Sergey Bugaev2024-03-272-5/+5
| | | | | It's not only x86_64, none of new architectures are going to have it. Message-ID: <20240327161841.95685-3-bugaevc@gmail.com>
* Do not install device/input.hSamuel Thibault2024-03-152-1/+1
| | | | | | | | Is _IO{,R,W,WR} macros conflict with the glibc-provided macros and bring confusion as to what is supposed to be the right definition. There is currently no user of it anyway, the Hurd console driver has its own copy.
* x86_64: avoid iterating over the message twice in copyoutmsg/copyinmsg for ↵Flavio Cruz2024-03-113-115/+66
| | | | | | | | | | | | | | | | faster RPCs. This is a follow up to https://git.savannah.gnu.org/cgit/hurd/gnumach.git/commit/?id=69620634858b2992e1a362e33c95d9a8ee57bce7 where we made inlined ports 8 bytes long to avoid resizing. The last thing that copy{in,out}msg were doing was just updating msgt_size field since that's required for kernel stub code and implicitly assumed by IPC code. This was moved into ipc_kmsg_copy{in,out}_body. For a 32 bit userland, the code also stops updating msgt_size for out of line ports, same as the 64 bit userland. Message-ID: <ZdQxWNSieTHcpM1b@jupiter.tail36e24.ts.net>
* move x86 copy_user.[ch] to ipc/ and make it arch-indipendentLD2024-03-099-17/+20
| | | | Message-ID: <20240309140244.347835-3-luca@orpolo.org>
* remove machine/machspl.h as it duplicates machine/spl.hLD2024-03-0935-65/+35
| | | | Message-ID: <20240309140244.347835-2-luca@orpolo.org>
* x86_64: split SET_KERNEL_SEGMENTS() for NCPU > 1Luca Dariz2024-03-091-3/+7
| | | | | | This allows 32on64 to work again. Also, it's a clearer indication of a missing part. Message-ID: <20240309140244.347835-1-luca@orpolo.org>
* linux: Add missing includeSamuel Thibault2024-03-041-0/+2
| | | | Otherwise the types in linux/dev/include/linux/skbuff.h are unknown.
* vm_allocate_contiguous: Add missing page unwiring after making the area ↵Samuel Thibault2024-03-041-0/+3
| | | | | | | | | non-pageable Otherwise, if the allocated memory is passed over for returning data such as in device_read, we end up with ../vm/vm_map.c:4245: vm_map_copyin_page_list: Assertion `src_entry->wired_count > 0' failed.Debugger invoked: assertion failure
* x86_64 locore: Check segmentation by handSamuel Thibault2024-03-041-0/+20
| | | | | | | x86_64 ignores the segmentation limit, so we have to check it by hand when accessing userland pointers. Reported-by: Sergey Bugaev <bugaevc@gmail.com>
* pmap: Avoid leaking USER bit in page tablesSamuel Thibault2024-03-031-5/+6
| | | | | | | | | | We should only set USER - for user processes maps - for 32bit Xen support This was not actually posing problem since in 32bit segmentation protects us, and in 64bit the l4 entry for the kernel is already set. But better be safe than sorry.
* kernel traps: also catch general protection faultsSamuel Thibault2024-03-031-0/+3
| | | | | | If userland passes a kernel pointer, it's not a page fault that we get, but a general protection fault. We also want to go through the recovery in that case, to make e.g. copyin/out return an error.
* Check for null ports in task_set_essential, task_set_name and thread_set_name.Flavio Cruz2024-02-282-0/+9
| | | | | | Otherwise, it is easy to crash the kernel if userland passes arbitrary port names. Message-ID: <ZdriTgNhPsfu7c2M@jupiter.tail36e24.ts.net>
* vm_map: Add comment and assert for vm_map_deleteDamien Zammit2024-02-231-0/+7
| | | | | | This will prevent calling vm_map_delete without the map locked unless ref_count is zero. Message-ID: <20240223081505.458240-1-damien@zamaudio.com>
* spl: Introduce assert_splvm and use it in process_pmap_updatesSamuel Thibault2024-02-232-0/+2
| | | | Suggested-by: Damien Zammit <damien@zamaudio.com>
* kern: move pset_idle_lock/unlock to headerSamuel Thibault2024-02-233-14/+16
| | | | so that kern/machine.c can use it
* kern: Use _nocheck variants of locks taken at splsched()Damien Zammit2024-02-232-16/+28
| | | | | Fixes assertion errors when LDEBUG is compiled in. Message-ID: <20240223081404.458062-1-damien@zamaudio.com>
* kern: Use _irq variant of lock and disable interruptsDamien Zammit2024-02-233-4/+4
| | | | | During quantum adjustment, disable interrupts and call appropriate lock. Message-ID: <20240223080948.457792-1-damien@zamaudio.com>
* kern/processor: Do not set default_pset.empty on bootstrapDamien Zammit2024-02-231-2/+0
| | | | | | This is not needed because cpu_up does this when it comes online, it calls pset_add_processor(). Message-ID: <20240223080357.457465-1-damien@zamaudio.com>
* kern/gsync: Use vm_map_lookup with keep_map_lockedDamien Zammit2024-02-221-13/+6
| | | | | | | | | | | | | This prevents a deadlock in smp where a read lock on the map is taken in gsync and then the map is locked again inside vm_map_lookup() but another thread had a pre-existing write lock, therefore the second read lock blocks. This is fixed by removing the initial gsync read lock on the map but keeping the read lock held upon returning from vm_map_lookup(). Co-Authored-By: Sergey Bugaev <bugaevc@gmail.com> Message-ID: <20240222082410.422869-4-damien@zamaudio.com>
* vm_map_lookup: Add parameter for keeping map lockedDamien Zammit2024-02-225-9/+12
| | | | | | | | | | | This adds a parameter called keep_map_locked to vm_map_lookup() that allows the function to return with the map locked. This is to prepare for fixing a bug with gsync where the map is locked twice by mistake. Co-Authored-By: Sergey Bugaev <bugaevc@gmail.com> Message-ID: <20240222082410.422869-3-damien@zamaudio.com>
* Fix compile with MACH_LOCK_MONDamien Zammit2024-02-191-0/+7
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* ddb: Use _irq variants of locks to satisfy LDEBUG assertsDamien Zammit2024-02-192-14/+18
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* Introduce and use assert_splsched()Samuel Thibault2024-02-194-6/+7
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* process_pmap_updates: Use _nocheck form of lock, already at splvmDamien Zammit2024-02-191-2/+5
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* kern: Fix parenthesis around assignment used as valueDamien Zammit2024-02-191-1/+1
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* locore: Remove unnecessary call to CPU_NUMBERDamien Zammit2024-02-182-4/+2
| | | | The cpu number is already in edx register, so use that.
* smp: Set processor set to non-empty when adding a processorDamien Zammit2024-02-121-0/+1
| | | | | | This allows the slave_pset to be used for actual tasks with the processor_set RPCs. Message-ID: <20240212053817.1919056-1-damien@zamaudio.com>
* Add documentation for thread_set_nameSamuel Thibault2024-02-121-0/+11
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* Add thread_set_name RPC.Flavio Cruz2024-02-124-4/+41
| | | | | | | Like task_set_name, we use the same size as the task name and will inherit the task name, whenever it exists. This will be used to implement pthread_setname_np. Message-ID: <20240212062634.1082207-2-flaviocruz@gmail.com>
* Replace kernel header includes in include/mach/mach_types.h with forward ↵Flavio Cruz2024-02-1212-12/+20
| | | | | | | | | | | | | | | declarations. I was trying to reuse TASK_NAME_SIZE in kern/thread.h but it was impossible because files included from kern/task.h end up requiring kern/thread.h (through percpu.h), creating a recursive dependency. With this change, mach_types.h only defines forward declarations and modules have to explicitly include the appropriate header file if they want to be able touch those structures. Most of the other includes are required because we no longer grab many different includes through mach_types.h. Message-ID: <20240212062634.1082207-1-flaviocruz@gmail.com>
* Enable MACH_HOSTDamien Zammit2024-02-111-2/+6
| | | | | | | | | This is only enabled when NCPUS > 1. Enables some code paths that allows userspace to manage cpu resources via processor set RPCs. Message-ID: <20240211120023.1889731-1-damien@zamaudio.com>
* task: fix addressability of assign_active fieldSamuel Thibault2024-02-111-2/+2
| | | | It is used for thread_wakeup and alike.
* smp: Create AP processor set and put all APs inside itDamien Zammit2024-02-113-1/+18
| | | | | | | This has the effect of running with one cpu only with smp, but has the ability to enable APs in userspace with the right processor set RPCs. Message-ID: <20240211120051.1889789-1-damien@zamaudio.com>
* ddb: Make show all runqs iterate over psets.Damien Zammit2024-02-111-3/+7
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* smp: Fix unable to enter kdb during bootDamien Zammit2024-02-112-2/+1
| | | | Message-ID: <20240211115958.1889648-1-damien@zamaudio.com>
* smp: Fix parenthesis around logic expression valueDamien Zammit2024-02-111-1/+1
| | | | Message-ID: <20240211070915.1879676-1-damien@zamaudio.com>
* Fix build with APIC without SMPSamuel Thibault2024-02-102-1/+3
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* smp: Fix compile error with missing apboot_addrDamien Zammit2024-02-092-5/+5
| | | | Message-ID: <20240209021108.1715770-1-damien@zamaudio.com>
* smp: Fix INIT/STARTUP IPI sequenceDamien Zammit2024-02-094-40/+110
| | | | | | TESTED: works in qemu TESTED: works hardware with AMD cpu Message-ID: <20240207050158.1640853-5-damien@zamaudio.com>
* SMP: Fix allocating the apboot pageSamuel Thibault2024-02-092-8/+9
| | | | | vm_page_grab_contig does not necessarily allocate at the beginning of the DMA segment, so rather allocate by hand very early.
* fpu: Fix cpuid feature detectionOlivier Valentin2024-02-081-3/+8
| | | | | Make sure to fetch capabilities from cpuid(0xd,0x1) Message-ID: <20240208165015.4700-3-valentio@free.fr>
* Revert "fpu: Fix cpuid feature detection"Olivier Valentin2024-02-081-15/+25
| | | | | This reverts commit f8d0f98e80b3d7d9b24fa077818113fb0f4b3970. Message-ID: <20240208165015.4700-2-valentio@free.fr>
* smp: Use HPET instead of pit one-shot that is unreliableDamien Zammit2024-02-081-4/+3
| | | | | | | NB: Every x86 board that uses ACPI most likely has a HPET since 2005. We can roll back to PIT in the cases where its not present, but the PIT one shot code is definitely currently broken. Message-ID: <20240207050158.1640853-4-damien@zamaudio.com>
* Add HPET timer for small accurate delaysDamien Zammit2024-02-085-8/+150
| | | | | | | TESTED: This works in qemu correctly TESTED: This works on an AMD board with ACPI v2.0 correctly Message-ID: <20240207050158.1640853-3-damien@zamaudio.com>
* separate lapic_enable from lapic_setupDamien Zammit2024-02-084-5/+31
| | | | | | | This initializes the lapic without turning on the IOAPIC interrupts during SMP init. Message-ID: <20240207050158.1640853-2-damien@zamaudio.com>
* apboot: avoid self-modifying codeSamuel Thibault2024-02-052-15/+10
| | | | | | self-modifying code is generally frowned upon, Intel largely says the support is model-dependent. We can as well just relocate from the C code like we did for the temporary gdt.
* smp: Remove hardcoded AP_BOOT_ADDRDamien Zammit2024-02-054-11/+55
| | | | | | | | | | | | | This took some time to figure out. Involves a hand-crafted 16 bit assembly instruction [1] because it requires an immediate for the memory address of far jump. This required self-modifying code to inject the next instruction, therefore I added a near jump to clear the instruction cache queue in case the pipeline cached the unmodified jump location. [1] Intel Architecture Software Developer's Manual, Volume 2: Instruction Set Reference Manual
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