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* SMP: fix getting the interrupt stack address and sizeSamuel Thibault2021-04-044-4/+7
| | | | | | | * i386/i386at/boothdr.S (_eintstack): Add missing common. * i386/xen/xen_boothdr.S (_eintstack): Add missing common. * x86_64/xen/xen_boothdr.S (_eintstack): Add missing common. * i386/i386/mp_desc.c (intstack, eintstack): Add missing underscore.
* Add ioapic support disabled by defaultDamien Zammit2021-04-0418-29/+583
| | | | | | | Use --enable-ncpus=x --enable-apic where x > 1 for SMP+APIC support. Use neither for no SMP and old PIC support. Message-Id: <20210404050812.145483-1-damien@zamaudio.com>
* pit: Add more macrosSamuel Thibault2021-04-031-2/+7
| | | | | * i386/i386/pit.h (PITAUX_VAL, PIT_C2): New macros. (PIT_RATEMODE): Fix macro value.
* linux: Add option to disable Linux groupsSamuel Thibault2021-03-311-1/+5
| | | | | * linux/configfrag.ac (--disable-linux-groups): New option. (AC_OPTION_Linux_group): Default to $enable_linux_groups.
* intr: Always share irqsSamuel Thibault2021-03-311-0/+2
| | | | | | We currently already always assume that irqs user handlers can be shared * device/intr.c (install_user_intr_handler): Add SA_SHIRQ to flags.
* intr: Add user interrupt handling code for non-Linux caseDamien Zammit2021-03-311-0/+80
| | | | | | | | | | * device/intr.c: Include <kern/assert.h> (struct intr_list): New structure. (user_intr_handlers): New array. (user_irq_handler): New function. (install_user_intr_handler): New function. Message-Id: <20210330025830.63528-2-damien@zamaudio.com>
* Keep BIOS mapped even without LinuxSamuel Thibault2021-03-312-7/+1
| | | | | | | | Not only Linux drivers need BIOS mapped. * i386/i386at/model_dep.c (i386at_init) [!LINUX_DEV]: Map the low memory. * i386/intel/pmap.c (pmap_create) [!LINUX_DEV]: Likewise.
* apic: Reorder definesDamien Zammit2021-03-291-2/+2
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* linux irq: Avoid hardcoding the number of interrupts.Damien Zammit2021-03-281-14/+8
| | | | | | | | | * linux/dev/arch/i386/kernel/irq.c: Include <i386/irq.h> instead of <i386/pic.h>. (irq_action): Use NINTR instead of 16, do not bother expliciting the initialization. (install_user_intr_handler, request_irq, free_irq, probe_irq_on, probe_irq_off, reserve_mach_irqs): Use NINTR instead of 16.
* pic: Move to interrupts 0x20-0x2fDamien Zammit2021-03-282-5/+3
| | | | | | * i386/i386/pic.h (PICM_VECTBASE): Set to 0x20. * i386/i386at/idt.h (IDTSZ): Set to 0x20 + 0x10. (PIC_INT_BASE): Set to 0x20.
* Existing SMP apic code improvementsDamien Zammit2021-03-284-21/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * i386/i386/apic.c (acpi_get_irq_override): New function. (apic_get_ioapic): Make it return IoApicData* rather than IoApicData. (apic_print_info): Manage IoApicData* rather than IoApicData. * i386/i386/apic.h (struct ApicReg): Use uint32_t instead of unsigned. (struct ioapic_route_entry): New structure. (union ioapic_route_entry_union): New union. (ApicLocalUnit): Rename base to gsi_base. Add ioapic field. (APIC_IRQ_OVERRIDE_POLARITY_MASK, APIC_IRQ_OVERRIDE_TRIGGER_MASK): New macros. (acpi_get_irq_override, ): New prototype. (apic_get_ioapic): Update prototype. (lapic): New declaration. (IMCR_SELECT, IMCR_DATA, MODE_IMCR, IMCR_USE_PIC, IMCR_USE_APIC, LAPIC_ENABLE, LAPIC_NMI, LAPIC_DISABLE, LAPIC_TIMER_PERIODIC, LAPIC_TIMER_DIVIDE_2, LAPIC_TIMER_DIVIDE_4, LAPIC_TIMER_DIVIDE_8, LAPIC_TIMER_DIVIDE_16, LAPIC_TIMER_BASEDIV, NINTR, IOAPIC_FIXED, IOAPIC_PHYSICAL, IOAPIC_LOGICAL, IOAPIC_NMI, IOAPIC_EXTINT, IOAPIC_ACTIVE_HIGH, IOAPIC_ACTIVE_LOW, IOAPIC_EDGE_TRIGGERED, IOAPIC_LEVEL_TRIGGERED, IOAPIC_MASK_ENABLED, IOAPIC_MASK_DISABLED): New macros. * i386/i386at/acpi_parse_apic.h (struct acpi_apic_ioapic): Rename base field to gsi_base. * i386/i386at/acpi_parse_apic.c (acpi_apic_add_ioapic): Update to gsi_base new name. Set ioapic field. (acpi_apic_setup): Rename lapic to lapic_unit. Message-Id: <20210328060320.36194-5-damien@zamaudio.com>
* Don't allow writing to acpi table in memoryDamien Zammit2021-03-281-1/+1
| | | | | | * i386/i386at/acpi_parse_apic.c (acpi_get_apic): Map rsdt entries read-only. Message-Id: <20210328060320.36194-4-damien@zamaudio.com>
* fixup acpi base table searchDamien Zammit2021-03-281-18/+12
| | | | | | | | | * i386/i386at/acpi_parse_apic.c (acpi_check_rsdp_align): Make it take a void* instead of uint32_t. (acpi_get_rsdp): Apply phystokv on the EBDA base and 0xE0000. (acpi_apic_setup): Drop spurious negation. Message-Id: <20210328060320.36194-3-damien@zamaudio.com>
* configure: Add block groupDamien Zammit2021-03-281-4/+16
| | | | | | | | | | This is the last group needed to easily disable the Linux glue. * linux/configfrag.ac (block): New group. (floppy): Set group to block. (ide): Set group to block. Message-Id: <20210328060320.36194-2-damien@zamaudio.com>
* fix EISA check in init_IRQDamien Zammit2021-03-271-1/+1
| | | | Message-Id: <20210326094850.2606-5-damien@zamaudio.com>
* clock: Let timer proceed even before we have set threadsDamien Zammit2021-03-271-1/+4
| | | | Message-Id: <20210326094850.2606-4-damien@zamaudio.com>
* ahci: Fix variable nameAndrea G. Monaco2021-02-211-4/+4
| | | | * linux/dev/drivers/block/ahci.c (ahci_probe_dev): Rename spd to det.
* i386 fpu: fix bogus checkAndrea G. Monaco2021-02-111-1/+1
| | | | | | | Avoid panicing on all CPUs that do not support xsaves. * i386/i386/fpu.c (init_fpu): Panic on CPUs that do not support xsaves only if the cpu-reported xsave size is smaller than expected.
* Default MIG to mig when not found.Samuel Thibault2021-02-091-0/+1
| | | | | | | | | bash: no: command not found seems to be confusing for users. Revert to setting back to mig, but after printing the warning. * configure.ac (MIG): Default to mig when not found.
* Warn about missing migSamuel Thibault2021-02-091-1/+7
| | | | | * configure.ac (MIG): Do not default to mig, and warn when this is missing. Advertise the MIG variable.
* Advise to simply use a cross-toolchainSamuel Thibault2021-02-071-0/+9
| | | | * README: Advise to use i686-linux-gnu-* tools.
* com: Fix bogus NCOM testAndrea G. Monaco2021-02-031-1/+1
| | | | * i386/i386at/com.c (comprobe_general): Reject unit being equal to NCOM.
* doc: Add a missing field for 'struct thread_sched_info'.Guy-Fleury Iteriteka2021-01-201-0/+3
| | | | | * doc/mach.texi(struct thread_sched_info): Add 'int last_processor' item. Message-Id: <20210120185809.2429-1-gfleury@disroot.org>
* add a missing include header guard.guy fleury iteriteka2021-01-091-0/+5
| | | | | * i386/i386at/comreg.h: Add header guard angaist multiple inclusion. Message-Id: <20210109180149.11861-1-gfleury@disroot.org>
* vm_map: Avoid linking gaps for vm_copy_tSamuel Thibault2021-01-043-20/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This does not make sense, and produces incorrect results (since vme_end is 0, etc.) * vm/vm_map.h (_vm_map_clip_start, _vm_map_clip_end): Add link_gap parameter. * vm/vm_map.c (_vm_map_entry_link): Add link_gap parameter, do not call vm_map_gap_insert if it is 0. (vm_map_entry_link): Set link_gap to 1 in _vm_map_entry_link call. (_vm_map_clip_start): Add link_gap parameter, pass it to _vm_map_entry_link call.. (vm_map_clip_start): Set link_gap_to 1 in _vm_map_clip_start call. (vm_map_copy_entry_link): Set link_gap to 0 in _vm_map_entry_link call. (vm_map_copy_clip_start): Set link_gap_to 0 in _vm_map_clip_start call. (_vm_map_entry_unlink): Add unlink_gap parameter, do not call vm_map_gap_remove if it is 0. (vm_map_entry_unlink): Set unlink_gap to 1 in _vm_map_entry_unlink call. (_vm_map_clip_end): Add link_gap parameter, pass it to _vm_map_entry_link call.. (vm_map_clip_end): Set link_gap_to 1 in _vm_map_clip_end call. (vm_map_copy_entry_unlink): Set unlink_gap to 0 in _vm_map_entry_unlink call. (vm_map_copy_clip_end): Set link_gap_to 0 in _vm_map_clip_end call. * vm/vm_kern.c (projected_buffer_deallocate): set link_gap to 1 in _vm_map_clip_start and _vm_map_clip_end calls.
* vm_map: print warning when max_size gets smaller than sizeSamuel Thibault2021-01-041-0/+2
| | | | | * vm/vm_map.c (vm_map_find_entry_anywhere): Print warning when max_size gets smaller than size.
* Fix _Static_assert callSamuel Thibault2020-12-231-2/+4
| | | | | | | | Before C2X, _Static_assert requires a second parameter Reported by Andrea G. Monaco <andrea.monaco@autistici.org> * i386/i386/fpu.c: Add second parameter to _Static_assert calls.
* vm_map: Fix taking into account high bits in maskSamuel Thibault2020-12-203-4/+33
| | | | | | | | | | | glibc's sysdeps/mach/hurd/dl-sysdep.c has been wanting to use this for decades. * include/string.h (ffs): New declaration. * vm/vm_map.c: Include <string.h>. (vm_map_find_entry_anywhere): Separate out high bits from mask, to compute the maximum offset instead of map->max_offset. * doc/mach.texi (vm_map): Update documentation accordingly.
* i386at: Really disable com and lpr above NCOM and NLPRSamuel Thibault2020-12-072-0/+10
| | | | | | | commmodem and lprinfo arrays would otherwise overflow. * i386/i386at/com.c (comattach): Return early when unit is beyond NCOM. * i386/i386at/lpr.c (lprattach): Return early when unit is beyond NLPR.
* pmap: Note that we should support PCIDSamuel Thibault2020-12-021-0/+1
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* x86: Move fp_reg.h static assertions to .c fileSamuel Thibault2020-12-012-2/+3
| | | | | | | | Since fp_reg.h is installed on the system, and compilers may not even support _Static_assert. * i386/include/mach/i386/fp_reg.h: Move _Static_assert to... * i386/i386/fpu.c: ... c file.
* gsync: Use vm_address_t instead of vm_offset_tSamuel Thibault2020-12-011-4/+4
| | | | | | | vm_offset_t are offsets inside memory objects, not actual addresses. * include/mach/gnumach.defs (gsync_wait, gsync_wake, gsync_requeue): Use vm_address_t instead of vm_offset_t.
* x86: Keep fp_regs.h standaloneSamuel Thibault2020-12-011-6/+4
| | | | | | | | | We cannot include stdint.h in fp_regs.h since this is included by mach_types.h for bootstrapping, before we have stdint.h from glibc. * i386/include/mach/i386/fp_reg.h: Do not include <stdint.h> (XSAVE_XCOMP_BV_COMPACT, struct i386_xfp_xstate_header): Use unsigned long long instead of uint64_t.
* x86: Get default state from the CPU itselfSamuel Thibault2020-11-291-20/+6
| | | | | | | | | It seems that at least qemu does not like our initial state. We can as well just take it from fninit. * i386/i386/fpu.c (MXCSR_DEFAULT, CWD_DEFAULT): Remove macros. (fpu_module_init): Get default state from CPU. (fpinit): Do not call fninit.
* x86: Make sure we allocate as much as our structure should holdSamuel Thibault2020-11-291-0/+10
| | | | | * i386/i386/fpu.c (init_fpu): Panic if the CPU gives us a size that is smaller than it should.
* x86: clear exceptions etc. on fpinitSamuel Thibault2020-11-291-0/+1
| | | | | | | fpu_rstor is not enough, exceptions and such remain behind, so restore calling fninit. * i386/i386/fpu.c (fpinit): call fninit() before fpu_rstor().
* x86: Fix initial control wordSamuel Thibault2020-11-291-3/+8
| | | | | | | The value in fp_state_alloc was actually an oldie, the value in fpinit was the expected one nowadays. * i386/i386/fpu.c (CWD_DEFAULT): Set to 0x37f.
* x86: Fix initialization of new threadsSamuel Thibault2020-11-293-49/+47
| | | | | | | | | | | | | | | | | | | fninit does not clear MMX/SSE/AVX registers, so we have to use rstor to clear them when starting a new thread. Along the way, we can as well just have a default state to be loaded in each new thread. * i386/include/mach/i386/fp_reg.h (XSAVE_XCOMP_BV_COMPACT): New macro. * i386/i386/fpu.h (fp_default_state): New variable declaration. * i386/i386/fpu.c (fp_default_state): New variable. (MXCSR_DEFAULT, CWD_DEFAULT): New macros. (fpu_module_init): Allocate and initialize fp_default_state. (fpinit): rstor from fp_default_state instead of setting FPU state by hand. (fp_load): Copy initial state from fp_default_state instead of setting it to 0. This is more future-proof since this is the exact state that we are loading in fpinit. (fp_state_alloc): fp_state_alloc: Copy initial state from fp_default_state.
* x86: Factorize fpu save/restoreSamuel Thibault2020-11-292-60/+49
| | | | | | | * i386/i386/fpu.h (fpu_save, fpu_rstor): New macros. (fpu_save_context): Use fpu_save macro. * i386/i386/fpu.c (fp_save): Use fpu_save macro. (fp_load): Use fpu_rstor macro.
* x86: Drop XSAVE support limitationSamuel Thibault2020-11-282-4/+0
| | | | | | | | | Now that XSAVEOPT is supported, we are fine with supporting large FPU state. * i386/i386/fpu.c (init_fpu): Do not limit fp_xsave_support to CPU_XCR0_SUPPORTED. * i386/i386/fpu.h (CPU_XCR0_SUPPORTED): Remove macro.
* x86: Add XSAVEOPT, XSAVEC, XSAVES supportSamuel Thibault2020-11-282-28/+121
| | | | | | | | | | | | | | * i386/i386/fpu.h (CPU_FEATURE_XSAVEOPT, CPU_FEATURE_XSAVEC, CPU_FEATURE_XGETBV1, CPU_FEATURE_XSAVES): New macros. (xsaveopt, xsavec, xsaves, xrstors): New macros. (fpu_save_context): Use xsaveopt, xsavec, or xsaves when available. (fp_save_kind): New enum. (fp_save_kind): New variable declaration. * i386/i386/fpu.c (fp_save_kind): New variable. (init_fpu): Set fp_save_kind according to enumeration. When XSAVES is supported, use xsave area size from corresponding enumeration. (fp_save): Use xsaveopt, xsavec, xsaves when available. (fp_load): Use xrstors when available.
* x86: Extend XSAVE support to unbound stateSamuel Thibault2020-11-283-23/+12
| | | | | | | | | | | | * i386/i386/fpu.c (fp_xsave_size): New variable. (init_fpu): Save XSAVE size to fp_xsave_size. (fpu_module_init): Pass fp_xsave_size as size to kmem_cache_init. (fpu_set_state, fp_load, fp_state_alloc): Use fp_xsave_size to clear ifps. * i386/include/mach/i386/fp_reg.h (struct i386_xfp_save): Replace static fp_yreg_word with extended field. * i386/i386/thread.h (struct i386_fpsave_state): Make fp_valid field first in the structure to let the extended finish the structure.
* x86: Add XSAVE supportSamuel Thibault2020-11-285-27/+124
| | | | | | | | | | | | | | | | | | | | | | | | | * i386/i386/fpu.h (CPU_XCR0_X87, CPU_XCR0_SSE, CPU_XCR0_AVX, CPU_XCR0_MPX, CPU_XCR0_AVX512): New macros. (xsave): Pass fp_xsave_support to xsave. (fpu_save_context): When fp_kind is FP_387X, use xsave. (fp_xsave_support): New variable declaration. * i386/i386/proc_reg.h (cpuid): New macro. * linux/src/include/asm-i386/processor.h (cpuid): Disable macro. * i386/include/mach/i386/fp_reg.h: Include <stdint.h> (i386_xfp_xstate_header): New structure. (i386_xfp_save): Add xsave fields. * i386/i386/fpu.c (fp_xsave_support): New variable. (init_fpu): Look for XSAVE feature; if available, get the supported parts and set fp_kind to FP_387X. (fpu_module_init): Set ifps_cache alignment to alignof(struct i386_fpsave_state). (fpu_set_state): Make sure to clear all the ifps structure. Reuse the FP_387FX for the FP_387X case. (fpu_get_state, fpexterrflt, fpastintr, fp_state_alloc): Reuse the FP_387FX for the FP_387X case. (fp_save): When fp_kind is FP_387X, use xsave. (fp_load): When fp_kind is FP_387X, use xrstor. Reuse the FP_387FX for the FP_387X case.
* fpu: Rename FP_387X to FP_387FXSamuel Thibault2020-11-283-11/+12
| | | | | | | | | | | To leave FP_387X for XSAVE-supporting CPU (as opposed to FXSAVE-supporting CPU) * i386/include/mach/i386/fp_reg.h (FP_387X): Rename to FP_387FX. (FP_387X): New macro. * i386/i386/fpu.c (init_fpu, fpu_set_state, fpu_get_state, fpexterrflt, fpastintr, fp_save, fp_load, fp_state_alloc): Update accordingly. * i386/i386/fpu.h (fpu_save_context): Likewise.
* fp_reg: update to latest SSE supported by FXSAVESamuel Thibault2020-11-281-3/+4
| | | | | | * i386/include/mach/i386/fp_reg.h (struct i386_xfp_save): Extend fp_xreg_word to 16 registers. (sizeof(struct i386_xfp_save)): Assert that it is equal to 512.
* x86: Pave the way for xsave/xrstor supportSamuel Thibault2020-11-285-3/+43
| | | | | | | | | | | | | * i386/i386/fpu.h (xgetbv, get_xcr0, xsetbv, set_xcr0): New inline functions. (xsave, xrstor): New macros. * i386/i386/locore.S (cpu_features): Extend to two words. (cpu_features_edx, cpu_features_ecx): New labels. (discover_x86_cpu_type): Also save ecx cpuid(1) report. * x86_64/locore.S: Likewise. * i386/i386/locore.h (cpu_features): Extend to two words. (CPU_FEATURE_XSAVE): New macro. * i386/i386/proc_reg.h (CR4_OSXSAVE): New macro.
* x86: allow using 8bit constants in in/out instructionsSamuel Thibault2020-11-281-6/+6
| | | | | | * i386/i386/pio.h (inl, inw, inb, outl, outw, outb): Add N constraint alternative on port. (outl): Cast data to unsigned int.
* Disable com3 and com4Samuel Thibault2020-11-222-2/+4
| | | | | | | | We do not support shared IRQs for these, so avoid boot issues when running on a system with more than 2 com ports. * i386/configfrag.ac (ncom) [at:i?86]: Set to 2. * x86_64/configfrag.ac (ncom) [at:x86_64]: Set to 2.
* fix missing include header guard.guy fleury iteriteka2020-11-221-0/+5
| | | | | * i386/i386/pit.h: Add header guard angaist multiple inclusion. Message-Id: <20201122074155.4883-1-gfleury@disroot.org>
* genhd: Fix building without IDE driversSamuel Thibault2020-11-151-2/+5
| | | | | * linux/dev/drivers/block/genhd.c [!CONFIG_BLK_DEV_IDE] (device_setup): Do not call ide_setup.
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