From a42ceb867327dfd39147377fbd244df88f5d4d53 Mon Sep 17 00:00:00 2001 From: Luca Dariz Date: Sat, 5 Feb 2022 18:51:28 +0100 Subject: enable user access The pmap module is a bit limited on 64 bit paging, so this should be refined when we'll be able to use addresses over 4G. Signed-off-by: Luca Dariz Message-Id: <20220205175129.309469-6-luca@orpolo.org> --- i386/intel/pmap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'i386') diff --git a/i386/intel/pmap.c b/i386/intel/pmap.c index 57c18a0d..0f2ad641 100644 --- a/i386/intel/pmap.c +++ b/i386/intel/pmap.c @@ -1299,7 +1299,7 @@ pmap_t pmap_create(vm_size_t size) pa_to_pte(kvtophys((vm_offset_t) page_dir[i])) | INTEL_PTE_VALID #if !defined(MACH_HYP) || defined(MACH_PV_PAGETABLES) - | INTEL_PTE_WRITE + | INTEL_PTE_WRITE | INTEL_PTE_USER #endif ); } @@ -1310,7 +1310,7 @@ pmap_t pmap_create(vm_size_t size) != KERN_SUCCESS) panic("pmap_create"); memset(p->l4base, 0, INTEL_PGBYTES); - WRITE_PTE(&p->l4base[0], pa_to_pte(kvtophys((vm_offset_t) p->pdpbase)) | INTEL_PTE_VALID | INTEL_PTE_WRITE); + WRITE_PTE(&p->l4base[0], pa_to_pte(kvtophys((vm_offset_t) p->pdpbase)) | INTEL_PTE_VALID | INTEL_PTE_WRITE | INTEL_PTE_USER); #ifdef MACH_PV_PAGETABLES // FIXME: use kmem_cache_alloc instead if (kmem_alloc_wired(kernel_map, -- cgit v1.2.3