From 214866d58ac2bd1060132b250bf391a495110015 Mon Sep 17 00:00:00 2001 From: Damien Zammit Date: Sun, 4 Apr 2021 15:08:12 +1000 Subject: Add ioapic support disabled by default Use --enable-ncpus=x --enable-apic where x > 1 for SMP+APIC support. Use neither for no SMP and old PIC support. Message-Id: <20210404050812.145483-1-damien@zamaudio.com> --- x86_64/interrupt.S | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) (limited to 'x86_64') diff --git a/x86_64/interrupt.S b/x86_64/interrupt.S index e634e34b..779eae67 100644 --- a/x86_64/interrupt.S +++ b/x86_64/interrupt.S @@ -16,7 +16,11 @@ #include #include -#include +#ifdef APIC +# include +#else +# include +#endif #include #define READ_ISR (OCW_TEMPLATE|READ_NEXT_RD|READ_IS_ONRD) @@ -27,6 +31,10 @@ * On entry, %rax contains the irq number. */ ENTRY(interrupt) +#ifdef APIC + cmpl $255,%eax /* was this a spurious intr? */ + je _null_eoi /* if so, null eoi handler */ +#endif pushq %rax /* save irq number */ call spl7 /* set ipl */ pushq %rax /* save previous ipl */ @@ -45,6 +53,7 @@ ENTRY(interrupt) cli /* XXX no more nested interrupts */ popq %rcx /* restore irq number */ +#ifndef APIC movl $1,%eax shll %cl,%eax /* get corresponding IRQ mask */ orl EXT(curr_pic_mask),%eax /* add current mask */ @@ -81,4 +90,17 @@ ENTRY(interrupt) outb %al,$(PIC_MASTER_OCW) /* unmask master */ 2: ret +#else + cmpl $16,%ecx /* was this a low ISA intr? */ + jl _isa_eoi /* no, must be PCI */ + ret /* NB: let irq_acknowledge handle pci EOI */ +_isa_eoi: + movl %ecx,%edi /* load irq number as 1st arg */ + call EXT(ioapic_irq_eoi) /* ioapic irq specific EOI */ + call EXT(lapic_eoi) /* lapic broadcast EOI */ + ret +_null_eoi: + call EXT(lapic_eoi) /* lapic broadcast EOI */ + ret +#endif END(interrupt) -- cgit v1.2.3