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authorYuqian Yang <crupest@crupest.life>2025-02-28 23:13:39 +0800
committerYuqian Yang <crupest@crupest.life>2025-02-28 23:13:39 +0800
commitdc1f0c4c0096013799416664894c5194dc7e1f52 (patch)
tree2f5d235f778cd720f4c39ec3e56b77ba6d99f375 /store/works/life/computer-organization-experiment/counter_4.vhdl
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chore(store): move everything to store.
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+LIBRARY IEEE;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE IEEE.STD_LOGIC_UNSIGNED.ALL;
+
+ENTITY counter_4 IS
+ PORT (CLK:IN STD_LOGIC;
+ CQ:OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
+END counter_4;
+ARCHITECTURE behavior OF counter_4 IS
+BEGIN
+ PROCESS(CLK)
+ VARIABLE CQI:STD_LOGIC_VECTOR(3 DOWNTO 0) := B"0000";
+ BEGIN
+ IF CLK'EVENT AND CLK='1' THEN
+ CQI := CQI + 1;
+ END IF;
+ CQ<=CQI;
+ END PROCESS;
+END behavior;