diff options
Diffstat (limited to 'works/life/computer-organization-experiment/alu.vhdl')
| -rw-r--r-- | works/life/computer-organization-experiment/alu.vhdl | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/works/life/computer-organization-experiment/alu.vhdl b/works/life/computer-organization-experiment/alu.vhdl index 0bb743c..75a9961 100644 --- a/works/life/computer-organization-experiment/alu.vhdl +++ b/works/life/computer-organization-experiment/alu.vhdl @@ -1,10 +1,13 @@ LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; -USE IEEE.STD_LOGIC_UNSIGNED.ALL; use ieee.numeric_std.all; entity alu is - port (A, B: in std_logic_vector(31 downto 0); ALUC: in std_logic_vector(3 downto 0); S: out std_logic_vector(31 downto 0); Z: out std_logic); + port ( + A, B: in std_logic_vector(31 downto 0); + ALUC: in std_logic_vector(3 downto 0); + S: out std_logic_vector(31 downto 0); + Z: out std_logic); end entity; architecture Behavioral of alu is @@ -14,9 +17,9 @@ begin else A - B when ALUC(2 downto 0) ?= B"100" else A or B when ALUC(2 downto 0) ?= B"101" else A xor B when ALUC(2 downto 0) ?= B"010" - else std_logic_vector(signed(A) sll 16) and B"11111111111111110000000000000000" when ALUC(2 downto 0) ?= B"110" + else std_logic_vector(signed(A) sll 16) and H"FFFF0000" when ALUC(2 downto 0) ?= B"110" else std_logic_vector(signed(A) sll to_integer(unsigned(B))) when ALUC ?= B"0011" else std_logic_vector(signed(A) srl to_integer(unsigned(B))) when ALUC ?= B"0111" else std_logic_vector(signed(A) sra to_integer(unsigned(B))) when ALUC ?= B"1111"; - Z <= S ?= "00000000000000000000000000000000"; + Z <= S ?= H"00000000"; end architecture; |