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| author | Copybara-Service <copybara-worker@google.com> | 2023-02-13 12:21:45 -0800 |
|---|---|---|
| committer | Copybara-Service <copybara-worker@google.com> | 2023-02-13 12:21:45 -0800 |
| commit | d6a45e95ab515b55a2437835fdd5873c6572131d (patch) | |
| tree | 4589fbc70c4e3e98d36a1e4ff3aa83c2744f92d7 | |
| parent | 19a44466c19f15b1e9134b10430a2530688b9a2e (diff) | |
| parent | 8e3a3e5f56407f3d675ac9041a20f7455c2ef01a (diff) | |
| download | abseil-d6a45e95ab515b55a2437835fdd5873c6572131d.tar.gz abseil-d6a45e95ab515b55a2437835fdd5873c6572131d.tar.bz2 abseil-d6a45e95ab515b55a2437835fdd5873c6572131d.zip | |
Merge pull request #1381 from trishvl:master
PiperOrigin-RevId: 509299527
Change-Id: I2f9a801faf87f968f1625711a67d38a528f0740c
| -rw-r--r-- | absl/base/config.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/absl/base/config.h b/absl/base/config.h index c2a973af..a17547be 100644 --- a/absl/base/config.h +++ b/absl/base/config.h @@ -889,7 +889,8 @@ static_assert(ABSL_INTERNAL_INLINE_NAMESPACE_STR[0] != 'h' || #error ABSL_INTERNAL_HAVE_SSE cannot be directly set #elif defined(__SSE__) #define ABSL_INTERNAL_HAVE_SSE 1 -#elif defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1) +#elif (defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1)) && \ + !defined(_M_ARM64EC) // MSVC only defines _M_IX86_FP for x86 32-bit code, and _M_IX86_FP >= 1 // indicates that at least SSE was targeted with the /arch:SSE option. // All x86-64 processors support SSE, so support can be assumed. @@ -904,7 +905,8 @@ static_assert(ABSL_INTERNAL_INLINE_NAMESPACE_STR[0] != 'h' || #error ABSL_INTERNAL_HAVE_SSE2 cannot be directly set #elif defined(__SSE2__) #define ABSL_INTERNAL_HAVE_SSE2 1 -#elif defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 2) +#elif (defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 2)) && \ + !defined(_M_ARM64EC) // MSVC only defines _M_IX86_FP for x86 32-bit code, and _M_IX86_FP >= 2 // indicates that at least SSE2 was targeted with the /arch:SSE2 option. // All x86-64 processors support SSE2, so support can be assumed. |