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author | Benjamin Barenblat <bbaren@google.com> | 2023-05-08 14:52:14 -0400 |
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committer | Benjamin Barenblat <bbaren@google.com> | 2023-05-08 14:52:14 -0400 |
commit | fc2fb225f1848cb9908fb99229cd22206835a34c (patch) | |
tree | f93a3e6006a9f4ff5eb9f43e1259669b916dcf5a /debian/patches/cpu-features.diff | |
parent | b0e6f2f2877899f1bf361852eaec3eb56aaac74d (diff) | |
download | abseil-fc2fb225f1848cb9908fb99229cd22206835a34c.tar.gz abseil-fc2fb225f1848cb9908fb99229cd22206835a34c.tar.bz2 abseil-fc2fb225f1848cb9908fb99229cd22206835a34c.zip |
Update patches
Bump SONAME and inline namespace in configuration, and delete a patch
that has been applied upstream.
Diffstat (limited to 'debian/patches/cpu-features.diff')
-rw-r--r-- | debian/patches/cpu-features.diff | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/debian/patches/cpu-features.diff b/debian/patches/cpu-features.diff index 7610e6b1..2f462e39 100644 --- a/debian/patches/cpu-features.diff +++ b/debian/patches/cpu-features.diff @@ -17,7 +17,7 @@ Explicitly set supported CPU features. --- a/absl/base/config.h +++ b/absl/base/config.h -@@ -862,7 +862,7 @@ +@@ -887,7 +887,7 @@ // which architectures support the various x86 instruction sets. #ifdef ABSL_INTERNAL_HAVE_SSE #error ABSL_INTERNAL_HAVE_SSE cannot be directly set @@ -26,7 +26,7 @@ Explicitly set supported CPU features. #define ABSL_INTERNAL_HAVE_SSE 1 #elif defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 1) // MSVC only defines _M_IX86_FP for x86 32-bit code, and _M_IX86_FP >= 1 -@@ -877,7 +877,7 @@ +@@ -902,7 +902,7 @@ // which architectures support the various x86 instruction sets. #ifdef ABSL_INTERNAL_HAVE_SSE2 #error ABSL_INTERNAL_HAVE_SSE2 cannot be directly set @@ -35,7 +35,7 @@ Explicitly set supported CPU features. #define ABSL_INTERNAL_HAVE_SSE2 1 #elif defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 2) // MSVC only defines _M_IX86_FP for x86 32-bit code, and _M_IX86_FP >= 2 -@@ -898,15 +898,13 @@ +@@ -923,8 +923,6 @@ // by the CPU. #ifdef ABSL_INTERNAL_HAVE_SSSE3 #error ABSL_INTERNAL_HAVE_SSSE3 cannot be directly set @@ -44,10 +44,11 @@ Explicitly set supported CPU features. #endif // ABSL_INTERNAL_HAVE_ARM_NEON is used for compile-time detection of NEON (ARM - // SIMD). +@@ -936,7 +934,7 @@ + // https://llvm.org/docs/CompileCudaWithLLVM.html#detecting-clang-vs-nvcc-from-code #ifdef ABSL_INTERNAL_HAVE_ARM_NEON #error ABSL_INTERNAL_HAVE_ARM_NEON cannot be directly set --#elif defined(__ARM_NEON) +-#elif defined(__ARM_NEON) && !defined(__CUDA_ARCH__) +#elif defined(__aarch64__) #define ABSL_INTERNAL_HAVE_ARM_NEON 1 #endif |