diff options
| -rw-r--r-- | absl/crc/internal/cpu_detect.cc | 25 | ||||
| -rw-r--r-- | absl/crc/internal/cpu_detect.h | 3 | ||||
| -rw-r--r-- | absl/crc/internal/crc_x86_arm_combined.cc | 5 |
3 files changed, 28 insertions, 5 deletions
diff --git a/absl/crc/internal/cpu_detect.cc b/absl/crc/internal/cpu_detect.cc index b3078137..d7eedd1c 100644 --- a/absl/crc/internal/cpu_detect.cc +++ b/absl/crc/internal/cpu_detect.cc @@ -243,11 +243,26 @@ CpuType GetCpuType() { ABSL_INTERNAL_AARCH64_ID_REG_READ(MIDR_EL1, midr); uint32_t implementer = (midr >> 24) & 0xff; uint32_t part_number = (midr >> 4) & 0xfff; - if (implementer == 0x41 && part_number == 0xd0c) { - return CpuType::kArmNeoverseN1; - } - if (implementer == 0xc0 && part_number == 0xac3) { - return CpuType::kAmpereSiryn; + switch (implementer) { + case 0x41: + switch (part_number) { + case 0xd0c: return CpuType::kArmNeoverseN1; + case 0xd40: return CpuType::kArmNeoverseV1; + case 0xd49: return CpuType::kArmNeoverseN2; + case 0xd4f: return CpuType::kArmNeoverseV2; + default: + return CpuType::kUnknown; + } + break; + case 0xc0: + switch (part_number) { + case 0xac3: return CpuType::kAmpereSiryn; + default: + return CpuType::kUnknown; + } + break; + default: + return CpuType::kUnknown; } } return CpuType::kUnknown; diff --git a/absl/crc/internal/cpu_detect.h b/absl/crc/internal/cpu_detect.h index 8d09dc27..01e19590 100644 --- a/absl/crc/internal/cpu_detect.h +++ b/absl/crc/internal/cpu_detect.h @@ -39,7 +39,10 @@ enum class CpuType { kIntelSandybridge, kIntelWestmere, kArmNeoverseN1, + kArmNeoverseV1, kAmpereSiryn, + kArmNeoverseN2, + kArmNeoverseV2 }; // Returns the type of host CPU this code is running on. Returns kUnknown if diff --git a/absl/crc/internal/crc_x86_arm_combined.cc b/absl/crc/internal/crc_x86_arm_combined.cc index dfb3b325..51eff4ed 100644 --- a/absl/crc/internal/crc_x86_arm_combined.cc +++ b/absl/crc/internal/crc_x86_arm_combined.cc @@ -634,11 +634,16 @@ CRCImpl* TryNewCRC32AcceleratedX86ARMCombined() { return new CRC32AcceleratedX86ARMCombinedMultipleStreams< 3, 0, CutoffStrategy::Fold3>(); case CpuType::kArmNeoverseN1: + case CpuType::kArmNeoverseN2: + case CpuType::kArmNeoverseV1: return new CRC32AcceleratedX86ARMCombinedMultipleStreams< 1, 1, CutoffStrategy::Unroll64CRC>(); case CpuType::kAmpereSiryn: return new CRC32AcceleratedX86ARMCombinedMultipleStreams< 3, 2, CutoffStrategy::Fold3>(); + case CpuType::kArmNeoverseV2: + return new CRC32AcceleratedX86ARMCombinedMultipleStreams< + 1, 2, CutoffStrategy::Unroll64CRC>(); #if defined(__aarch64__) default: // Not all ARM processors support the needed instructions, so check here |