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| author | Alexey Neyman <stilor@att.net> | 2018-01-23 09:01:44 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-01-23 09:01:44 -0800 |
| commit | b355005f56bb7fab913e521f5c33facf2b8760e6 (patch) | |
| tree | e4d38b75df90dfc9a921f5270f00d7d8d6b8c08d | |
| parent | 59e52b28137f520f4868cc6e538b6a6021a9c979 (diff) | |
| parent | c8c92496599f64a397209806fe70758b79fdd6d2 (diff) | |
| download | crosstool-ng-b355005f56bb7fab913e521f5c33facf2b8760e6.tar.gz crosstool-ng-b355005f56bb7fab913e521f5c33facf2b8760e6.tar.bz2 crosstool-ng-b355005f56bb7fab913e521f5c33facf2b8760e6.zip | |
Merge pull request #899 from franzflasch/master
riscv: Add ARCH_SUPPORTS_WITH_ABI and ARCH_SUPPORTS_WITH_ARCH
| -rw-r--r-- | config/arch/riscv.in | 2 | ||||
| -rw-r--r-- | samples/riscv32-hifive1-elf/crosstool.config | 6 | ||||
| -rw-r--r-- | samples/riscv32-hifive1-elf/reported.by | 3 |
3 files changed, 11 insertions, 0 deletions
diff --git a/config/arch/riscv.in b/config/arch/riscv.in index e8c1297b..4efde976 100644 --- a/config/arch/riscv.in +++ b/config/arch/riscv.in @@ -5,6 +5,8 @@ ## ## select ARCH_SUPPORTS_32 ## select ARCH_DEFAULT_32 +## select ARCH_SUPPORTS_WITH_ABI +## select ARCH_SUPPORTS_WITH_ARCH ## select GCC_REQUIRE_7_or_later ## help The RISC-V architecture, as defined by: diff --git a/samples/riscv32-hifive1-elf/crosstool.config b/samples/riscv32-hifive1-elf/crosstool.config new file mode 100644 index 00000000..18f8870e --- /dev/null +++ b/samples/riscv32-hifive1-elf/crosstool.config @@ -0,0 +1,6 @@ +CT_EXPERIMENTAL=y +CT_ARCH_RISCV=y +CT_ARCH_ARCH="rv32ima" +CT_ARCH_ABI="ilp32" +CT_TARGET_VENDOR="hifive1" +# CT_CC_GCC_LDBL_128 is not set diff --git a/samples/riscv32-hifive1-elf/reported.by b/samples/riscv32-hifive1-elf/reported.by new file mode 100644 index 00000000..291cc000 --- /dev/null +++ b/samples/riscv32-hifive1-elf/reported.by @@ -0,0 +1,3 @@ +reporter_name="Franz Flasch" +reporter_url="https://github.com/franzflasch/crosstool-ng" +reporter_comment="" |