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authorChris Packham <judge.packham@gmail.com>2023-09-13 17:10:20 +1200
committerChris Packham <judge.packham@gmail.com>2023-09-17 15:41:50 +1200
commitc175b21ce470a07875a5db86f21439f02f93df0e (patch)
treefb9e2da6156e247142f9c67fe21edd5a5978f66a /packages/gcc/10.5.0/0026-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch
parent977ed69427889a09f8e77ff9b60a6d50a18d8417 (diff)
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gcc: Bring in upstream fixes for CVE-2023-4039
Bring in the fixes for GCC 7 through 13. https://rtx.meta.security/mitigation/2023/09/12/CVE-2023-4039.html https://developer.arm.com/Arm%20Security%20Center/GCC%20Stack%20Protector%20Vulnerability%20AArch64 Signed-off-by: Chris Packham <judge.packham@gmail.com>
Diffstat (limited to 'packages/gcc/10.5.0/0026-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch')
-rw-r--r--packages/gcc/10.5.0/0026-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch49
1 files changed, 49 insertions, 0 deletions
diff --git a/packages/gcc/10.5.0/0026-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch b/packages/gcc/10.5.0/0026-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch
new file mode 100644
index 00000000..30142714
--- /dev/null
+++ b/packages/gcc/10.5.0/0026-aarch64-Explicitly-handle-frames-with-no-saved-regis.patch
@@ -0,0 +1,49 @@
+From c8ffe35ca907e0042524a5369158fcb5631d5108 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Fri, 16 Jun 2023 17:00:51 +0100
+Subject: [PATCH 26/42] aarch64: Explicitly handle frames with no saved
+ registers
+
+If a frame has no saved registers, it can be allocated in one go.
+There is no need to treat the areas below and above the saved
+registers as separate.
+
+And if we allocate the frame in one go, it should be allocated
+as the initial_adjust rather than the final_adjust. This allows the
+frame size to grow to guard_size - guard_used_by_caller before a stack
+probe is needed. (A frame with no register saves is necessarily a
+leaf frame.)
+
+This is a no-op as thing stand, since a leaf function will have
+no outgoing arguments, and so all the frame will be above where
+the saved registers normally go.
+
+gcc/
+ * config/aarch64/aarch64.c (aarch64_layout_frame): Explicitly
+ allocate the frame in one go if there are no saved registers.
+---
+ gcc/config/aarch64/aarch64.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
+index 2aaf187bcc3f..81537c019511 100644
+--- a/gcc/config/aarch64/aarch64.c
++++ b/gcc/config/aarch64/aarch64.c
+@@ -7035,9 +7035,11 @@ aarch64_layout_frame (void)
+
+ HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset;
+ HOST_WIDE_INT const_saved_regs_size;
+- if (frame.frame_size.is_constant (&const_size)
+- && const_size < max_push_offset
+- && known_eq (frame.hard_fp_offset, const_size))
++ if (known_eq (frame.saved_regs_size, 0))
++ frame.initial_adjust = frame.frame_size;
++ else if (frame.frame_size.is_constant (&const_size)
++ && const_size < max_push_offset
++ && known_eq (frame.hard_fp_offset, const_size))
+ {
+ /* Simple, small frame with no outgoing arguments:
+
+--
+2.42.0
+