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| author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2020-04-04 17:39:30 +0200 |
|---|---|---|
| committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2020-04-04 17:39:32 +0200 |
| commit | 1919553cf0f4605491a44f3a458aa31fd81580fc (patch) | |
| tree | db29fcc97ee9c4da6702b56beb8389c82725f483 | |
| parent | d8029bb8eebeb43cb1879a618eda70a8f53042cc (diff) | |
| download | gnumach-1919553cf0f4605491a44f3a458aa31fd81580fc.tar.gz gnumach-1919553cf0f4605491a44f3a458aa31fd81580fc.tar.bz2 gnumach-1919553cf0f4605491a44f3a458aa31fd81580fc.zip | |
pmap: Fix boot with kvm+PAE on some systems
It seems some systems refuse the W bit in the pdp. Only enable it for
Xen PV tables which do require it.
* i386/intel/pmap.c (pmap_bootstrap, pmap_create) [!MACH_PV_PAGETABLES]:
Do not set INTEL_PTE_WRITE in pdpbase entries.
| -rw-r--r-- | i386/intel/pmap.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/i386/intel/pmap.c b/i386/intel/pmap.c index 108ea048..ac0e3865 100644 --- a/i386/intel/pmap.c +++ b/i386/intel/pmap.c @@ -649,7 +649,11 @@ void pmap_bootstrap(void) WRITE_PTE(&kernel_pmap->pdpbase[i], pa_to_pte(_kvtophys((void *) kernel_page_dir + i * INTEL_PGBYTES)) - | INTEL_PTE_VALID | INTEL_PTE_WRITE); + | INTEL_PTE_VALID +#ifdef MACH_PV_PAGETABLES + | INTEL_PTE_WRITE +#endif + ); } #ifdef __x86_64__ #ifdef MACH_HYP @@ -1289,7 +1293,11 @@ pmap_t pmap_create(vm_size_t size) for (i = 0; i < PDPNUM; i++) WRITE_PTE(&p->pdpbase[i], pa_to_pte(kvtophys((vm_offset_t) page_dir[i])) - | INTEL_PTE_VALID | INTEL_PTE_WRITE); + | INTEL_PTE_VALID +#ifdef MACH_PV_PAGETABLES + | INTEL_PTE_WRITE +#endif + ); } #ifdef __x86_64__ // FIXME: use kmem_cache_alloc instead |