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author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2020-11-28 01:31:15 +0100 |
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committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2020-11-28 01:52:55 +0100 |
commit | 4a8995ba22e0862eb8ece1d721870326669719ce (patch) | |
tree | ed28e60d134479b4eb0c78a68f8404ddcd952568 /i386 | |
parent | 0b1f1658732cd0e38ecb84a98b3bdf7a97a3b122 (diff) | |
download | gnumach-4a8995ba22e0862eb8ece1d721870326669719ce.tar.gz gnumach-4a8995ba22e0862eb8ece1d721870326669719ce.tar.bz2 gnumach-4a8995ba22e0862eb8ece1d721870326669719ce.zip |
x86: Pave the way for xsave/xrstor support
* i386/i386/fpu.h (xgetbv, get_xcr0, xsetbv, set_xcr0): New inline
functions.
(xsave, xrstor): New macros.
* i386/i386/locore.S (cpu_features): Extend to two words.
(cpu_features_edx, cpu_features_ecx): New labels.
(discover_x86_cpu_type): Also save ecx cpuid(1) report.
* x86_64/locore.S: Likewise.
* i386/i386/locore.h (cpu_features): Extend to two words.
(CPU_FEATURE_XSAVE): New macro.
* i386/i386/proc_reg.h (CR4_OSXSAVE): New macro.
Diffstat (limited to 'i386')
-rw-r--r-- | i386/i386/fpu.h | 29 | ||||
-rw-r--r-- | i386/i386/locore.S | 6 | ||||
-rw-r--r-- | i386/i386/locore.h | 3 | ||||
-rw-r--r-- | i386/i386/proc_reg.h | 2 |
4 files changed, 38 insertions, 2 deletions
diff --git a/i386/i386/fpu.h b/i386/i386/fpu.h index caade5d4..4050cce4 100644 --- a/i386/i386/fpu.h +++ b/i386/i386/fpu.h @@ -73,6 +73,35 @@ #define fxrstor(state) \ asm volatile("fxrstor %0" : : "m" (state)) +static inline uint64_t xgetbv(uint32_t n) { + uint32_t eax, edx; + asm volatile("xgetbv" : "=a" (eax), "=d" (edx) : "c" (n)); + return eax + ((uint64_t) edx << 32); +} + +static inline uint64_t get_xcr0(void) { + return xgetbv(0); +} + +static inline void xsetbv(uint32_t n, uint64_t value) { + uint32_t eax, edx; + + eax = value; + edx = value >> 32; + + asm volatile("xsetbv" : : "c" (n), "a" (eax), "d" (edx)); +} + +static inline void set_xcr0(uint64_t value) { + xsetbv(0, value); +} + +#define xsave(state) \ + asm volatile("xsave %0" : "=m" (*state)) + +#define xrstor(state) \ + asm volatile("xrstor %0" : : "m" (state)) + #define fwait() \ asm("fwait"); diff --git a/i386/i386/locore.S b/i386/i386/locore.S index a0960a26..bee3630c 100644 --- a/i386/i386/locore.S +++ b/i386/i386/locore.S @@ -1177,6 +1177,9 @@ syscall_addr: .data DATA(cpu_features) +DATA(cpu_features_edx) + .long 0 +DATA(cpu_features_ecx) .long 0 .text @@ -1226,7 +1229,8 @@ ENTRY(discover_x86_cpu_type) use it to find out what we are. */ 0: movl $1,%eax /* Fetch CPU type info ... */ cpuid /* ... into eax */ - movl %edx,cpu_features /* Keep a copy */ + movl %ecx,cpu_features_ecx /* Keep a copy */ + movl %edx,cpu_features_edx /* Keep a copy */ shrl $8,%eax /* Slide family bits down */ andl $15,%eax /* And select them */ diff --git a/i386/i386/locore.h b/i386/i386/locore.h index 6948f72d..00da07ad 100644 --- a/i386/i386/locore.h +++ b/i386/i386/locore.h @@ -58,7 +58,7 @@ extern void cpu_shutdown (void); extern int syscall (void); -extern unsigned int cpu_features[1]; +extern unsigned int cpu_features[2]; #define CPU_FEATURE_FPU 0 #define CPU_FEATURE_VME 1 @@ -89,6 +89,7 @@ extern unsigned int cpu_features[1]; #define CPU_FEATURE_HTT 28 #define CPU_FEATURE_TM 29 #define CPU_FEATURE_PBE 31 +#define CPU_FEATURE_XSAVE (1*32 + 26) #define CPU_HAS_FEATURE(feature) (cpu_features[(feature) / 32] & (1 << ((feature) % 32))) diff --git a/i386/i386/proc_reg.h b/i386/i386/proc_reg.h index c787ef26..624819c6 100644 --- a/i386/i386/proc_reg.h +++ b/i386/i386/proc_reg.h @@ -68,6 +68,8 @@ * and FXRSTOR instructions */ #define CR4_OSXMMEXCPT 0x0400 /* Operating System Support for Unmasked * SIMD Floating-Point Exceptions */ +#define CR4_OSXSAVE 0x40000 /* Operating System Support for XSAVE + * and XRSTOR instructions */ #ifndef __ASSEMBLER__ #ifdef __GNUC__ |