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author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2023-02-15 09:55:00 +0100 |
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committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2023-02-15 09:55:00 +0100 |
commit | 66a3231294db21599b44a8f6e157f4d0ea72c86a (patch) | |
tree | 7ee3091b923c531af593456f2b97ca1619a37ba1 /i386 | |
parent | d6ff5ba739da9bdafee1acfbddbd98839a9b8bfc (diff) | |
download | gnumach-66a3231294db21599b44a8f6e157f4d0ea72c86a.tar.gz gnumach-66a3231294db21599b44a8f6e157f4d0ea72c86a.tar.bz2 gnumach-66a3231294db21599b44a8f6e157f4d0ea72c86a.zip |
pmap: Do not send TLB flush IPI when a cpu is idle
MARK_CPU_ACTIVE already knows to flush TLB when a cpu comes out of idle.
However, add memory barriers to be sure that setting cpu_update_needed is
seen before testing for cpus_idle.
Diffstat (limited to 'i386')
-rw-r--r-- | i386/intel/pmap.c | 3 | ||||
-rw-r--r-- | i386/intel/pmap.h | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/i386/intel/pmap.c b/i386/intel/pmap.c index fa5bcc3c..129e600b 100644 --- a/i386/intel/pmap.c +++ b/i386/intel/pmap.c @@ -3013,7 +3013,8 @@ void signal_cpus( cpu_update_needed[which_cpu] = TRUE; simple_unlock(&update_list_p->lock); - if (((cpus_idle & (1 << which_cpu)) == 0) || (pmap == kernel_pmap)) + __sync_synchronize(); + if (((cpus_idle & (1 << which_cpu)) == 0)) interrupt_processor(which_cpu); use_list &= ~(1 << which_cpu); } diff --git a/i386/intel/pmap.h b/i386/intel/pmap.h index 78d27bc8..68784ac9 100644 --- a/i386/intel/pmap.h +++ b/i386/intel/pmap.h @@ -424,6 +424,7 @@ pt_entry_t *pmap_pte(const pmap_t pmap, vm_offset_t addr); * interrupt if this happens. \ */ \ i_bit_clear((my_cpu), &cpus_idle); \ + __sync_synchronize(); \ \ if (cpu_update_needed[(my_cpu)]) \ pmap_update_interrupt(); \ |