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* Fix boot with smp 1gfleury2025-01-111-0/+3
| | | | Message-ID: <20250111083330.26863-1-gfleury@disroot.org>
* i386/irq: Add missing enumeration for high interruptsDamien Zammit2024-12-291-1/+3
| | | | | | Because we support up to 64 irqs with 2 IOAPICs. Message-ID: <20241228042008.704671-1-damien@zamaudio.com>
* xen: Fix buildSamuel Thibault2024-12-281-0/+2
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* apic: Add extended feature registers for local apic unitDamien Zammit via Bug reports for the GNU Hurd2024-12-226-5/+55
| | | | | | Add workaround for broken systems that advertise 8 bit APIC ids but only match IPIs on 4 bits of the APIC id. Message-ID: <20241222014306.430098-4-damien@zamaudio.com>
* smp: Use deassert for startup IPI not assertDamien Zammit via Bug reports for the GNU Hurd2024-12-221-22/+40
| | | | | | | | Fixes ESR==0x8 error on AMD fam15h. Fixed timings. Cannot locate documentation on correct mode for STARTUP IPI, but this patch works on AMD hw and qemu. Message-ID: <20241222014306.430098-3-damien@zamaudio.com>
* smp: Parallel SMP initDamien Zammit via Bug reports for the GNU Hurd2024-12-225-64/+31
| | | | | | | | | Now that things are in place, we switch to parallel init. The key to this change is that the INIT/STARTUP sequence is done in one step, and all cpus wake up at the same time. Synchronisation is done via waiting for individual flags stored in separate memory locations. Message-ID: <20241222014306.430098-2-damien@zamaudio.com>
* cpuboot: Use x86 array indexing to make code more readableSamuel Thibault2024-12-221-15/+6
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* cpuboot: Make sure we copy forwardSamuel Thibault2024-12-221-0/+1
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* cpuboot: Fix percpu apboot_gdt for early gsDamien Zammit via Bug reports for the GNU Hurd2024-12-221-10/+53
| | | | | | | | This allocates a constant space for percpu gdts and copies the first entry to the nth entry on each cpu, then patches its own copy of the gdt so it can function independently. Message-ID: <20241221235456.423860-2-damien@zamaudio.com>
* acpi_parse_apic: Check CAPABLE bit field on lapic MADT flagDamien Zammit via Bug reports for the GNU Hurd2024-12-212-1/+3
| | | | | | Previously, we were ignoring cpus that were not enabled but online-capable. Message-ID: <20241221023937.384420-1-damien@zamaudio.com>
* smp: Make sure BSP is cpu 0 when starting other cpusDamien Zammit via Bug reports for the GNU Hurd2024-12-101-1/+3
| | | | | | | This is basically a no-op but ensures we are doing smp bringup correctly. Message-ID: <20241210072926.911061-5-damien@zamaudio.com>
* i386/apic: Fix logical id numberingDamien Zammit2024-12-102-2/+2
| | | | | The number is actually a mask bit per cpu. Message-ID: <20241210072926.911061-2-damien@zamaudio.com>
* Fix various function pointer typesSergey Bugaev2024-12-101-1/+1
| | | | | | | Fixes Wincompatible-pointer-types errors on GCC 15. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com> Message-ID: <20241210115705.710555-1-bugaevc@gmail.com>
* i386/apic: Fix condition on non-BSPDamien Zammit via Bug reports for the GNU Hurd2024-12-091-4/+1
| | | | | | | | The condition was intended for non-BSP processors to disable timer, but apic_id != 0 means it could affect BSP if its apic id is non-zero. Fixes this bug. Message-ID: <20241209121706.879984-7-damien@zamaudio.com>
* smp: Use logical destination not physical apic idDamien Zammit via Bug reports for the GNU Hurd2024-12-096-14/+23
| | | | | | | | | | | | | | | Since modern x86 cpus only support 4 bits of destination field in ICR, we could only address up to 16 processors, assuming their physical APIC ID was < 0x10. Some processors eg AMD fam15h have physical apic ids starting at 0x10 but only support 4 bits. So these lapics are unaddressable using physical destination mode. Therefore, we switch to using logical destinations for IPIs which gives us 8 bits of unique mask for addressing up to 8 groups of processors. INIT and STARTUP is not changed here. Message-ID: <20241209121706.879984-6-damien@zamaudio.com>
* pmap: Separate temporary_mapping from set_page_dirDamien Zammit via Bug reports for the GNU Hurd2024-12-093-2/+2
| | | | | | | Prepare for smp parallel init where we want to call these two functions on different cpus at different times. Message-ID: <20241209121706.879984-5-damien@zamaudio.com>
* i386/cpuboot: Dont use CPU_NUMBER_NO_STACK() earlyDamien Zammit via Bug reports for the GNU Hurd2024-12-091-1/+1
| | | | | | Since we just set up the gs segment, we can use CPU_NUMBER instead of CPU_NUMBER_NO_STACK. Message-ID: <20241209121706.879984-3-damien@zamaudio.com>
* Comment on the reason for the different CPU_NUMBER versionsSamuel Thibault2024-12-091-0/+3
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* i386/cpuboot: Simplify for legibilityDamien Zammit via Bug reports for the GNU Hurd2024-12-091-2/+3
| | | | | | | The current segmentation already adds -KERNELBASE. But only when accessing the memory. Message-ID: <20241209121706.879984-2-damien@zamaudio.com>
* mp_desc: Add assert for AP having non-zero cpu numberDamien Zammit via Bug reports for the GNU Hurd2024-12-071-0/+3
| | | | | | | | | | | Non-master processors cannot have cpu_number() == 0. The synchronisation fails hard if the cpu number is wrong. Alert the condition if this is the case. (On AMD fam15h, this assert currently fails, but I haven't been able to boot it with smp yet either). Message-ID: <20241207101222.800350-1-damien@zamaudio.com>
* fpu: Fix for cpus that have no fxsave instructionDamien Zammit via Bug reports for the GNU Hurd2024-12-051-17/+1
| | | | | | | | Fallthrough was incorrectly using fxsave() instead of xsave() or xsaveopt(). TESTED: on AMD fam15h: no longer throws "No coprocessor" exception. Message-ID: <20241205074929.704111-1-damien@zamaudio.com>
* Expose device(mbinfo) with read access to multiboot raw infoDamien Zammit2024-10-275-0/+95
| | | | Message-ID: <20241027092828.3162279-1-damien@zamaudio.com>
* multiboot: Support graphic mode preferencesDamien Zammit2024-10-262-8/+24
| | | | | | | | | | | This change forces multiboot loader to provide video mode info and also sets the preferred video mode to EGA text to ensure existing console behaviour still works. When support for graphical consoles is provided, we can change the preferred mode to linear framebuffer. Message-ID: <20241024001047.3033826-2-damien@zamaudio.com>
* multiboot v1: Add video framebuffer infoDamien Zammit2024-10-261-0/+72
| | | | Message-ID: <20241024001047.3033826-1-damien@zamaudio.com>
* fix a compile warning.jbranso@dismail.de2024-10-221-1/+1
| | | | | | | | | | | | | | * i386/i386at/acpi_parse_apci.c (acpi_print_info): %lx -> %llx i386/i386at/acpi_parse_apic.c: In function 'acpi_print_info': i386/i386at/acpi_parse_apic.c:51:25: warning: format '%lx' expects argument of type 'long unsigned int', but argument 2 has type 'phys_addr_t' {aka 'long long unsigned int'} [-Wformat=] 51 | printf(" rsdp = 0x%lx\n", rsdp); | ~~^ ~~~~ | | | | | phys_addr_t {aka long long unsigned int} | long unsigned int | %llx Message-ID: <20241022173641.2774-2-jbranso@dismail.de>
* fix some compiler warnings.jbranso@dismail.de2024-10-221-16/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I compiled with ./configure --enable-xen --enable-acpi. * i386/intel/pmap.c (pmap_bootstrap_xen, pmap_bootstrap, pmap_set_page_readwrite, pmap_clear_bootstrap_pagetable, pmap_map_mfn, pmap_expand_level, pmap_collect): Lots of tiny changes. I've copied in some of the error messages. cast many variables to (long unsigned int), (vm_offset_t) -> (unsigned long), %llx <-- (uint64_t) variable, In file included from i386/intel/pmap.c:63: i386/intel/pmap.c: In function 'pmap_bootstrap_xen': i386/intel/pmap.c:703:39: warning: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'unsigned int' [-Wformat=] 703 | panic("couldn't pin page %p(%lx)", l1_map[n_l1map], (vm_offset_t) kv_to_ma (l1_map[n_l1map])); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ i386/intel/pmap.c: In function 'pmap_set_page_readwrite': i386/intel/pmap.c:897:23: warning: format '%lx' expects argument of type 'long unsigned int', but argument 5 has type 'vm_offset_t' {aka 'unsigned int'} [-Wformat=] 897 | panic("couldn't set hiMMU readwrite for addr %lx(%lx)\n", vaddr, (vm_offset_t) pa_to_ma (paddr)); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~ | | | vm_offset_t {aka unsigned int} ./kern/debug.h:67:50: note: in definition of macro 'panic' 67 | Panic (__FILE__, __LINE__, __FUNCTION__, s, ##__VA_ARGS__) | ^ i386/intel/pmap.c:897:64: note: format string is defined here 897 | panic("couldn't set hiMMU readwrite for addr %lx(%lx)\n", vaddr, (vm_offset_t) pa_to_ma (paddr)); | ~~^ | | | long unsigned int | %x i386/intel/pmap.c:897:23: warning: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'unsigned int' [-Wformat=] 897 | panic("couldn't set hiMMU readwrite for addr %lx(%lx)\n", vaddr, (vm_offset_t) pa_to_ma (paddr)); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ./kern/debug.h:67:50: note: in definition of macro 'panic' 67 | Panic (__FILE__, __LINE__, __FUNCTION__, s, ##__VA_ARGS__) | ^ i386/intel/pmap.c:897:68: note: format string is defined here 897 | panic("couldn't set hiMMU readwrite for addr %lx(%lx)\n", vaddr, (vm_offset_t) pa_to_ma (paddr)); | ~~^ | | | long unsigned int | %x Message-ID: <20241022173641.2774-1-jbranso@dismail.de>
* ioapic: Initially mask all IRQs individuallyDamien Zammit2024-10-221-0/+9
| | | | | | | This fixes a spurious intnull(9) from occurring on real hardware during ACPI startup when compiled with --enable-apic Message-ID: <20241021032217.2915842-1-damien@zamaudio.com>
* fix a compiler warning.jbranso@dismail.de2024-10-211-0/+4
| | | | | | | | | | | | | | * i386/intel/pmap.c (pmap_page_table_page_dealloc): define it only on the Xen platform. Best not to delete page_alloc, so we know how to do so if need be. i386/intel/pmap.c:1265:1: warning: 'pmap_page_table_page_dealloc' defined but not used [-Wunused-function] 1265 | pmap_page_table_page_dealloc(vm_offset_t pa) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ i386/intel/pmap.c:1171:1: warning: 'pmap_page_table_page_alloc' defined but not used [-Wunused-function] 1171 | pmap_page_table_page_alloc(void) | ^~~~~~~~~~~~~~~~~~~~~~~~~~ Message-ID: <20241020190744.2522-3-jbranso@dismail.de>
* fpu_set_state: accept fp_save_kind being incoherent if initialized is not setSamuel Thibault2024-09-081-1/+1
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* fpu_set_state: return an error on incoherent fp_save_kindSamuel Thibault2024-09-081-1/+3
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* add xfloat thread state interfaceLuca Dariz2024-09-085-43/+161
| | | | | | | | | | | | | | | | | * i386/i386/fpu.c: extend current getter and setter to support the extended state; move the struct casting here to reuse the locking and allocation logic for the thread state; make sure the new state is set as valid, otherwise it won't be applied; add i386_get_xstate_size() to dynamically retrieve the FPU state size. * i386/i386/fpu.h: update prototypes to accept generic thread state * i386/i386/pcb.c: forward raw thread state to getter and setter, only checking for minimum size and use the new i386_get_xstate_size() helper. * i386/include/mach/i386/mach_i386.defs: expose the new helper i386_get_xstate_size(). * i386/include/mach/i386/thread_status.h: add interface definition for I386_XFLOAT_STATE and the corresponding data structure. Message-ID: <20240904201806.510082-1-luca@orpolo.org>
* fpu: Drop conflicting alignmentSamuel Thibault2024-07-311-1/+1
| | | | | struct i386_xfp_xstate_header header is at offset 440 of struct i386_xfp_save, so not a multiple of 64 anyway.
* Fix xen buildSamuel Thibault2024-07-071-0/+2
| | | | | with -Werror=incompatible-pointer-types and -Werror=implicit-function-declaration.
* SMP: force APICSamuel Thibault2024-04-051-0/+6
| | | | We need it to properly driver interrupts etc. of APs
* kd: Include i386/irq.hSamuel Thibault2024-03-271-0/+1
| | | | to get unmask_irq declaration
* Make -fno-PIE etc. architecture-dependentSergey Bugaev2024-03-271-0/+4
| | | | | | | | | | There might be good reasons why Mach on x86 shouldn't be built as PIC/ PIE, but there are also very good reasons to support PIE on other architectures. Potentially implementing KASLR is one such reason; but also the Linux AArch64 boot protocol (that the AArch64 port will use for booting) lets the bootloader load the kernel image at any address, which makes PIC pretty much required. Message-ID: <20240327161841.95685-11-bugaevc@gmail.com>
* x86_64: avoid iterating over the message twice in copyoutmsg/copyinmsg for ↵Flavio Cruz2024-03-111-0/+6
| | | | | | | | | | | | | | | | faster RPCs. This is a follow up to https://git.savannah.gnu.org/cgit/hurd/gnumach.git/commit/?id=69620634858b2992e1a362e33c95d9a8ee57bce7 where we made inlined ports 8 bytes long to avoid resizing. The last thing that copy{in,out}msg were doing was just updating msgt_size field since that's required for kernel stub code and implicitly assumed by IPC code. This was moved into ipc_kmsg_copy{in,out}_body. For a 32 bit userland, the code also stops updating msgt_size for out of line ports, same as the 64 bit userland. Message-ID: <ZdQxWNSieTHcpM1b@jupiter.tail36e24.ts.net>
* move x86 copy_user.[ch] to ipc/ and make it arch-indipendentLD2024-03-092-101/+0
| | | | Message-ID: <20240309140244.347835-3-luca@orpolo.org>
* remove machine/machspl.h as it duplicates machine/spl.hLD2024-03-0915-43/+13
| | | | Message-ID: <20240309140244.347835-2-luca@orpolo.org>
* pmap: Avoid leaking USER bit in page tablesSamuel Thibault2024-03-031-5/+6
| | | | | | | | | | We should only set USER - for user processes maps - for 32bit Xen support This was not actually posing problem since in 32bit segmentation protects us, and in 64bit the l4 entry for the kernel is already set. But better be safe than sorry.
* kernel traps: also catch general protection faultsSamuel Thibault2024-03-031-0/+3
| | | | | | If userland passes a kernel pointer, it's not a page fault that we get, but a general protection fault. We also want to go through the recovery in that case, to make e.g. copyin/out return an error.
* spl: Introduce assert_splvm and use it in process_pmap_updatesSamuel Thibault2024-02-232-0/+2
| | | | Suggested-by: Damien Zammit <damien@zamaudio.com>
* vm_map_lookup: Add parameter for keeping map lockedDamien Zammit2024-02-221-2/+2
| | | | | | | | | | | This adds a parameter called keep_map_locked to vm_map_lookup() that allows the function to return with the map locked. This is to prepare for fixing a bug with gsync where the map is locked twice by mistake. Co-Authored-By: Sergey Bugaev <bugaevc@gmail.com> Message-ID: <20240222082410.422869-3-damien@zamaudio.com>
* Introduce and use assert_splsched()Samuel Thibault2024-02-191-0/+1
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* process_pmap_updates: Use _nocheck form of lock, already at splvmDamien Zammit2024-02-191-2/+5
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* locore: Remove unnecessary call to CPU_NUMBERDamien Zammit2024-02-181-2/+1
| | | | The cpu number is already in edx register, so use that.
* Replace kernel header includes in include/mach/mach_types.h with forward ↵Flavio Cruz2024-02-124-1/+4
| | | | | | | | | | | | | | | declarations. I was trying to reuse TASK_NAME_SIZE in kern/thread.h but it was impossible because files included from kern/task.h end up requiring kern/thread.h (through percpu.h), creating a recursive dependency. With this change, mach_types.h only defines forward declarations and modules have to explicitly include the appropriate header file if they want to be able touch those structures. Most of the other includes are required because we no longer grab many different includes through mach_types.h. Message-ID: <20240212062634.1082207-1-flaviocruz@gmail.com>
* smp: Fix unable to enter kdb during bootDamien Zammit2024-02-112-2/+1
| | | | Message-ID: <20240211115958.1889648-1-damien@zamaudio.com>
* Fix build with APIC without SMPSamuel Thibault2024-02-102-1/+3
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* smp: Fix compile error with missing apboot_addrDamien Zammit2024-02-092-5/+5
| | | | Message-ID: <20240209021108.1715770-1-damien@zamaudio.com>
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