src/dsp/x86/intrapred_sse4.h


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591

/*
 * Copyright 2019 The libgav1 Authors
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#ifndef LIBGAV1_SRC_DSP_X86_INTRAPRED_SSE4_H_
#define LIBGAV1_SRC_DSP_X86_INTRAPRED_SSE4_H_

#include "src/dsp/dsp.h"
#include "src/utils/cpu.h"

namespace libgav1 {
namespace dsp {

// Initializes Dsp::intra_predictors. See the defines below for specifics.
// These functions are not thread-safe.
void IntraPredInit_SSE4_1();

}  // namespace dsp
}  // namespace libgav1

// If sse4 is enabled and the baseline isn't set due to a higher level of
// optimization being enabled, signal the sse4 implementation should be used.
#if LIBGAV1_TARGETING_SSE4_1
#ifndef LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorDcTop \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorDcTop \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorDcTop \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorDcTop \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorDcTop \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorDcTop \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorDcTop \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorDcTop \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorDcTop
#define LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorDcTop \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorDcLeft LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorDcLeft LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorDcLeft LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorDcLeft LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorDcLeft
#define LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorDc
#define LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorPaeth \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorPaeth \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorPaeth \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorPaeth LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorPaeth \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorPaeth \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorPaeth \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorPaeth \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorPaeth \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorPaeth
#define LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorPaeth \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize4x4_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize4x8_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize4x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize8x4_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize8x8_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize8x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize8x32_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize16x4_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize16x8_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize16x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize16x32_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize16x64_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize32x8_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize32x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize32x32_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize32x64_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize64x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize64x32_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorHorizontal
#define LIBGAV1_Dsp8bpp_TransformSize64x64_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

//------------------------------------------------------------------------------
// 10bpp

#ifndef LIBGAV1_Dsp10bpp_TransformSize4x4_IntraPredictorDcTop
#define LIBGAV1_Dsp10bpp_TransformSize4x4_IntraPredictorDcTop LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize4x4_IntraPredictorDcLeft
#define LIBGAV1_Dsp10bpp_TransformSize4x4_IntraPredictorDcLeft \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize4x4_IntraPredictorDc
#define LIBGAV1_Dsp10bpp_TransformSize4x4_IntraPredictorDc LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize4x4_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize4x4_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize4x8_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize4x8_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize4x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize4x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize8x4_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize8x4_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize8x8_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize8x8_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize8x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize8x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize8x32_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize8x32_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize16x4_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize16x4_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize16x8_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize16x8_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize16x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize16x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize16x32_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize16x32_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize16x64_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize16x64_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize32x8_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize32x8_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize32x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize32x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize32x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize32x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize32x32_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize32x32_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize32x64_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize32x64_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize64x16_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize64x16_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize64x32_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize64x32_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#ifndef LIBGAV1_Dsp10bpp_TransformSize64x64_IntraPredictorHorizontal
#define LIBGAV1_Dsp10bpp_TransformSize64x64_IntraPredictorHorizontal \
  LIBGAV1_CPU_SSE4_1
#endif

#endif  // LIBGAV1_TARGETING_SSE4_1

#endif  // LIBGAV1_SRC_DSP_X86_INTRAPRED_SSE4_H_