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* apic: Add extended feature registers for local apic unitDamien Zammit via Bug reports for the GNU Hurd2024-12-221-2/+6
| | | | | | Add workaround for broken systems that advertise 8 bit APIC ids but only match IPIs on 4 bits of the APIC id. Message-ID: <20241222014306.430098-4-damien@zamaudio.com>
* ioapic: Initially mask all IRQs individuallyDamien Zammit2024-10-221-0/+9
| | | | | | | This fixes a spurious intnull(9) from occurring on real hardware during ACPI startup when compiled with --enable-apic Message-ID: <20241021032217.2915842-1-damien@zamaudio.com>
* separate lapic_enable from lapic_setupDamien Zammit2024-02-081-0/+1
| | | | | | | This initializes the lapic without turning on the IOAPIC interrupts during SMP init. Message-ID: <20240207050158.1640853-2-damien@zamaudio.com>
* Support up to two IOAPICs with up to 32 GSIs on eachDamien Zammit2024-01-291-5/+84
| | | | | | | Previously, only IOAPIC[0] was supported. Now this supports up to two IOAPICs. Message-ID: <20240129100652.1262126-1-damien@zamaudio.com>
* ioapic: Remove IMCR toggleDamien Zammit2024-01-271-6/+0
| | | | | | | | Since we are not using legacy MP tables but intending to use ACPI to configure interrupt routing, we can assume all boards have virtual wire mode, thus do not require setting of IMCR register. (This may fix crashes on machines that do not have IMCR registers). Message-ID: <20240124035138.1044855-2-damien@zamaudio.com>
* ioapic: Add simple locking for non-atomic accessesDamien Zammit2023-09-301-0/+9
| | | | Message-Id: <20230930063032.75232-3-damien@zamaudio.com>
* ioapic: Detect version of IOAPIC for correct EOI handlingDamien Zammit2023-09-301-1/+14
| | | | Message-Id: <20230930063032.75232-2-damien@zamaudio.com>
* Fix crash at bootSamuel Thibault2023-08-281-0/+1
| | | | spl cannot be called before the clock is set up.
* ioapic: Timer calibrated in 10 mach ticksDamien Zammit2023-03-111-5/+4
| | | | | | | | hz variable is the number of mach ticks in 1 second. We want to know how many lapic ticks in 1 mach tick. Therefore, we set a timer for 10 mach ticks and divide the lapic stopwatch counter value by 10. Message-Id: <20230311072937.450161-1-damien@zamaudio.com>
* lapic timer: Calibrate via mach timer not PITDamien Zammit2023-03-071-35/+46
| | | | | | | | | | | Previously the lapic timer was calibrated by one-shot PIT timer2. This method can be buggy and generally unused in emulation environments. This patch reworks the timer calibration to use a mach timer based on regular PIT interrupts to remapped IOAPIC pin. This also changes the primary clock source to use PIT timer0 remapped to an IOAPIC pin when APIC mode is enabled, instead of a periodic lapic timer. Message-Id: <20230306070452.292697-1-damien@zamaudio.com>
* lapic timer: Calibrate based on 10 PIT sleeps for 10msDamien Zammit2023-02-261-8/+11
| | | | | | NB: This relies on a fix for QEMU as one-shot PIT mode is currently broken in qemu. Message-Id: <20230226013110.50606-1-damien@zamaudio.com>
* Make curr_ipl[] per cpuDamien Zammit2023-02-141-2/+5
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* i386: Refactor int stacks to be per cpu for SMPDamien Zammit2023-02-131-3/+2
| | | | | | | This also serialises the AP bringup, so paging can be enabled per cpu one by one. Also-by: Almudena Garcia <liberamenso10000@gmail.com>
* Always use directed EOI and disable focusDamien Zammit2023-01-311-9/+0
| | | | Message-Id: <20230131093428.756906-8-damien@zamaudio.com>
* i386: Fix lapic and ioapic for smpDamien Zammit2023-01-311-70/+27
| | | | | Also-by: Almudena Garcia <liberamenso10000@gmail.com> Message-Id: <20230131093428.756906-2-damien@zamaudio.com>
* i386: Add AP variants of descriptor tablesDamien Zammit2023-01-291-6/+0
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* Use -Wstrict-prototypes and fix warningsFlavio Cruz2022-12-211-3/+3
| | | | | | | Most of the changes include defining and using proper function type declarations (with argument types declared) and avoiding using the K&R style of function declarations. Message-Id: <Y6Jazsuis1QA0lXI@mars>
* Fix compiler warnings due to use of inline for mask_irq/unmask_irqFlavio Cruz2022-12-171-12/+0
| | | | Message-Id: <Y5z01C/L+pnSVNIP@mars>
* ioapic: Fix arg passing of redirection entryDamien Zammit2021-04-051-6/+7
| | | | Message-Id: <20210405115921.184572-3-damien@zamaudio.com>
* ioapic: Refactor EOIDamien Zammit2021-04-051-0/+2
| | | | Message-Id: <20210405115921.184572-2-damien@zamaudio.com>
* ioapic: Use irq specific EOI properly when detectedDamien Zammit2021-04-051-8/+22
| | | | Message-Id: <20210405052916.174771-5-damien@zamaudio.com>
* ioapic: target first processor for interruptsDamien Zammit2021-04-051-1/+2
| | | | Message-Id: <20210405052916.174771-3-damien@zamaudio.com>
* ioapic: Enable processor focus to BSPDamien Zammit2021-04-051-0/+3
| | | | Message-Id: <20210405052916.174771-2-damien@zamaudio.com>
* Add ioapic support disabled by defaultDamien Zammit2021-04-041-0/+400
Use --enable-ncpus=x --enable-apic where x > 1 for SMP+APIC support. Use neither for no SMP and old PIC support. Message-Id: <20210404050812.145483-1-damien@zamaudio.com>
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