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* ioapic: Enable processor focus to BSPDamien Zammit2021-04-052-0/+4
| | | | Message-Id: <20210405052916.174771-2-damien@zamaudio.com>
* SMP: Fix warningsSamuel Thibault2021-04-045-0/+13
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* SMP: fix getting the interrupt stack address and sizeSamuel Thibault2021-04-043-4/+6
| | | | | | | * i386/i386at/boothdr.S (_eintstack): Add missing common. * i386/xen/xen_boothdr.S (_eintstack): Add missing common. * x86_64/xen/xen_boothdr.S (_eintstack): Add missing common. * i386/i386/mp_desc.c (intstack, eintstack): Add missing underscore.
* Add ioapic support disabled by defaultDamien Zammit2021-04-0416-27/+557
| | | | | | | Use --enable-ncpus=x --enable-apic where x > 1 for SMP+APIC support. Use neither for no SMP and old PIC support. Message-Id: <20210404050812.145483-1-damien@zamaudio.com>
* pit: Add more macrosSamuel Thibault2021-04-031-2/+7
| | | | | * i386/i386/pit.h (PITAUX_VAL, PIT_C2): New macros. (PIT_RATEMODE): Fix macro value.
* Keep BIOS mapped even without LinuxSamuel Thibault2021-03-312-7/+1
| | | | | | | | Not only Linux drivers need BIOS mapped. * i386/i386at/model_dep.c (i386at_init) [!LINUX_DEV]: Map the low memory. * i386/intel/pmap.c (pmap_create) [!LINUX_DEV]: Likewise.
* apic: Reorder definesDamien Zammit2021-03-291-2/+2
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* pic: Move to interrupts 0x20-0x2fDamien Zammit2021-03-282-5/+3
| | | | | | * i386/i386/pic.h (PICM_VECTBASE): Set to 0x20. * i386/i386at/idt.h (IDTSZ): Set to 0x20 + 0x10. (PIC_INT_BASE): Set to 0x20.
* Existing SMP apic code improvementsDamien Zammit2021-03-284-21/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * i386/i386/apic.c (acpi_get_irq_override): New function. (apic_get_ioapic): Make it return IoApicData* rather than IoApicData. (apic_print_info): Manage IoApicData* rather than IoApicData. * i386/i386/apic.h (struct ApicReg): Use uint32_t instead of unsigned. (struct ioapic_route_entry): New structure. (union ioapic_route_entry_union): New union. (ApicLocalUnit): Rename base to gsi_base. Add ioapic field. (APIC_IRQ_OVERRIDE_POLARITY_MASK, APIC_IRQ_OVERRIDE_TRIGGER_MASK): New macros. (acpi_get_irq_override, ): New prototype. (apic_get_ioapic): Update prototype. (lapic): New declaration. (IMCR_SELECT, IMCR_DATA, MODE_IMCR, IMCR_USE_PIC, IMCR_USE_APIC, LAPIC_ENABLE, LAPIC_NMI, LAPIC_DISABLE, LAPIC_TIMER_PERIODIC, LAPIC_TIMER_DIVIDE_2, LAPIC_TIMER_DIVIDE_4, LAPIC_TIMER_DIVIDE_8, LAPIC_TIMER_DIVIDE_16, LAPIC_TIMER_BASEDIV, NINTR, IOAPIC_FIXED, IOAPIC_PHYSICAL, IOAPIC_LOGICAL, IOAPIC_NMI, IOAPIC_EXTINT, IOAPIC_ACTIVE_HIGH, IOAPIC_ACTIVE_LOW, IOAPIC_EDGE_TRIGGERED, IOAPIC_LEVEL_TRIGGERED, IOAPIC_MASK_ENABLED, IOAPIC_MASK_DISABLED): New macros. * i386/i386at/acpi_parse_apic.h (struct acpi_apic_ioapic): Rename base field to gsi_base. * i386/i386at/acpi_parse_apic.c (acpi_apic_add_ioapic): Update to gsi_base new name. Set ioapic field. (acpi_apic_setup): Rename lapic to lapic_unit. Message-Id: <20210328060320.36194-5-damien@zamaudio.com>
* Don't allow writing to acpi table in memoryDamien Zammit2021-03-281-1/+1
| | | | | | * i386/i386at/acpi_parse_apic.c (acpi_get_apic): Map rsdt entries read-only. Message-Id: <20210328060320.36194-4-damien@zamaudio.com>
* fixup acpi base table searchDamien Zammit2021-03-281-18/+12
| | | | | | | | | * i386/i386at/acpi_parse_apic.c (acpi_check_rsdp_align): Make it take a void* instead of uint32_t. (acpi_get_rsdp): Apply phystokv on the EBDA base and 0xE0000. (acpi_apic_setup): Drop spurious negation. Message-Id: <20210328060320.36194-3-damien@zamaudio.com>
* i386 fpu: fix bogus checkAndrea G. Monaco2021-02-111-1/+1
| | | | | | | Avoid panicing on all CPUs that do not support xsaves. * i386/i386/fpu.c (init_fpu): Panic on CPUs that do not support xsaves only if the cpu-reported xsave size is smaller than expected.
* com: Fix bogus NCOM testAndrea G. Monaco2021-02-031-1/+1
| | | | * i386/i386at/com.c (comprobe_general): Reject unit being equal to NCOM.
* add a missing include header guard.guy fleury iteriteka2021-01-091-0/+5
| | | | | * i386/i386at/comreg.h: Add header guard angaist multiple inclusion. Message-Id: <20210109180149.11861-1-gfleury@disroot.org>
* Fix _Static_assert callSamuel Thibault2020-12-231-2/+4
| | | | | | | | Before C2X, _Static_assert requires a second parameter Reported by Andrea G. Monaco <andrea.monaco@autistici.org> * i386/i386/fpu.c: Add second parameter to _Static_assert calls.
* i386at: Really disable com and lpr above NCOM and NLPRSamuel Thibault2020-12-072-0/+10
| | | | | | | commmodem and lprinfo arrays would otherwise overflow. * i386/i386at/com.c (comattach): Return early when unit is beyond NCOM. * i386/i386at/lpr.c (lprattach): Return early when unit is beyond NLPR.
* pmap: Note that we should support PCIDSamuel Thibault2020-12-021-0/+1
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* x86: Move fp_reg.h static assertions to .c fileSamuel Thibault2020-12-012-2/+3
| | | | | | | | Since fp_reg.h is installed on the system, and compilers may not even support _Static_assert. * i386/include/mach/i386/fp_reg.h: Move _Static_assert to... * i386/i386/fpu.c: ... c file.
* x86: Keep fp_regs.h standaloneSamuel Thibault2020-12-011-6/+4
| | | | | | | | | We cannot include stdint.h in fp_regs.h since this is included by mach_types.h for bootstrapping, before we have stdint.h from glibc. * i386/include/mach/i386/fp_reg.h: Do not include <stdint.h> (XSAVE_XCOMP_BV_COMPACT, struct i386_xfp_xstate_header): Use unsigned long long instead of uint64_t.
* x86: Get default state from the CPU itselfSamuel Thibault2020-11-291-20/+6
| | | | | | | | | It seems that at least qemu does not like our initial state. We can as well just take it from fninit. * i386/i386/fpu.c (MXCSR_DEFAULT, CWD_DEFAULT): Remove macros. (fpu_module_init): Get default state from CPU. (fpinit): Do not call fninit.
* x86: Make sure we allocate as much as our structure should holdSamuel Thibault2020-11-291-0/+10
| | | | | * i386/i386/fpu.c (init_fpu): Panic if the CPU gives us a size that is smaller than it should.
* x86: clear exceptions etc. on fpinitSamuel Thibault2020-11-291-0/+1
| | | | | | | fpu_rstor is not enough, exceptions and such remain behind, so restore calling fninit. * i386/i386/fpu.c (fpinit): call fninit() before fpu_rstor().
* x86: Fix initial control wordSamuel Thibault2020-11-291-3/+8
| | | | | | | The value in fp_state_alloc was actually an oldie, the value in fpinit was the expected one nowadays. * i386/i386/fpu.c (CWD_DEFAULT): Set to 0x37f.
* x86: Fix initialization of new threadsSamuel Thibault2020-11-293-49/+47
| | | | | | | | | | | | | | | | | | | fninit does not clear MMX/SSE/AVX registers, so we have to use rstor to clear them when starting a new thread. Along the way, we can as well just have a default state to be loaded in each new thread. * i386/include/mach/i386/fp_reg.h (XSAVE_XCOMP_BV_COMPACT): New macro. * i386/i386/fpu.h (fp_default_state): New variable declaration. * i386/i386/fpu.c (fp_default_state): New variable. (MXCSR_DEFAULT, CWD_DEFAULT): New macros. (fpu_module_init): Allocate and initialize fp_default_state. (fpinit): rstor from fp_default_state instead of setting FPU state by hand. (fp_load): Copy initial state from fp_default_state instead of setting it to 0. This is more future-proof since this is the exact state that we are loading in fpinit. (fp_state_alloc): fp_state_alloc: Copy initial state from fp_default_state.
* x86: Factorize fpu save/restoreSamuel Thibault2020-11-292-60/+49
| | | | | | | * i386/i386/fpu.h (fpu_save, fpu_rstor): New macros. (fpu_save_context): Use fpu_save macro. * i386/i386/fpu.c (fp_save): Use fpu_save macro. (fp_load): Use fpu_rstor macro.
* x86: Drop XSAVE support limitationSamuel Thibault2020-11-282-4/+0
| | | | | | | | | Now that XSAVEOPT is supported, we are fine with supporting large FPU state. * i386/i386/fpu.c (init_fpu): Do not limit fp_xsave_support to CPU_XCR0_SUPPORTED. * i386/i386/fpu.h (CPU_XCR0_SUPPORTED): Remove macro.
* x86: Add XSAVEOPT, XSAVEC, XSAVES supportSamuel Thibault2020-11-282-28/+121
| | | | | | | | | | | | | | * i386/i386/fpu.h (CPU_FEATURE_XSAVEOPT, CPU_FEATURE_XSAVEC, CPU_FEATURE_XGETBV1, CPU_FEATURE_XSAVES): New macros. (xsaveopt, xsavec, xsaves, xrstors): New macros. (fpu_save_context): Use xsaveopt, xsavec, or xsaves when available. (fp_save_kind): New enum. (fp_save_kind): New variable declaration. * i386/i386/fpu.c (fp_save_kind): New variable. (init_fpu): Set fp_save_kind according to enumeration. When XSAVES is supported, use xsave area size from corresponding enumeration. (fp_save): Use xsaveopt, xsavec, xsaves when available. (fp_load): Use xrstors when available.
* x86: Extend XSAVE support to unbound stateSamuel Thibault2020-11-283-23/+12
| | | | | | | | | | | | * i386/i386/fpu.c (fp_xsave_size): New variable. (init_fpu): Save XSAVE size to fp_xsave_size. (fpu_module_init): Pass fp_xsave_size as size to kmem_cache_init. (fpu_set_state, fp_load, fp_state_alloc): Use fp_xsave_size to clear ifps. * i386/include/mach/i386/fp_reg.h (struct i386_xfp_save): Replace static fp_yreg_word with extended field. * i386/i386/thread.h (struct i386_fpsave_state): Make fp_valid field first in the structure to let the extended finish the structure.
* x86: Add XSAVE supportSamuel Thibault2020-11-284-27/+122
| | | | | | | | | | | | | | | | | | | | | | | | | * i386/i386/fpu.h (CPU_XCR0_X87, CPU_XCR0_SSE, CPU_XCR0_AVX, CPU_XCR0_MPX, CPU_XCR0_AVX512): New macros. (xsave): Pass fp_xsave_support to xsave. (fpu_save_context): When fp_kind is FP_387X, use xsave. (fp_xsave_support): New variable declaration. * i386/i386/proc_reg.h (cpuid): New macro. * linux/src/include/asm-i386/processor.h (cpuid): Disable macro. * i386/include/mach/i386/fp_reg.h: Include <stdint.h> (i386_xfp_xstate_header): New structure. (i386_xfp_save): Add xsave fields. * i386/i386/fpu.c (fp_xsave_support): New variable. (init_fpu): Look for XSAVE feature; if available, get the supported parts and set fp_kind to FP_387X. (fpu_module_init): Set ifps_cache alignment to alignof(struct i386_fpsave_state). (fpu_set_state): Make sure to clear all the ifps structure. Reuse the FP_387FX for the FP_387X case. (fpu_get_state, fpexterrflt, fpastintr, fp_state_alloc): Reuse the FP_387FX for the FP_387X case. (fp_save): When fp_kind is FP_387X, use xsave. (fp_load): When fp_kind is FP_387X, use xrstor. Reuse the FP_387FX for the FP_387X case.
* fpu: Rename FP_387X to FP_387FXSamuel Thibault2020-11-283-11/+12
| | | | | | | | | | | To leave FP_387X for XSAVE-supporting CPU (as opposed to FXSAVE-supporting CPU) * i386/include/mach/i386/fp_reg.h (FP_387X): Rename to FP_387FX. (FP_387X): New macro. * i386/i386/fpu.c (init_fpu, fpu_set_state, fpu_get_state, fpexterrflt, fpastintr, fp_save, fp_load, fp_state_alloc): Update accordingly. * i386/i386/fpu.h (fpu_save_context): Likewise.
* fp_reg: update to latest SSE supported by FXSAVESamuel Thibault2020-11-281-3/+4
| | | | | | * i386/include/mach/i386/fp_reg.h (struct i386_xfp_save): Extend fp_xreg_word to 16 registers. (sizeof(struct i386_xfp_save)): Assert that it is equal to 512.
* x86: Pave the way for xsave/xrstor supportSamuel Thibault2020-11-284-2/+38
| | | | | | | | | | | | | * i386/i386/fpu.h (xgetbv, get_xcr0, xsetbv, set_xcr0): New inline functions. (xsave, xrstor): New macros. * i386/i386/locore.S (cpu_features): Extend to two words. (cpu_features_edx, cpu_features_ecx): New labels. (discover_x86_cpu_type): Also save ecx cpuid(1) report. * x86_64/locore.S: Likewise. * i386/i386/locore.h (cpu_features): Extend to two words. (CPU_FEATURE_XSAVE): New macro. * i386/i386/proc_reg.h (CR4_OSXSAVE): New macro.
* x86: allow using 8bit constants in in/out instructionsSamuel Thibault2020-11-281-6/+6
| | | | | | * i386/i386/pio.h (inl, inw, inb, outl, outw, outb): Add N constraint alternative on port. (outl): Cast data to unsigned int.
* Disable com3 and com4Samuel Thibault2020-11-221-1/+2
| | | | | | | | We do not support shared IRQs for these, so avoid boot issues when running on a system with more than 2 com ports. * i386/configfrag.ac (ncom) [at:i?86]: Set to 2. * x86_64/configfrag.ac (ncom) [at:x86_64]: Set to 2.
* fix missing include header guard.guy fleury iteriteka2020-11-221-0/+5
| | | | | * i386/i386/pit.h: Add header guard angaist multiple inclusion. Message-Id: <20201122074155.4883-1-gfleury@disroot.org>
* i386 pmap: Omit pmap workaround on i486 or later.Masanori Ogino2020-11-083-4/+16
| | | | | | | | | | | | | | | As described in XXX comments, the workaround for memory mapping is implemented for 80386 and it is unnecessary on i486 or later. Thus, it is safe to omit that if the kernel is built for the recent (1989~) processors. Fuhito Inagawa pointed out the problem to me. * i386/i386/trap.c (kernel_trap): Disable the workaround when the kernel is built for i[456]86. * i386/intel/pmap.c (pmap_protect, pmap_enter): Ditto. * i386/intel/read_fault.c: Define intel_read_fault if and only if it is necessary.
* pmap: Fix warningSamuel Thibault2020-11-081-1/+1
| | | | * i386/intel/pmap.c (pmap_enter): Fix debugging print format.
* Add comment about mp_desc_init callAlmudena Garcia2020-10-071-0/+1
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* fix: fix kernel panic in SMP mode Add mp_desc_init() call in BSP processor, ↵Almudena Garcia2020-10-071-0/+5
| | | | to initialize some structures needed for SMP
* smp: Add --enable-ncpus option and fix buildSamuel Thibault2020-09-198-8/+31
| | | | | | | | | | | | | | | | | | | | | | | * configfrag.ac (--enable-ncpus): Add option to set $mach_ncpus. * i386/i386/cpu_number.h (CPU_NUMBER, cpu_number): New macros, set to 0 for now. * i386/i386/db_interface.c (cpu_interrupt_to_db): New function. * i386/i386/db_interface.h (cpu_interrupt_to_db): New declaration. * i386/i386/mp_desc.c (int_stack_base): New array. (intel_startCPU): New function. * i386/i386at/model_dep.c: Include <i386/smp.h> (int_stack_top, int_stack_base): Turn into arrays (i386at_init): Update accesses accordingly. * i386/i386at/model_dep.h (int_stack_top, int_stack_base, ON_INT_STACK): Likewise. * i386/intel/pmap.c (cpus_active, cpus_idle, cpu_update_needed): Add variables. * i386/intel/pmap.h (cpus_active, cpus_idle, cpu_update_needed): Mark extern. * kern/cpu_number.h: Include <machine/cpu_number.h> * linux/dev/arch/i386/kernel/irq.c (local_bh_count, local_irq_count): Hardcode to the address of intr_count. We will not use the Linux code in SMP mode anyway.
* model_dep.c: Add smp_init callAlmudena Garcia2020-09-191-1/+7
| | | | | | if NCPUS > 1, call to smp_init to start the search and enumeration of the cpus *i386/i386/model_dep.c (machine_init): add smp_init() call
* smp: Add generic smp pseudoclassAlmudena Garcia2020-09-193-0/+76
| | | | | | | | | | This pseudoclass generalize the initialization and access of SMP data, allowing expands it to other architectures. In x86, the functions calls to apic functions. *kern/smp.c: Source file. Implements a interface to load the SMP functions for the current architecture. *kern/smp.h: Header file. Add declaration for smp_data structure. *i386/i386/smp.c: Source file. Implements a set of functions to manage the SMP actions in i386 *i386/i386/smp.h: Header file. Add declarations for SMP functions in i386.
* acpi parser: Fix build warningsSamuel Thibault2020-09-191-7/+5
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* smp: Add APIC finder and parserAlmudena Garcia2020-09-193-0/+708
| | | | | | | | | | | To find the processors, It's necessary to find the APIC (MADT) table This table is found inside ACPI tables. This set of functions find the MADT table, and parse it to find the APIC structures and register it in the kernel. *acpi_parse_apic.h: ACPI structures and function prototypes. *acpi_parse_apic.c: ACPI/APIC function definitions.
* smp: Add pseudoclass to manage APIC operationsAlmudena Garcia2020-08-123-0/+362
| | | | | | | | | | | | | | The SMP support requires access, register and configure some APIC structures, like Local APIC and IOAPIC. This pseudoclass includes functions to register some APIC structures into the kernel, and access to these structures to extract some information. *apic.h: Header file recovered from Mach 4 source code, and updated for xAPIC. Includes some structs with Local APIC and IOAPIC fields, and the declaration of the functions. *apic.c: Source file. Includes the definition of the functions, within some globals of apic_info structures and the lapic reference.
* Fix xen buildSamuel Thibault2020-07-152-2/+3
| | | | | | | | * device/ds_routines.c (ds_device_intr_register, ds_device_intr_ack) [MACH_XEN]: Return D_INVALID_OPERATION. * i386/Makefrag.am [!PLATFORM_at] (libkernel_a_SOURCES): Remove i386/i386/irq.c and i386/i386/irq.h. * i386/i386/irq.c: Include <kern/assert.h>.
* Add hardware interrupt notification mechanismSamuel Thibault2020-07-106-0/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows privileged userland drivers to get notifications of hardware interrupts. Initial work by Zheng Da, reworked by Damien Zammit and myself. * Makefrag.am (libkernel_a_SOURCES): Add device/intr.c and device/intr.h. (include_device_HEADERS): Add include/device/notify.defs and include/device/notify.h. * device/dev_hdr.h (name_equal): Add declaration. * device/ds_routines.c: Include <device/intr.h> (ds_device_intr_register, ds_device_intr_ack): New functions. * device/intr.c, device/intr.h: New files. * doc/mach.texi (Device Interrupt): New section. * i386/Makefrag.am (libkernel_a_SOURCES): Add i386/i386/irq.c and i386/i386/irq.h. * i386/i386/irq.c, i386/i386/irq.h: New files. * i386/i386at/conf.c: Include <device/intr.h>. (irqname): New macro. (dev_name_list): Add irq device. * include/device/device.defs (device_intr_register, device_intr_ack): New RPCs. * include/device/notify.defs, include/device/notify.h: New files. * kern/startup.c: Include <device/intr.h> (start_kernel_threads): Start intr_thread thread. * linux/dev/arch/i386/kernel/irq.c: Include <device/intr.h> (linux_action): Add user_intr field. (linux_intr): Call user_intr action if any. (mask_irq, unmask_irq): Move functions to i386/i386/pic.c (__disable_irq, __enable_irq): Move functions to i386/i386/irq.c. (install_user_intr_handler): New function. (request_irq): Initialize user_intr field. * linux/src/include/asm-i386/irq.h (__disable_irq, __enable_irq): Remove prototypes. * i386/i386/pic.c (mask_irq, unmask_irq): New functions. * i386/i386/pic.h (mask_irq, unmask_irq): New prototypes.
* Add vm_allocate_contiguous RPCSamuel Thibault2020-07-092-0/+10
| | | | | | | | | | | | | | | | | This allows privileged userland drivers to allocate buffers for e.g. DMA, and thus need them to be physically contiguous and get their physical address. Initial work by Zheng Da, reworked by Richard Braun, Damien Zammit, and myself. * doc/mach.texi (vm_allocate_contiguous): New RPC. * i386/include/mach/i386/machine_types.defs (rpc_phys_addr_t): New type. * i386/include/mach/i386/vm_types.h [!MACH_KERNEL] (phys_addr_t): Set type to 64bits. (rpc_phys_addr_t): New type, always 64bits. * include/mach/gnumach.defs (vm_allocate_contiguous):New RPC. * vm/vm_user.c (vm_allocate_contiguous): New function.
* Support GPT disklabels and build them by defaultнаб2020-06-011-0/+2
| | | | Based on UEFI 2.8A spec
* mach_trap_table: Fix 64bit versionSamuel Thibault2020-04-061-1/+1
| | | | | | | The addition of the mach_trap_name field made the 64bit unused field spurious. * kern/syscall_sw.h (mach_trap_t): Remove `unused' field.
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